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/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-s4.dtsi108 clocks = <&clkc_pll CLKID_FCLK_DIV2>,
750 <&clkc_pll CLKID_FCLK_DIV2>;
803 <&clkc_pll CLKID_FCLK_DIV2>,
823 <&clkc_pll CLKID_FCLK_DIV2>;
837 <&clkc_pll CLKID_FCLK_DIV2>;
849 <&clkc_pll CLKID_FCLK_DIV2>;
H A Dmeson-gxbb.dtsi296 <&clkc CLKID_FCLK_DIV2>,
298 <&clkc CLKID_FCLK_DIV2>;
824 <&clkc CLKID_FCLK_DIV2>;
832 <&clkc CLKID_FCLK_DIV2>;
840 <&clkc CLKID_FCLK_DIV2>;
H A Dmeson-gxl.dtsi133 <&clkc CLKID_FCLK_DIV2>,
135 <&clkc CLKID_FCLK_DIV2>;
894 <&clkc CLKID_FCLK_DIV2>;
902 <&clkc CLKID_FCLK_DIV2>;
910 <&clkc CLKID_FCLK_DIV2>;
H A Dmeson-g12-common.dtsi178 <&clkc CLKID_FCLK_DIV2>,
180 <&clkc CLKID_FCLK_DIV2>;
2431 <&clkc CLKID_FCLK_DIV2>;
2443 <&clkc CLKID_FCLK_DIV2>;
2455 <&clkc CLKID_FCLK_DIV2>;
/linux/include/dt-bindings/clock/
H A Damlogic,a1-pll-clkc.h19 #define CLKID_FCLK_DIV2 6 macro
H A Damlogic,c3-pll-clkc.h13 #define CLKID_FCLK_DIV2 3 macro
H A Damlogic,s4-pll-clkc.h13 #define CLKID_FCLK_DIV2 3 macro
H A Daxg-clkc.h13 #define CLKID_FCLK_DIV2 2 macro
H A Dmeson8b-clkc.h12 #define CLKID_FCLK_DIV2 5 macro
H A Dgxbb-clkc.h12 #define CLKID_FCLK_DIV2 4 macro
H A Dg12a-clkc.h13 #define CLKID_FCLK_DIV2 2 macro
/linux/Documentation/devicetree/bindings/clock/
H A Damlogic,a1-peripherals-clkc.yaml67 clocks = <&clkc_pll CLKID_FCLK_DIV2>,
/linux/arch/arm/boot/dts/amlogic/
H A Dmeson8m2.dtsi34 <&clkc CLKID_FCLK_DIV2>;
H A Dmeson8b.dtsi573 <&clkc CLKID_FCLK_DIV2>;
/linux/Documentation/devicetree/bindings/mtd/
H A Damlogic,meson-nand.yaml110 clocks = <&clkc CLKID_SD_EMMC_C>, <&clkc CLKID_FCLK_DIV2>;
/linux/drivers/clk/meson/
H A Da1-pll.c291 [CLKID_FCLK_DIV2] = &a1_fclk_div2.hw,
H A Dc3-pll.c628 [CLKID_FCLK_DIV2] = &c3_fclk_div2.hw,
H A Ds4-pll.c766 [CLKID_FCLK_DIV2] = &s4_fclk_div2.hw,
H A Dmeson8b.c2817 [CLKID_FCLK_DIV2] = &meson8b_fclk_div2.hw,
3021 [CLKID_FCLK_DIV2] = &meson8b_fclk_div2.hw,
3236 [CLKID_FCLK_DIV2] = &meson8b_fclk_div2.hw,
H A Dgxbb.c2843 [CLKID_FCLK_DIV2] = &gxbb_fclk_div2.hw,
3051 [CLKID_FCLK_DIV2] = &gxbb_fclk_div2.hw,
H A Dg12a.c4487 [CLKID_FCLK_DIV2] = &g12a_fclk_div2.hw,
4714 [CLKID_FCLK_DIV2] = &g12a_fclk_div2.hw,
4982 [CLKID_FCLK_DIV2] = &g12a_fclk_div2.hw,
H A Daxg.c1989 [CLKID_FCLK_DIV2] = &axg_fclk_div2.hw,