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/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/
H A Dusb.txt12 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
16 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
H A Ducc.txt25 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
29 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
/linux/drivers/clk/spear/
H A Dspear6xx_clock.c116 struct clk *clk, *clk1; in spear6xx_clk_init() local
136 &_lock, &clk1, NULL); in spear6xx_clk_init()
138 clk_register_clkdev(clk1, "pll1_clk", NULL); in spear6xx_clk_init()
142 &_lock, &clk1, NULL); in spear6xx_clk_init()
144 clk_register_clkdev(clk1, "pll2_clk", NULL); in spear6xx_clk_init()
162 &_lock, &clk1); in spear6xx_clk_init()
164 clk_register_clkdev(clk1, "uart_syn_gclk", NULL); in spear6xx_clk_init()
182 &_lock, &clk1); in spear6xx_clk_init()
184 clk_register_clkdev(clk1, "firda_syn_gclk", NULL); in spear6xx_clk_init()
198 &_lock, &clk1); in spear6xx_clk_init()
[all …]
H A Dspear3xx_clock.c390 struct clk *clk, *clk1, *ras_apb_clk; in spear3xx_clk_init() local
414 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear3xx_clk_init()
416 clk_register_clkdev(clk1, "pll1_clk", NULL); in spear3xx_clk_init()
420 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear3xx_clk_init()
422 clk_register_clkdev(clk1, "pll2_clk", NULL); in spear3xx_clk_init()
436 &_lock, &clk1); in spear3xx_clk_init()
438 clk_register_clkdev(clk1, "uart_syn_gclk", NULL); in spear3xx_clk_init()
454 &_lock, &clk1); in spear3xx_clk_init()
456 clk_register_clkdev(clk1, "firda_syn_gclk", NULL); in spear3xx_clk_init()
506 &_lock, &clk1); in spear3xx_clk_init()
[all …]
H A Dspear1340_clock.c441 struct clk *clk, *clk1; in spear1340_clk_init() local
474 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1340_clk_init()
476 clk_register_clkdev(clk1, "pll1_clk", NULL); in spear1340_clk_init()
485 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1340_clk_init()
487 clk_register_clkdev(clk1, "pll2_clk", NULL); in spear1340_clk_init()
496 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1340_clk_init()
498 clk_register_clkdev(clk1, "pll3_clk", NULL); in spear1340_clk_init()
502 ARRAY_SIZE(pll4_rtbl), &_lock, &clk1, NULL); in spear1340_clk_init()
504 clk_register_clkdev(clk1, "pll4_clk", NULL); in spear1340_clk_init()
631 aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1); in spear1340_clk_init()
[all …]
H A Dspear1310_clock.c384 struct clk *clk, *clk1; in spear1310_clk_init() local
417 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1310_clk_init()
419 clk_register_clkdev(clk1, "pll1_clk", NULL); in spear1310_clk_init()
428 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1310_clk_init()
430 clk_register_clkdev(clk1, "pll2_clk", NULL); in spear1310_clk_init()
439 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL); in spear1310_clk_init()
441 clk_register_clkdev(clk1, "pll3_clk", NULL); in spear1310_clk_init()
445 ARRAY_SIZE(pll4_rtbl), &_lock, &clk1, NULL); in spear1310_clk_init()
447 clk_register_clkdev(clk1, "pll4_clk", NULL); in spear1310_clk_init()
552 ARRAY_SIZE(aux_rtbl), &_lock, &clk1); in spear1310_clk_init()
[all …]
/linux/drivers/clocksource/
H A Dtimer-sp804.c259 struct clk *clk1, *clk2; in sp804_of_init() local
278 clk1 = of_clk_get(np, 0); in sp804_of_init()
279 if (IS_ERR(clk1)) in sp804_of_init()
280 clk1 = NULL; in sp804_of_init()
291 clk2 = clk1; in sp804_of_init()
307 name, clk1, 1); in sp804_of_init()
312 ret = sp804_clockevents_init(timer1_base, irq, clk1, name); in sp804_of_init()
/linux/drivers/clk/ti/
H A Dclk-33xx.c272 struct clk *clk1, *clk2; in am33xx_dt_clk_init() local
292 clk1 = clk_get_sys(NULL, "sys_clkin_ck"); in am33xx_dt_clk_init()
294 clk_set_parent(clk2, clk1); in am33xx_dt_clk_init()
297 clk_set_parent(clk2, clk1); in am33xx_dt_clk_init()
305 clk1 = clk_get_sys(NULL, "wdt1_fck"); in am33xx_dt_clk_init()
307 clk_set_parent(clk1, clk2); in am33xx_dt_clk_init()
H A Dclk-43xx.c275 struct clk *clk1, *clk2; in am43xx_dt_clk_init() local
296 clk1 = clk_get_sys(NULL, "cpsw_cpts_rft_clk"); in am43xx_dt_clk_init()
298 clk_set_parent(clk1, clk2); in am43xx_dt_clk_init()
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dgf100.c279 u32 clk0, clk1 = 0; in calc_clk() local
292 clk1 = calc_pll(clk, idx, freq, &info->coef); in calc_clk()
294 clk1 = cstate->domain[nv_clk_src_hubk06]; in calc_clk()
295 clk1 = calc_div(clk, idx, clk1, freq, &div1P); in calc_clk()
299 if (abs((int)freq - clk0) <= abs((int)freq - clk1)) { in calc_clk()
318 info->freq = clk1; in calc_clk()
H A Dgk104.c293 u32 clk0, clk1 = 0; in calc_clk() local
306 clk1 = calc_pll(clk, idx, freq, &info->coef); in calc_clk()
308 clk1 = cstate->domain[nv_clk_src_hubk06]; in calc_clk()
309 clk1 = calc_div(clk, idx, clk1, freq, &div1P); in calc_clk()
313 if (abs((int)freq - clk0) <= abs((int)freq - clk1)) { in calc_clk()
332 info->freq = clk1; in calc_clk()
H A Dmcp77.c184 u32 clk0 = src, clk1 = src; in calc_P() local
187 clk1 = clk0 << (*div ? 1 : 0); in calc_P()
193 if (target - clk0 <= clk1 - target) in calc_P()
196 return clk1; in calc_P()
H A Dnv50.c347 u32 clk0 = src, clk1 = src; in calc_div() local
350 clk1 = clk0 << (*div ? 1 : 0); in calc_div()
356 if (target - clk0 <= clk1 - target) in calc_div()
359 return clk1; in calc_div()
/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-ac5.c134 MPP_FUNCTION(2, "ptp", "clk1"),
167 MPP_FUNCTION(2, "ptp", "clk1"),
199 MPP_FUNCTION(2, "ptp", "clk1"),
206 MPP_FUNCTION(2, "ptp", "clk1"),
/linux/sound/soc/codecs/
H A Dpcm3060.h20 /* ADC and DAC can be clocked from separate or same sources CLK1 and CLK2 */
21 #define PCM3060_CLK_DEF 0 /* default: CLK1->ADC, CLK2->DAC */
/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,lpass-cpu.yaml150 - const: mi2s-bit-clk1
174 - const: mi2s-bit-clk1
271 "mi2s-bit-clk0", "mi2s-bit-clk1";
/linux/Documentation/devicetree/bindings/soc/tegra/
H A Dnvidia,tegra20-pmc.yaml273 hsic, hv, lvds, mipi-bias, nand, pex-bias, pex-clk1, pex-clk2,
281 hdmi, hsic, lvds, mipi-bias, pex-bias, pex-clk1, pex-clk2, pex-cntrl,
341 pex-bias, pex-clk1, pex-clk2, pex-cntrl, sdmmc1,
361 pex-bias, pex-clk1, pex-clk2, pex-cntrl, sdmmc1,
/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs-sev-kit-fabric.dtsi11 fabric_clk1: fabric-clk1 {
H A Dmpfs-tysom-m-fabric.dtsi13 fabric_clk1: fabric-clk1 {
H A Dmpfs-m100pfs-fabric.dtsi11 fabric_clk1: fabric-clk1 {
H A Dmpfs-polarberry-fabric.dtsi11 fabric_clk1: fabric-clk1 {
/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Duqe_serial.txt8 should be "clk1"-"clk28" for external clock source.
/linux/drivers/clk/renesas/
H A Drzv2h-cpg.c137 unsigned int clk1, clk2; in rzv2h_cpg_pll_clk_recalc_rate() local
143 clk1 = readl(priv->base + PLL_CLK1_OFFSET(pll_clk->conf)); in rzv2h_cpg_pll_clk_recalc_rate()
146 rate = mul_u64_u32_shr(parent_rate, (MDIV(clk1) << 16) + KDIV(clk1), in rzv2h_cpg_pll_clk_recalc_rate()
149 return DIV_ROUND_CLOSEST_ULL(rate, PDIV(clk1)); in rzv2h_cpg_pll_clk_recalc_rate()
/linux/Documentation/devicetree/bindings/arm/tegra/
H A Dnvidia,tegra186-pmc.yaml106 pex-clk1, usb0, usb1, usb2, usb-bias, uart, audio, hsic, dbg,
114 pex-clk1, eqos, pex-clk-2-bias, pex-clk-2, dap3, dap5, uart,
/linux/sound/soc/qcom/
H A Dlpass-apq8016.c274 "mi2s-osr-clk1",
280 "mi2s-bit-clk1",

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