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Searched full:clk0 (Results 1 – 24 of 24) sorted by relevance

/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dgf100.c279 u32 clk0, clk1 = 0; in calc_clk() local
286 clk0 = calc_src(clk, idx, freq, &src0, &div0); in calc_clk()
287 clk0 = calc_div(clk, idx, clk0, freq, &div1D); in calc_clk()
290 if (clk0 != freq && (0x00004387 & (1 << idx))) { in calc_clk()
299 if (abs((int)freq - clk0) <= abs((int)freq - clk1)) { in calc_clk()
311 info->freq = clk0; in calc_clk()
H A Dgk104.c293 u32 clk0, clk1 = 0; in calc_clk() local
300 clk0 = calc_src(clk, idx, freq, &src0, &div0); in calc_clk()
301 clk0 = calc_div(clk, idx, clk0, freq, &div1D); in calc_clk()
304 if (clk0 != freq && (0x0000ff87 & (1 << idx))) { in calc_clk()
313 if (abs((int)freq - clk0) <= abs((int)freq - clk1)) { in calc_clk()
324 info->freq = clk0; in calc_clk()
H A Dmcp77.c184 u32 clk0 = src, clk1 = src; in calc_P() local
186 if (clk0 <= target) { in calc_P()
187 clk1 = clk0 << (*div ? 1 : 0); in calc_P()
190 clk0 >>= 1; in calc_P()
193 if (target - clk0 <= clk1 - target) in calc_P()
194 return clk0; in calc_P()
H A Dnv50.c347 u32 clk0 = src, clk1 = src; in calc_div() local
349 if (clk0 <= target) { in calc_div()
350 clk1 = clk0 << (*div ? 1 : 0); in calc_div()
353 clk0 >>= 1; in calc_div()
356 if (target - clk0 <= clk1 - target) in calc_div()
357 return clk0; in calc_div()
/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,lpass-cpu.yaml149 - const: mi2s-bit-clk0
173 - const: mi2s-bit-clk0
271 "mi2s-bit-clk0", "mi2s-bit-clk1";
/linux/drivers/clk/ti/
H A Dadpll.c266 char *name, struct clk *clk0, in ti_adpll_init_mux() argument
278 parents[0] = __clk_get_name(clk0); in ti_adpll_init_mux()
575 char *name, struct clk *clk0, in ti_adpll_init_clkout() argument
606 parent_names[0] = __clk_get_name(clk0); in ti_adpll_init_clkout()
/linux/sound/soc/qcom/
H A Dlpass-apq8016.c273 "mi2s-osr-clk0",
279 "mi2s-bit-clk0",
/linux/arch/arm/boot/dts/st/
H A Dst-pincfg.h68 * CLK0, CLK1 modes with non-inverted clock
/linux/drivers/comedi/drivers/
H A Ddmm32at.c51 #define DMM32AT_AUX_DI0 BIT(0) /* J3.48 - CLK0 (SRC0) */
89 #define DMM32AT_CTRDIO_CFG_FREQ0 BIT(6) /* CLK0 1=10KHz 0=10MHz */
93 #define DMM32AT_CTRDIO_CFG_SRC0 BIT(1) /* CLK0 is 0=FREQ0 1=J3.48 */
H A Dusbdux.c16 * 0=/CLK0, 1=UP/DOWN0, 2=RESET0, 4=/CLK1, 5=UP/DOWN1, 6=RESET1.
/linux/include/dt-bindings/clock/
H A Dintel,lgm-clk.h95 /* Gate CLK0 */
/linux/drivers/clk/zynq/
H A Dclkc.c174 static void __init zynq_clk_register_periph_clk(enum zynq_clk clk0, in zynq_clk_register_periph_clk() argument
197 clks[clk0] = clk_register_gate(NULL, clk_name0, div_name, in zynq_clk_register_periph_clk()
209 clks[clk0] = ERR_PTR(-ENOMEM); in zynq_clk_register_periph_clk()
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3562-pinctrl.dtsi16 camm0_clk0_out: camm0-clk0-out {
30 camm1_clk0_out: camm1-clk0-out {
116 clk0 {
118 clk0_32k_out: clk0-32k-out {
827 pdmm0_clk0: pdmm0-clk0 {
869 pdmm1_clk0: pdmm1-clk0 {
H A Drk3528-pinctrl.dtsi558 pdm_clk0: pdm-clk0 {
/linux/Documentation/devicetree/bindings/arm/
H A Dvexpress-config.yaml275 clk0 {
/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio-latch.yaml16 CLK0 ----------------------. ,--------.
/linux/Documentation/devicetree/bindings/clock/
H A Dsilabs,si5351.yaml223 * Overwrite CLK0 configuration with:
/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-ac5.c205 MPP_FUNCTION(1, "ptp", "clk0"),
/linux/drivers/gpio/
H A Dgpio-latch.c10 * CLK0 ----------------------. ,--------.
/linux/arch/arm64/boot/dts/actions/
H A Ds900-bubblegum-96.dts162 "[CLK0]", /* GPIO_68, HSEC pin 15 */
/linux/include/video/
H A Dsstfb.h242 * 8 freq registers (0-7) for video clock (CLK0)
/linux/drivers/pinctrl/sunxi/
H A Dpinctrl-suniv-f1c100s.c338 SUNXI_FUNCTION(0x2, "clk0"), /* OUT */
/linux/drivers/pinctrl/
H A Dpinctrl-lpc18xx.c416 LPC_N(clk0, 0xc00, EMC, CLKOUT, R, R, SDMMC, EMC_ALT, SSP1, ENET, 0, HS);
625 LPC18XX_PIN(clk0, PIN_CLK0),
/linux/drivers/video/fbdev/
H A Dsstfb.c1033 sst_dac_write(DACREG_ICS_PLLWMA, 0x0); /* CLK0, f0 */ in sst_set_pll_ics()