| /linux/drivers/net/wireless/broadcom/brcm80211/brcmutil/ |
| H A D | d11.c | 41 static void brcmu_d11n_encchspec(struct brcmu_chan *ch) in brcmu_d11n_encchspec() argument
43 if (ch->bw == BRCMU_CHAN_BW_20) in brcmu_d11n_encchspec()
44 ch->sb = BRCMU_CHAN_SB_NONE; in brcmu_d11n_encchspec()
46 ch->chspec = 0; in brcmu_d11n_encchspec()
47 brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_CH_MASK, in brcmu_d11n_encchspec()
48 BRCMU_CHSPEC_CH_SHIFT, ch->chnum); in brcmu_d11n_encchspec()
49 brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_D11N_SB_MASK, in brcmu_d11n_encchspec()
50 0, d11n_sb(ch->sb)); in brcmu_d11n_encchspec()
51 brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_D11N_BW_MASK, in brcmu_d11n_encchspec()
52 0, d11n_bw(ch->bw)); in brcmu_d11n_encchspec()
[all …]
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | vlv_dpio_phy_regs.h | 13 #define _VLV_PLL(ch, dw) (0x8000 + (ch) * 0x20 + (dw) * 4) /* dw 0-7,16-23 */ argument
14 #define _CHV_PLL(ch, dw) (0x8000 + (ch) * 0x180 + (dw) * 4) argument
16 #define _VLV_PCS(ch, spline, dw) (0x200 + (ch) * 0x2400 + (spline) * 0x200 + (dw) * 4) argument
17 #define _VLV_PCS_GRP(ch, dw) (0x8200 + (ch) * 0x200 + (dw) * 4) argument
19 #define _VLV_TX(ch, lane, dw) (0x80 + (ch) * 0x2400 + (lane) * 0x200 + (dw) * 4) argument
20 #define _VLV_TX_GRP(ch, dw) (0x8280 + (ch) * 0x200 + (dw) * 4) argument
26 #define VLV_PLL_DW3(ch) _VLV_PLL((ch), 3) argument
47 #define VLV_PLL_DW5(ch) _VLV_PLL((ch), 5) argument
55 #define VLV_PLL_DW7(ch) _VLV_PLL((ch), 7) argument
57 #define VLV_PLL_DW16(ch) _VLV_PLL((ch), 16) argument
[all …]
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| H A D | bxt_dpio_phy_regs.h | 23 #define _BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1) \ argument
24 (BXT_PHY_BASE(phy) + _PIPE((ch), (reg_ch0) - _BXT_PHY0_BASE, \
26 #define _MMIO_BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1) \ argument
27 _MMIO(_BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1))
30 #define _MMIO_BXT_PHY_CH_LN(phy, ch, lane, reg_ch0, reg_ch1) \ argument
31 _MMIO(_BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1) + _BXT_LANE_OFFSET(lane))
51 #define BXT_PORT_PLL_EBB_0(phy, ch) _MMIO_BXT_PHY_CH(phy, ch, \ argument
60 #define BXT_PORT_PLL_EBB_4(phy, ch) _MMIO_BXT_PHY_CH(phy, ch, \ argument
95 #define _PORT_PLL_BASE(phy, ch) _BXT_PHY_CH(phy, ch, \ argument
98 #define BXT_PORT_PLL(phy, ch, idx) _MMIO(_PORT_PLL_BASE(phy, ch) + \ argument
[all …]
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| /linux/drivers/gpu/drm/imx/dcss/ |
| H A D | dcss-dpr.c | 118 struct dcss_dpr_ch ch[3]; member
121 static void dcss_dpr_write(struct dcss_dpr_ch *ch, u32 val, u32 ofs) in dcss_dpr_write() argument
123 struct dcss_dpr *dpr = ch->dpr; in dcss_dpr_write()
125 dcss_ctxld_write(dpr->ctxld, dpr->ctx_id, val, ch->base_ofs + ofs); in dcss_dpr_write()
130 struct dcss_dpr_ch *ch; in dcss_dpr_ch_init_all() local
134 ch = &dpr->ch[i]; in dcss_dpr_ch_init_all()
136 ch->base_ofs = dpr_base + i * 0x1000; in dcss_dpr_ch_init_all()
138 ch->base_reg = devm_ioremap(dpr->dev, ch->base_ofs, SZ_4K); in dcss_dpr_ch_init_all()
139 if (!ch->base_reg) { in dcss_dpr_ch_init_all()
140 dev_err(dpr->dev, "dpr: unable to remap ch %d base\n", in dcss_dpr_ch_init_all()
[all …]
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| H A D | dcss-scaler.c | 90 struct dcss_scaler_ch ch[3]; member
290 static void dcss_scaler_write(struct dcss_scaler_ch *ch, u32 val, u32 ofs) in dcss_scaler_write() argument
292 struct dcss_scaler *scl = ch->scl; in dcss_scaler_write()
294 dcss_ctxld_write(scl->ctxld, scl->ctx_id, val, ch->base_ofs + ofs); in dcss_scaler_write()
300 struct dcss_scaler_ch *ch; in dcss_scaler_ch_init_all() local
304 ch = &scl->ch[i]; in dcss_scaler_ch_init_all()
306 ch->base_ofs = scaler_base + i * 0x400; in dcss_scaler_ch_init_all()
308 ch->base_reg = devm_ioremap(scl->dev, ch->base_ofs, SZ_4K); in dcss_scaler_ch_init_all()
309 if (!ch->base_reg) { in dcss_scaler_ch_init_all()
310 dev_err(scl->dev, "scaler: unable to remap ch base\n"); in dcss_scaler_ch_init_all()
[all …]
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| /linux/drivers/dma/ |
| H A D | moxart-dma.c | 180 struct moxart_chan *ch = to_moxart_dma_chan(chan); in moxart_terminate_all() local
185 dev_dbg(chan2dev(chan), "%s: ch=%p\n", __func__, ch); in moxart_terminate_all()
187 spin_lock_irqsave(&ch->vc.lock, flags); in moxart_terminate_all()
189 if (ch->desc) { in moxart_terminate_all()
190 moxart_dma_desc_free(&ch->desc->vd); in moxart_terminate_all()
191 ch->desc = NULL; in moxart_terminate_all()
194 ctrl = readl(ch->base + REG_OFF_CTRL); in moxart_terminate_all()
196 writel(ctrl, ch->base + REG_OFF_CTRL); in moxart_terminate_all()
198 vchan_get_all_descriptors(&ch->vc, &head); in moxart_terminate_all()
199 spin_unlock_irqrestore(&ch->vc.lock, flags); in moxart_terminate_all()
[all …]
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| /linux/drivers/scsi/ |
| H A D | ch.c | 87 #define ch_printk(prefix, ch, fmt, a...) \ argument
88 sdev_prefix_printk(prefix, (ch)->device, (ch)->name, fmt, ##a)
93 ch_printk(KERN_DEBUG, ch, fmt, ##arg); \
98 ch_printk(level, ch, fmt, ##arg); \
187 ch_do_scsi(scsi_changer *ch, unsigned char *cmd, int cmd_len, in ch_do_scsi() argument
213 result = scsi_execute_cmd(ch->device, cmd, op, buffer, buflength, in ch_do_scsi()
219 scsi_print_sense_hdr(ch->device, ch->name, &sshdr); in ch_do_scsi()
228 ch_elem_to_typecode(scsi_changer *ch, u_int elem) in ch_elem_to_typecode() argument
233 if (elem >= ch->firsts[i] && in ch_elem_to_typecode()
234 elem < ch->firsts[i] + in ch_elem_to_typecode()
[all …]
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| /linux/drivers/s390/net/ |
| H A D | ctcm_fsms.c | 187 * ch : The channel, the error belongs to.
190 void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg) in ctcm_ccw_check_rc() argument
194 CTCM_FUNTAIL, ch->id, msg, rc); in ctcm_ccw_check_rc()
198 ch->id); in ctcm_ccw_check_rc()
199 fsm_event(ch->fsm, CTC_EVENT_IO_EBUSY, ch); in ctcm_ccw_check_rc()
203 ch->id); in ctcm_ccw_check_rc()
204 fsm_event(ch->fsm, CTC_EVENT_IO_ENODEV, ch); in ctcm_ccw_check_rc()
209 fsm_event(ch->fsm, CTC_EVENT_IO_UNKNOWN, ch); in ctcm_ccw_check_rc()
247 struct channel *ch = arg; in chx_txdone() local
248 struct net_device *dev = ch->netdev; in chx_txdone()
[all …]
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| H A D | ctcm_main.c | 71 * ch The channel where this skb has been received.
74 void ctcm_unpack_skb(struct channel *ch, struct sk_buff *pskb) in ctcm_unpack_skb() argument
76 struct net_device *dev = ch->netdev; in ctcm_unpack_skb()
90 if ((ch->protocol == CTCM_PROTO_S390) && in ctcm_unpack_skb()
92 if (!(ch->logflags & LOG_FLAG_ILLEGALPKT)) { in ctcm_unpack_skb()
93 ch->logflags |= LOG_FLAG_ILLEGALPKT; in ctcm_unpack_skb()
112 if (!(ch->logflags & LOG_FLAG_ILLEGALSIZE)) { in ctcm_unpack_skb()
118 ch->logflags |= LOG_FLAG_ILLEGALSIZE; in ctcm_unpack_skb()
129 if (!(ch->logflags & LOG_FLAG_OVERRUN)) { in ctcm_unpack_skb()
134 ch->logflags |= LOG_FLAG_OVERRUN; in ctcm_unpack_skb()
[all …]
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| /linux/drivers/rapidio/ |
| H A D | rio_cm.c | 222 static int riocm_ch_close(struct rio_channel *ch);
244 static int riocm_cmp(struct rio_channel *ch, enum rio_cm_state cmp) in riocm_cmp() argument
248 spin_lock_bh(&ch->lock); in riocm_cmp()
249 ret = (ch->state == cmp); in riocm_cmp()
250 spin_unlock_bh(&ch->lock); in riocm_cmp()
254 static int riocm_cmp_exch(struct rio_channel *ch, in riocm_cmp_exch() argument
259 spin_lock_bh(&ch->lock); in riocm_cmp_exch()
260 ret = (ch->state == cmp); in riocm_cmp_exch()
262 ch->state = exch; in riocm_cmp_exch()
263 spin_unlock_bh(&ch->lock); in riocm_cmp_exch()
[all …]
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| /linux/sound/soc/codecs/ |
| H A D | rk3308_codec.h | 24 #define RK3308_ADC_DIG_OFFSET(ch) (((ch) & 0x3) * 0xc0 + 0x0) argument
26 #define RK3308_ADC_DIG_CON01(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x04) argument
27 #define RK3308_ADC_DIG_CON02(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x08) argument
28 #define RK3308_ADC_DIG_CON03(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x0c) argument
29 #define RK3308_ADC_DIG_CON04(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x10) argument
30 #define RK3308_ADC_DIG_CON05(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x14) // ver.C only argument
31 #define RK3308_ADC_DIG_CON06(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x18) // ver.C only argument
32 #define RK3308_ADC_DIG_CON07(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x1c) argument
34 #define RK3308_ALC_L_DIG_CON00(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x40) argument
35 #define RK3308_ALC_L_DIG_CON01(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x44) argument
[all …]
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| H A D | idt821034.c | 39 } ch[IDT821034_NB_CHANNEL];
45 } ch[IDT821034_NB_CHANNEL];
120 static int idt821034_set_channel_power(struct idt821034 *idt821034, u8 ch, u8 power) in idt821034_set_channel_power()
125 dev_dbg(&idt821034->spi->dev, "set_channel_power(%u, 0x%x)\n", ch, power); in idt821034_set_channel_power()
127 conf = IDT821034_MODE_CODEC(ch) | idt821034->cache.codec_conf; in idt821034_set_channel_power()
132 idt821034->cache.ch[ch].rx_slot); in idt821034_set_channel_power()
139 idt821034->cache.ch[ch].tx_slot); in idt821034_set_channel_power()
149 idt821034->cache.ch[c in idt821034_set_channel_power()
38 } ch[IDT821034_NB_CHANNEL]; global() member
44 } ch[IDT821034_NB_CHANNEL]; global() member
119 idt821034_set_channel_power(struct idt821034 * idt821034,u8 ch,u8 power) idt821034_set_channel_power() argument
153 idt821034_get_channel_power(struct idt821034 * idt821034,u8 ch) idt821034_get_channel_power() argument
208 idt821034_set_channel_ts(struct idt821034 * idt821034,u8 ch,u8 ch_dir,u8 ts_num) idt821034_set_channel_ts() argument
245 idt821034_set_slic_conf(struct idt821034 * idt821034,u8 ch,u8 slic_dir) idt821034_set_slic_conf() argument
262 idt821034_get_slic_conf(struct idt821034 * idt821034,u8 ch) idt821034_get_slic_conf() argument
267 idt821034_write_slic_raw(struct idt821034 * idt821034,u8 ch,u8 slic_raw) idt821034_write_slic_raw() argument
292 idt821034_get_written_slic_raw(struct idt821034 * idt821034,u8 ch) idt821034_get_written_slic_raw() argument
297 idt821034_read_slic_raw(struct idt821034 * idt821034,u8 ch,u8 * slic_raw) idt821034_read_slic_raw() argument
332 idt821034_set_gain_channel(struct idt821034 * idt821034,u8 ch,u8 gain_type,u16 gain_val) idt821034_set_gain_channel() argument
412 u8 ch; idt821034_kctrl_gain_get() local
446 u8 ch; idt821034_kctrl_gain_put() local
494 u8 ch; idt821034_kctrl_mute_get() local
519 u8 ch; idt821034_kctrl_mute_put() local
627 u8 ch; idt821034_power_event() local
704 u8 ch; idt821034_dai_set_tdm_slot() local
963 u8 ch = IDT821034_GPIO_OFFSET_TO_SLIC_CHANNEL(offset); idt821034_chip_gpio_set() local
989 u8 ch = IDT821034_GPIO_OFFSET_TO_SLIC_CHANNEL(offset); idt821034_chip_gpio_get() local
1014 u8 ch = IDT821034_GPIO_OFFSET_TO_SLIC_CHANNEL(offset); idt821034_chip_get_direction() local
1028 u8 ch = IDT821034_GPIO_OFFSET_TO_SLIC_CHANNEL(offset); idt821034_chip_direction_input() local
1054 u8 ch = IDT821034_GPIO_OFFSET_TO_SLIC_CHANNEL(offset); idt821034_chip_direction_output() local
[all...] |
| /linux/drivers/mailbox/ |
| H A D | mtk-gpueb-mailbox.c | 38 struct mtk_gpueb_mbox_chan *ch; member
94 struct mtk_gpueb_mbox_chan *ch = data; in mtk_gpueb_mbox_isr() local
97 rx_sts = readl(ch->ebm->mbox_ctl + GPUEB_MBOX_CTL_RX_STS); in mtk_gpueb_mbox_isr()
99 if (rx_sts & BIT(ch->num)) { in mtk_gpueb_mbox_isr()
100 if (!atomic_cmpxchg(&ch->rx_status, 0, GPUEB_MBOX_FULL | GPUEB_MBOX_BLOCKED)) in mtk_gpueb_mbox_isr()
109 struct mtk_gpueb_mbox_chan *ch = data; in mtk_gpueb_mbox_thread() local
112 status = atomic_cmpxchg(&ch->rx_status, GPUEB_MBOX_FULL | GPUEB_MBOX_BLOCKED, in mtk_gpueb_mbox_thread()
117 mtk_gpueb_mbox_read_rx(buf, ch); in mtk_gpueb_mbox_thread()
118 writel(BIT(ch->num), ch->ebm->mbox_ctl + GPUEB_MBOX_CTL_IRQ_CLR); in mtk_gpueb_mbox_thread()
119 mbox_chan_received_data(&ch->ebm->mbox.chans[ch->num], buf); in mtk_gpueb_mbox_thread()
[all …]
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| /linux/drivers/phy/renesas/ |
| H A D | phy-rcar-gen3-usb2.c | 126 struct rcar_gen3_chan *ch; member
171 struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan, in rcar_gen3_phy_usb2_work() local
174 if (ch->extcon_host) { in rcar_gen3_phy_usb2_work()
175 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true); in rcar_gen3_phy_usb2_work()
176 extcon_set_state_sync(ch->extcon, EXTCON_USB, false); in rcar_gen3_phy_usb2_work()
178 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false); in rcar_gen3_phy_usb2_work()
179 extcon_set_state_sync(ch->extcon, EXTCON_USB, true); in rcar_gen3_phy_usb2_work()
183 static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host) in rcar_gen3_set_host_mode() argument
185 void __iomem *usb2_base = ch->base; in rcar_gen3_set_host_mode()
188 dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host); in rcar_gen3_set_host_mode()
[all …]
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| /linux/arch/sparc/include/asm/ |
| H A D | chafsr.h | 9 * ch --> cheetah
10 * ch+ --> cheetah plus
26 #define CHPAFSR_DTO (1UL << 59UL) /* ch+ */
31 #define CHPAFSR_DBERR (1UL << 58UL) /* ch+ */
34 #define CHPAFSR_THCE (1UL << 57UL) /* ch+ */
39 #define CHPAFSR_TSCE (1UL << 56UL) /* ch+ */
44 #define CHPAFSR_TUE (1UL << 55UL) /* ch+ */
51 #define CHPAFSR_DUE (1UL << 54UL) /* ch+ */
69 #define CHAFSR_ME (1UL << 53UL) /* ch,ch+,jp */
74 #define CHAFSR_PRIV (1UL << 52UL) /* ch,ch+,jp */
[all …]
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| /linux/drivers/tty/serial/jsm/ |
| H A D | jsm_tty.c | 25 static void jsm_carrier(struct jsm_channel *ch);
27 static inline int jsm_get_mstat(struct jsm_channel *ch) in jsm_get_mstat() argument
32 jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "start\n"); in jsm_get_mstat()
34 mstat = (ch->ch_mostat | ch->ch_mistat); in jsm_get_mstat()
51 jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "finish\n"); in jsm_get_mstat()
148 static void jsm_tty_send_xchar(struct uart_port *port, char ch) in jsm_tty_send_xchar() argument
157 if (ch == termios->c_cc[VSTART]) in jsm_tty_send_xchar()
160 if (ch == termios->c_cc[VSTOP]) in jsm_tty_send_xchar()
370 struct jsm_channel *ch; in jsm_tty_init() local
403 ch = brd->channels[0]; in jsm_tty_init()
[all …]
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| /linux/drivers/dma/dw-edma/ |
| H A D | dw-hdma-v0-debugfs.c | 28 __ch_regs = REGS_ADDR(dw, ch[_ch].rd); \
30 __ch_regs = REGS_ADDR(dw, ch[_ch].wr); \
35 #define CTX_REGISTER(dw, name, dir, ch) \ argument
36 {#name, REGS_CH_ADDR(dw, name, dir, ch)}
80 u16 ch, struct dentry *dent) in dw_hdma_debugfs_regs_ch() argument
83 CTX_REGISTER(dw, ch_en, dir, ch), in dw_hdma_debugfs_regs_ch()
84 CTX_REGISTER(dw, doorbell, dir, ch), in dw_hdma_debugfs_regs_ch()
85 CTX_REGISTER(dw, prefetch, dir, ch), in dw_hdma_debugfs_regs_ch()
86 CTX_REGISTER(dw, handshake, dir, ch), in dw_hdma_debugfs_regs_ch()
87 CTX_REGISTER(dw, llp.lsb, dir, ch), in dw_hdma_debugfs_regs_ch()
[all …]
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| /linux/drivers/mfd/ |
| H A D | rz-mtu3.c | 63 u16 rz_mtu3_shared_reg_read(struct rz_mtu3_channel *ch, u16 offset) in rz_mtu3_shared_reg_read() argument
65 struct rz_mtu3 *mtu = dev_get_drvdata(ch->dev->parent); in rz_mtu3_shared_reg_read()
75 u8 rz_mtu3_8bit_ch_read(struct rz_mtu3_channel *ch, u16 offset) in rz_mtu3_8bit_ch_read() argument
77 struct rz_mtu3 *mtu = dev_get_drvdata(ch->dev->parent); in rz_mtu3_8bit_ch_read()
81 ch_offs = rz_mtu3_8bit_ch_reg_offs[ch->channel_number][offset]; in rz_mtu3_8bit_ch_read()
87 u16 rz_mtu3_16bit_ch_read(struct rz_mtu3_channel *ch, u16 offset) in rz_mtu3_16bit_ch_read() argument
89 struct rz_mtu3 *mtu = dev_get_drvdata(ch->dev->parent); in rz_mtu3_16bit_ch_read()
94 if (ch->channel_number == RZ_MTU3_CHAN_8) in rz_mtu3_16bit_ch_read()
97 ch_offs = rz_mtu3_16bit_ch_reg_offs[ch->channel_number][offset]; in rz_mtu3_16bit_ch_read()
103 u32 rz_mtu3_32bit_ch_read(struct rz_mtu3_channel *ch, u16 offset) in rz_mtu3_32bit_ch_read() argument
[all …]
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| /linux/drivers/media/platform/ti/davinci/ |
| H A D | vpif_display.c | 54 static void vpif_calculate_offsets(struct channel_obj *ch);
55 static void vpif_config_addr(struct channel_obj *ch, int muxmode);
74 struct channel_obj *ch = vb2_get_drv_priv(vb->vb2_queue); in vpif_buffer_prepare() local
77 common = &ch->common[VPIF_VIDEO_INDEX]; in vpif_buffer_prepare()
115 struct channel_obj *ch = vb2_get_drv_priv(vq); in vpif_buffer_queue_setup() local
116 struct common_obj *common = &ch->common[VPIF_VIDEO_INDEX]; in vpif_buffer_queue_setup()
133 vpif_calculate_offsets(ch); in vpif_buffer_queue_setup()
148 struct channel_obj *ch = vb2_get_drv_priv(vb->vb2_queue); in vpif_buffer_queue() local
152 common = &ch->common[VPIF_VIDEO_INDEX]; in vpif_buffer_queue()
169 struct channel_obj *ch = vb2_get_drv_priv(vq); in vpif_start_streaming() local
[all …]
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| /linux/drivers/clk/berlin/ |
| H A D | berlin2-avpll.c | 214 struct berlin2_avpll_channel *ch = to_avpll_channel(hw); in berlin2_avpll_channel_is_enabled() local
217 if (ch->index == 7) in berlin2_avpll_channel_is_enabled()
220 reg = readl_relaxed(ch->base + VCO_CTRL10); in berlin2_avpll_channel_is_enabled()
221 reg &= VCO_POWERUP_CH1 << ch->index; in berlin2_avpll_channel_is_enabled()
228 struct berlin2_avpll_channel *ch = to_avpll_channel(hw); in berlin2_avpll_channel_enable() local
231 reg = readl_relaxed(ch->base + VCO_CTRL10); in berlin2_avpll_channel_enable()
232 reg |= VCO_POWERUP_CH1 << ch->index; in berlin2_avpll_channel_enable()
233 writel_relaxed(reg, ch->base + VCO_CTRL10); in berlin2_avpll_channel_enable()
240 struct berlin2_avpll_channel *ch = to_avpll_channel(hw); in berlin2_avpll_channel_disable() local
243 reg = readl_relaxed(ch->base + VCO_CTRL10); in berlin2_avpll_channel_disable()
[all …]
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| /linux/drivers/net/ethernet/freescale/dpaa2/ |
| H A D | dpaa2-xsk.c | 13 struct dpaa2_eth_channel *ch, in dpaa2_eth_setup_consume_func() argument
25 if (fq->channel != ch) in dpaa2_eth_setup_consume_func()
33 struct dpaa2_eth_channel *ch, in dpaa2_xsk_run_xdp() argument
44 xdp_prog = READ_ONCE(ch->xdp.prog); in dpaa2_xsk_run_xdp()
49 ch->xsk_pool->umem->headroom); in dpaa2_xsk_run_xdp()
56 xdp_buff->rxq = &ch->xdp_rxq; in dpaa2_xsk_run_xdp()
68 ch->stats.xdp_drop++; in dpaa2_xsk_run_xdp()
69 dpaa2_eth_recycle_buf(priv, ch, addr); in dpaa2_xsk_run_xdp()
71 ch->buf_count--; in dpaa2_xsk_run_xdp()
72 ch->stats.xdp_redirect++; in dpaa2_xsk_run_xdp()
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| /linux/drivers/pwm/ |
| H A D | pwm-rzg2l-gpt.c | 37 #define RZG2L_GET_CH_OFFS(ch) (0x100 * (ch)) argument
39 #define RZG2L_GTCR(ch) (0x2c + RZG2L_GET_CH_OFFS(ch)) argument
40 #define RZG2L_GTUDDTYC(ch) (0x30 + RZG2L_GET_CH_OFFS(ch)) argument
41 #define RZG2L_GTIOR(ch) (0x34 + RZG2L_GET_CH_OFFS(ch)) argument
42 #define RZG2L_GTBER(ch) (0x40 + RZG2L_GET_CH_OFFS(ch)) argument
43 #define RZG2L_GTCNT(ch) (0x48 + RZG2L_GET_CH_OFFS(ch)) argument
44 #define RZG2L_GTCCR(ch, sub_ch) (0x4c + RZG2L_GET_CH_OFFS(ch) + 4 * (sub_ch)) argument
45 #define RZG2L_GTPR(ch) (0x64 + RZG2L_GET_CH_OFFS(ch)) argument
138 u32 ch = RZG2L_GET_CH(pwm->hwpwm); in rzg2l_gpt_request() local
141 rzg2l_gpt->channel_request_count[ch]++; in rzg2l_gpt_request()
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| /linux/sound/isa/sb/ |
| H A D | emu8000_pcm.c | 171 static inline int emu8k_get_curpos(struct snd_emu8k_pcm *rec, int ch) in emu8k_get_curpos() argument
173 int val = EMU8000_CCCA_READ(rec->emu, ch) & 0xfffffff; in emu8k_get_curpos()
174 val -= rec->loop_start[ch] - 1; in emu8k_get_curpos()
271 static void setup_voice(struct snd_emu8k_pcm *rec, int ch) in setup_voice() argument
277 EMU8000_DCYSUSV_WRITE(hw, ch, 0x0080); in setup_voice()
278 EMU8000_VTFT_WRITE(hw, ch, 0x0000FFFF); in setup_voice()
279 EMU8000_CVCF_WRITE(hw, ch, 0x0000FFFF); in setup_voice()
280 EMU8000_PTRX_WRITE(hw, ch, 0); in setup_voice()
281 EMU8000_CPF_WRITE(hw, ch, 0); in setup_voice()
284 EMU8000_IP_WRITE(hw, ch, rec->pitch); in setup_voice()
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| H A D | emu8000_callback.c | 22 static void reset_voice(struct snd_emux *emu, int ch);
39 static void snd_emu8000_tweak_voice(struct snd_emu8000 *emu, int ch);
90 EMU8000_DCYSUS_WRITE(hw, vp->ch, dcysusv); in release_voice()
92 EMU8000_DCYSUSV_WRITE(hw, vp->ch, dcysusv); in release_voice()
104 EMU8000_DCYSUSV_WRITE(hw, vp->ch, 0x807F); in terminate_voice()
140 * The channel index (vp->ch) must be initialized in this routine.
183 val = (EMU8000_CVCF_READ(hw, vp->ch) >> 16) & 0xffff; in get_voice()
195 val = EMU8000_CCCA_READ(hw, vp->ch) & 0xffffff; in get_voice()
209 vp->ch = best[i].voice; in get_voice()
224 int ch; in start_voice() local
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| /linux/drivers/gpu/host1x/hw/ |
| H A D | debug_hw_1x06.c | 15 struct host1x_channel *ch, in host1x_debug_show_channel_cdma() argument
18 struct host1x_cdma *cdma = &ch->cdma; in host1x_debug_show_channel_cdma()
25 dmastart = host1x_ch_readl(ch, HOST1X_CHANNEL_DMASTART_HI); in host1x_debug_show_channel_cdma()
28 dmastart |= host1x_ch_readl(ch, HOST1X_CHANNEL_DMASTART); in host1x_debug_show_channel_cdma()
31 dmaend = host1x_ch_readl(ch, HOST1X_CHANNEL_DMAEND_HI); in host1x_debug_show_channel_cdma()
34 dmaend |= host1x_ch_readl(ch, HOST1X_CHANNEL_DMAEND); in host1x_debug_show_channel_cdma()
36 dmaput = host1x_ch_readl(ch, HOST1X_CHANNEL_DMAPUT); in host1x_debug_show_channel_cdma()
37 dmaget = host1x_ch_readl(ch, HOST1X_CHANNEL_DMAGET); in host1x_debug_show_channel_cdma()
38 dmactrl = host1x_ch_readl(ch, HOST1X_CHANNEL_DMACTRL); in host1x_debug_show_channel_cdma()
39 offset = host1x_ch_readl(ch, HOST1X_CHANNEL_CMDP_OFFSET); in host1x_debug_show_channel_cdma()
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