| /freebsd/sys/dev/usb/controller/ |
| H A D | usb_controller.c | 40 #include <sys/bus.h>
153 usb_root_mount_rel(struct usb_bus *bus) in usb_root_mount_rel() argument
155 if (bus->bus_roothold != NULL) { in usb_root_mount_rel()
156 DPRINTF("Releasing root mount hold %p\n", bus->bus_roothold); in usb_root_mount_rel()
157 root_mount_rel(bus->bus_roothold); in usb_root_mount_rel()
158 bus->bus_roothold = NULL; in usb_root_mount_rel()
169 struct usb_bus *bus = device_get_ivars(dev); in usb_attach() local
173 if (bus == NULL) { in usb_attach()
180 /* delay vfs_mountroot until the bus is explored */ in usb_attach()
181 bus->bus_roothold = root_mount_hold(device_get_nameunit(dev)); in usb_attach()
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| /freebsd/sys/dev/ppbus/ |
| H A D | ppb_1284.c | 42 #include <sys/bus.h>
59 do_1284_wait(device_t bus, uint8_t mask, uint8_t status) in do_1284_wait() argument
61 return (ppb_poll_bus(bus, 4, mask, status, PPB_NOINTR | PPB_POLL)); in do_1284_wait()
65 do_peripheral_wait(device_t bus, uint8_t mask, uint8_t status) in do_peripheral_wait() argument
67 return (ppb_poll_bus(bus, 100, mask, status, PPB_NOINTR | PPB_POLL)); in do_peripheral_wait()
78 ppb_1284_reset_error(device_t bus, int state) in ppb_1284_reset_error() argument
80 struct ppb_data *ppb = DEVTOSOFTC(bus); in ppb_1284_reset_error()
94 ppb_1284_get_state(device_t bus) in ppb_1284_get_state() argument
96 struct ppb_data *ppb = DEVTOSOFTC(bus); in ppb_1284_get_state()
108 ppb_1284_set_state(device_t bus, int state) in ppb_1284_set_state() argument
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| H A D | ppb_base.c | 35 #include <sys/bus.h>
50 * Polls the bus
55 ppb_poll_bus(device_t bus, int max, in ppb_poll_bus() argument
58 struct ppb_data *ppb = DEVTOSOFTC(bus); in ppb_poll_bus()
62 ppb_assert_locked(bus); in ppb_poll_bus()
67 r = ppb_rstr(bus); in ppb_poll_bus()
76 if ((ppb_rstr(bus) & mask) == status) in ppb_poll_bus()
80 error = mtx_sleep((caddr_t)bus, ppb->ppc_lock, PPBPRI | in ppb_poll_bus()
96 ppb_get_epp_protocol(device_t bus) in ppb_get_epp_protocol() argument
100 ppb_assert_locked(bus); in ppb_get_epp_protocol()
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| H A D | ppbconf.c | 40 #include <sys/bus.h>
53 static MALLOC_DEFINE(M_PPBUSDEV, "ppbusdev", "Parallel Port bus device");
62 ppbus_print_child(device_t bus, device_t dev) in ppbus_print_child() argument
67 retval = bus_print_child_header(bus, dev); in ppbus_print_child()
74 retval += bus_print_child_footer(bus, dev); in ppbus_print_child()
82 device_set_desc(dev, "Parallel port bus"); in ppbus_probe()
107 /* add the device as a child to the ppbus bus with the allocated in ppbus_add_child()
116 ppbus_read_ivar(device_t bus, device_t dev, int index, uintptr_t* val) in ppbus_read_ivar() argument
122 *val = (u_long)ppb_get_mode(bus); in ppbus_read_ivar()
132 ppbus_write_ivar(device_t bus, device_t dev, int index, uintptr_t val) in ppbus_write_ivar() argument
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| /titanic_41/usr/src/uts/intel/io/pci/ |
| H A D | pci_boot.c | 88 uint8_t bus; member
119 static void enumerate_bus_devs(uchar_t bus, int config_op);
120 static void create_root_bus_dip(uchar_t bus);
133 static int get_pci_cap(uchar_t bus, uchar_t dev, uchar_t func, uint8_t cap_id);
136 static void create_ioapic_node(int bus, int dev, int fn, ushort_t vendorid,
139 static void populate_bus_res(uchar_t bus);
155 /* set non-zero to force PCI peer-bus renumbering */
199 * If not a PCI root-bus, ignore this device and continue in pci_process_acpi_device()
222 * bus 0 _BBNs being found, so we need to handle duplicate in pci_process_acpi_device()
223 * bus 0 gracefully. However, broken _BBN does not in pci_process_acpi_device()
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| H A D | pci_resource.c | 27 * pci_resource.c -- routines to retrieve available bus resources from
77 find_bus_res(int bus, int type) in find_bus_res() argument
88 if (acpi_find_bus_res(bus, type, &res) > 0) in find_bus_res()
91 if (hrt_find_bus_res(bus, type, &res) > 0) in find_bus_res()
94 (void) mps_find_bus_res(bus, type, &res); in find_bus_res()
104 int bus; in acpi_pci_probe() local
109 for (bus = 0; bus <= pci_bios_maxbus; bus++) { in acpi_pci_probe()
111 dip = pci_bus_res[bus].dip; in acpi_pci_probe()
117 (void *)(uintptr_t)bus); in acpi_pci_probe()
127 * Trim overlapping bus ranges in acpi_bus_res[]
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| /titanic_41/usr/src/cmd/fm/dicts/ |
| H A D | SUN4U.dict | 67 fault.io.datapath fault.io.pci.bus=38
68 defect.io.pci.driver fault.io.datapath fault.io.pci.bus=39
71 fault.io.datapath fault.io.pci.bus fault.io.pci.device=42
72 defect.io.pci.driver fault.io.datapath fault.io.pci.bus fault.io.pci.device=43
75 fault.io.hbus fault.io.pci.bus=46
76 defect.io.pci.driver fault.io.hbus fault.io.pci.bus=47
79 fault.io.hbus fault.io.pci.bus fault.io.pci.device=50
80 defect.io.pci.driver fault.io.hbus fault.io.pci.bus fault.io.pci.device=51
83 fault.io.datapath fault.io.hbus fault.io.pci.bus=54
84 defect.io.pci.driver fault.io.datapath fault.io.hbus fault.io.pci.bus=55
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| /freebsd/sys/dev/iicbus/ |
| H A D | iiconf.c | 35 #include <sys/bus.h>
44 * system errno value later. This lets controller- and bus-layer code get
94 iicbus_intr(device_t bus, int event, char *buf) in iicbus_intr() argument
96 struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus); in iicbus_intr()
135 iicbus_request_bus(device_t bus, device_t dev, int how) in iicbus_request_bus() argument
138 struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus); in iicbus_request_bus()
157 * Mark the device busy while it owns the bus, to in iicbus_request_bus()
158 * prevent detaching the device, bus, or hardware in iicbus_request_bus()
161 * attaching, it cannot be busied; mark the bus busy. in iicbus_request_bus()
164 sc->busydev = bus; in iicbus_request_bus()
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| /freebsd/sys/contrib/device-tree/src/arm/aspeed/ |
| H A D | ibm-power9-dual.dtsi | 22 cfam0_i2c0: i2c-bus@0 {
26 cfam0_i2c1: i2c-bus@1 {
30 cfam0_i2c2: i2c-bus@2 {
34 cfam0_i2c3: i2c-bus@3 {
38 cfam0_i2c4: i2c-bus@4 {
42 cfam0_i2c5: i2c-bus@5 {
46 cfam0_i2c6: i2c-bus@6 {
50 cfam0_i2c7: i2c-bus@7 {
54 cfam0_i2c8: i2c-bus@8 {
58 cfam0_i2c9: i2c-bus@9 {
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| /titanic_41/usr/src/cmd/devctl/ |
| H A D | devctl.c | 32 * usage: devctl [-v] command [device/bus pathname]
39 * quiesce - quiesce the bus
40 * unquiesce - resume bus activity
41 * configure - configure a bus's child devices
42 * unconfigure - unconfigure a bus's child devices
43 * bus-reset - reset a bus
45 * bus-getstate - return the current state of the bus
47 * bus-devcreate - create a new device, bus specific
61 * bus-raisepower - power up a bus via pm_raise_power() (pm)
62 * bus-idlecomp - idle a bus' component (pm)
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| /freebsd/sys/dev/ofw/ |
| H A D | ofw_bus_if.m | 29 # properties of a device on an Open Firmware assisted bus for use
32 # as they are expected to be only of interest in the respective bus
35 #include <sys/bus.h>
62 ofw_bus_default_get_devinfo(device_t bus, device_t dev)
69 ofw_bus_default_get_compat(device_t bus, device_t dev)
76 ofw_bus_default_get_model(device_t bus, device_t dev)
83 ofw_bus_default_get_name(device_t bus, device_t dev)
90 ofw_bus_default_get_node(device_t bus, device_t dev)
97 ofw_bus_default_get_type(device_t bus, device_t dev)
104 ofw_bus_default_map_intr(device_t bus, device_t dev, phandle_t iparent,
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| /freebsd/sys/contrib/device-tree/Bindings/interconnect/ |
| H A D | samsung,exynos-bus.yaml | 4 $id: http://devicetree.org/schemas/interconnect/samsung,exynos-bus.yaml#
7 title: Samsung Exynos SoC Bus and Interconnect
16 Generally, each bus of Exynos SoC includes a source clock and a power line,
17 which are able to change the clock frequency of the bus in runtime. To
18 monitor the usage of each bus in runtime, the driver uses the PPMU (Platform
22 The Exynos SoC includes the various sub-blocks which have the each AXI bus.
23 The each AXI bus has the owned source clock but, has not the only owned power
26 type of bus devices as following::
27 - parent bus device
28 - passive bus device
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| /freebsd/lib/libpmc/pmu-events/arch/x86/bonnell/ |
| H A D | other.json | 3 "BriefDescription": "Bus queue is empty.",
11 "BriefDescription": "Number of Bus Not Ready signals asserted.",
19 "BriefDescription": "Number of Bus Not Ready signals asserted.",
27 "BriefDescription": "Bus cycles while processor receives data.",
35 "BriefDescription": "Bus cycles when data is sent on the bus.",
43 "BriefDescription": "Bus cycles when data is sent on the bus.",
83 "BriefDescription": "IO requests waiting in the bus queue.",
91 "BriefDescription": "Bus cycles when a LOCK signal is asserted.",
99 "BriefDescription": "Bus cycles when a LOCK signal is asserted.",
107 "BriefDescription": "Outstanding cacheable data read bus requests duration.",
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| /freebsd/sys/contrib/edk2/Include/Protocol/ |
| H A D | PciHotPlugRequest.h | 2 Provides services to notify the PCI bus driver that some events have happened
4 PCI bus driver to create or destroy handles for PCI-like devices.
6 A hot-plug capable PCI bus driver should produce the EFI PCI Hot Plug Request
8 is installed after PCI bus does the enumeration, the PCI bus driver can be
10 into the PC Card socket, the PC Card bus driver can call interface of this
11 protocol to notify PCI bus driver to allocate resource and create handles for
14 The EFI_PCI_HOTPLUG_REQUEST_PROTOCOL is installed by the PCI bus driver on a
15 separate handle when PCI bus driver starts up. There is only one instance in
18 for example, PC Card Bus driver, to notify PCI bus driver that an event has
19 happened in the hot-plug controller, and the PCI bus driver is requested to
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| /titanic_41/usr/src/uts/i86pc/sys/ |
| H A D | pci_cfgspace_impl.h | 41 extern uint8_t pci_mech1_getb(int bus, int dev, int func, int reg);
42 extern uint16_t pci_mech1_getw(int bus, int dev, int func, int reg);
43 extern uint32_t pci_mech1_getl(int bus, int dev, int func, int reg);
44 extern void pci_mech1_putb(int bus, int dev, int func, int reg, uint8_t val);
45 extern void pci_mech1_putw(int bus, int dev, int func, int reg, uint16_t val);
46 extern void pci_mech1_putl(int bus, int dev, int func, int reg, uint32_t val);
52 extern uint8_t pci_mech1_amd_getb(int bus, int dev, int func, int reg);
53 extern uint16_t pci_mech1_amd_getw(int bus, int dev, int func, int reg);
54 extern uint32_t pci_mech1_amd_getl(int bus, int dev, int func, int reg);
55 extern void pci_mech1_amd_putb(int bus, int dev, int func, int reg,
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| /freebsd/sys/contrib/device-tree/Bindings/devfreq/ |
| H A D | exynos-bus.txt | 1 * Generic Exynos Bus frequency device
5 for buses. Generally, each bus of Exynos SoC includes a source clock
7 of the bus in runtime. To monitor the usage of each bus in runtime,
11 The Exynos SoC includes the various sub-blocks which have the each AXI bus.
12 The each AXI bus has the owned source clock but, has not the only owned
15 There are two type of bus devices as following:
16 - parent bus device
17 - passive bus device
19 Basically, parent and passive bus device share the same power line.
20 The parent bus device can only change the voltage of shared power line
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| /freebsd/sys/amd64/pci/ |
| H A D | pci_cfgreg.c | 33 #include <sys/bus.h>
52 static uint32_t pci_docfgregread(int domain, int bus, int slot, int func,
54 static struct pcie_mcfg_region *pcie_lookup_region(int domain, int bus);
55 static int pciereg_cfgread(struct pcie_mcfg_region *region, int bus,
57 static void pciereg_cfgwrite(struct pcie_mcfg_region *region, int bus,
60 static int pcireg_cfgread(int bus, int slot, int func, int reg, int bytes);
61 static void pcireg_cfgwrite(int bus, int slot, int func, int reg, int data, int bytes);
90 pcie_lookup_region(int domain, int bus) in pcie_lookup_region() argument
94 bus >= mcfg_regions[i].minbus && in pcie_lookup_region()
95 bus <= mcfg_regions[i].maxbus) in pcie_lookup_region()
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| /freebsd/sys/contrib/device-tree/Bindings/bus/ |
| H A D | simple-pm-bus.yaml | 4 $id: http://devicetree.org/schemas/bus/simple-pm-bus.yaml#
7 title: Simple Power-Managed Bus
13 A Simple Power-Managed Bus is a transparent bus that doesn't need a real
16 However, its bus controller is part of a PM domain, or under the control
17 of a functional clock. Hence, the bus controller's PM domain and/or
18 clock must be enabled for child devices connected to the bus (either
21 While "simple-pm-bus" follows the "simple-bus" set of properties, as
23 "simple-bus".
27 pattern: "^bus(@[0-9a-f]+)?$"
31 const: simple-pm-bus
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| /freebsd/share/man/man9/ |
| H A D | bus_space.9 | 143 .Nd "bus space manipulation functions"
627 machine-independent access to bus memory and register areas.
648 object file to manipulate a set of devices on multiple bus types on a
653 supported by the bus.
670 Bus spaces are described by bus space tags, which can be created only by
673 of bus space (e.g.\& memory space and I/O space), and thus may provide
674 multiple different bus space tags.
675 Individual buses or devices on a machine may use more than one bus space
681 space, for instance because of multiple different host bus interface
684 A range in bus space is described by a bus address and a bus size.
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| /freebsd/sys/dev/smbus/ |
| H A D | smbconf.h | 56 * SMB bus errors
97 #define smbus_quick(bus,slave,how) \ argument
98 (SMBUS_QUICK(device_get_parent(bus), slave, how))
99 #define smbus_sendb(bus,slave,byte) \ argument
100 (SMBUS_SENDB(device_get_parent(bus), slave, byte))
101 #define smbus_recvb(bus,slave,byte) \ argument
102 (SMBUS_RECVB(device_get_parent(bus), slave, byte))
103 #define smbus_writeb(bus,slave,cmd,byte) \ argument
104 (SMBUS_WRITEB(device_get_parent(bus), slave, cmd, byte))
105 #define smbus_writew(bus,slave,cmd,word) \ argument
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| /freebsd/sys/x86/pci/ |
| H A D | pci_bus.c | 34 #include <sys/bus.h>
63 legacy_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func, in legacy_pcib_read_config() argument
66 return(pci_cfgregread(0, bus, slot, func, reg, bytes)); in legacy_pcib_read_config()
72 legacy_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func, in legacy_pcib_write_config() argument
75 pci_cfgregwrite(0, bus, slot, func, reg, data, bytes); in legacy_pcib_write_config()
99 device_t bus; in legacy_pcib_alloc_msi() local
101 bus = device_get_parent(pcib); in legacy_pcib_alloc_msi()
102 return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount, in legacy_pcib_alloc_msi()
109 device_t bus; in legacy_pcib_alloc_msix() local
111 bus = device_get_parent(pcib); in legacy_pcib_alloc_msix()
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| H A D | qpi.c | 31 * This driver provides a pseudo-bus to enumerate the PCI buses
32 * present on a system using a QPI chipset. It creates a qpi0 bus that
38 #include <sys/bus.h>
82 /* Add a qpi bus device. */ in qpi_identify()
84 panic("Failed to add qpi bus"); in qpi_identify()
91 device_set_desc(dev, "QPI system bus"); in qpi_probe()
96 * Look for a PCI bus with the specified bus address. If one is found,
100 qpi_probe_pcib(device_t dev, int bus) in qpi_probe_pcib() argument
108 * If a PCI bus already exists for this bus number, then in qpi_probe_pcib()
111 if (pci_find_bsf(bus, 0, 0) != NULL) in qpi_probe_pcib()
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| /freebsd/sys/dev/mdio/ |
| H A D | mdio_if.m | 2 #include <sys/bus.h>
29 * @brief Read register from device on MDIO bus.
31 * @param dev MDIO bus device.
42 * @brief Read register from device on MDIO muxed bus.
44 * @param dev MDIO bus device.
45 * @param bus MDIO bus mux position
51 int bus;
57 * @brief Write register to device on MDIO bus.
59 * @param dev MDIO bus device.
72 * @brief Write register to device on MDIO muxed bus.
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| /titanic_41/usr/src/uts/intel/io/intel_nb5000/ |
| H A D | nb_pci_cfg.c | 52 reg.pci_phys_hi = 16 << PCI_REG_DEV_SHIFT; /* Bus=0, Dev=16, Func=0 */ in nb_pci_cfg_setup()
69 reg.pci_phys_hi = 17 << PCI_REG_DEV_SHIFT; /* Bus=0, Dev=17, Func=0 */ in nb_pci_cfg_setup()
81 reg.pci_phys_hi = 21 << PCI_REG_DEV_SHIFT; /* Bus=0, Dev=21, Func=0 */ in nb_pci_cfg_setup()
88 reg.pci_phys_hi = 22 << PCI_REG_DEV_SHIFT; /* Bus=0, Dev=22, Func=0 */ in nb_pci_cfg_setup()
95 reg.pci_phys_hi = 0; /* Bus=0, Dev=0, Func=0 */ in nb_pci_cfg_setup()
128 nb_get_hdl(int bus, int dev, int func) in nb_get_hdl() argument
132 if (bus == 0 && dev == 16 && func < NB_PCI_NFUNC) { in nb_get_hdl()
134 } else if (bus == 0 && dev == 17 && func < NB_PCI_NFUNC) { in nb_get_hdl()
136 } else if (bus == 0 && dev < NB_PCI_DEV && func == 0) { in nb_get_hdl()
138 } else if (bus == 0 && dev == 21 && func == 0) { in nb_get_hdl()
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| /freebsd/sys/xen/xenbus/ |
| H A D | xenbusb.h | 42 * bus attachements (e.g. frontend and backend device buses) for XenBus.
55 * \brief Container for all state needed to manage a Xenbus Bus
61 * XenStore where devices for this bus attachment arrive
86 * The number of children for this bus that are still
92 /** The NewBus device_t for this bus attachment. */
97 * bus attachment manages.
103 * character) that make up the device ID on this bus.
115 * count of its parent bus.
120 /** Instance variables for devices on a XenBus bus. */
185 * \brief Perform common XenBus bus attach processing.
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