Lines Matching full:bus
41 avs_hda_update_config_dword(struct hdac_bus *bus, u32 reg, u32 mask, u32 value)
43 struct pci_dev *pci = to_pci_dev(bus->dev);
59 static void avs_hdac_clock_gating_enable(struct hdac_bus *bus, bool enable)
63 avs_hda_update_config_dword(bus, AZX_PCIREG_CGCTL, cgctl_mask, value);
83 static int avs_hdac_bus_init_streams(struct hdac_bus *bus)
88 gcap = snd_hdac_chip_readw(bus, GCAP);
91 bus->num_streams = cp_streams + pb_streams;
93 snd_hdac_ext_stream_init_all(bus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE);
94 snd_hdac_ext_stream_init_all(bus, cp_streams, pb_streams, SNDRV_PCM_STREAM_PLAYBACK);
96 return snd_hdac_bus_alloc_stream_pages(bus);
99 static bool avs_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset)
104 avs_hdac_clock_gating_enable(bus, false);
105 ret = snd_hdac_bus_init_chip(bus, full_reset);
108 list_for_each_entry(hlink, &bus->hlink_list, list)
111 avs_hdac_clock_gating_enable(bus, true);
116 snd_hdac_chip_updatel(bus, VS_EM2, AZX_VS_EM2_DUM, AZX_VS_EM2_DUM);
121 static int probe_codec(struct hdac_bus *bus, int addr)
129 mutex_lock(&bus->cmd_mutex);
130 snd_hdac_bus_send_cmd(bus, cmd);
131 snd_hdac_bus_get_response(bus, addr, &res);
132 mutex_unlock(&bus->cmd_mutex);
136 dev_dbg(bus->dev, "codec #%d probed OK: 0x%x\n", addr, res);
138 codec = snd_hda_codec_device_init(to_hda_bus(bus), addr, "hdaudioB%dD%d", bus->idx, addr);
140 dev_err(bus->dev, "init codec failed: %ld\n", PTR_ERR(codec));
153 dev_warn(bus->dev, "failed to config codec #%d: %d\n", addr, ret);
160 static void avs_hdac_bus_probe_codecs(struct hdac_bus *bus)
166 if (!(bus->codec_mask & BIT(c)))
169 ret = probe_codec(bus, c);
178 dev_warn(bus->dev, "Codec #%d probe error; disabling it...\n", c);
179 bus->codec_mask &= ~BIT(c);
182 * codec often screws up the controller bus,
185 * better to reset the controller bus to get
188 snd_hdac_bus_stop_chip(bus);
189 avs_hdac_bus_init_chip(bus, true);
196 struct hdac_bus *bus = &adev->base.core;
200 pm_runtime_set_active(bus->dev); /* clear runtime_error flag */
202 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, true);
203 avs_hdac_bus_init_chip(bus, true);
204 avs_hdac_bus_probe_codecs(bus);
205 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
208 list_for_each_entry(hlink, &bus->hlink_list, list)
209 snd_hdac_ext_bus_link_put(bus, hlink);
211 snd_hdac_ext_bus_ppcap_enable(bus, true);
212 snd_hdac_ext_bus_ppcap_int_enable(bus, true);
224 pm_runtime_set_autosuspend_delay(bus->dev, 2000);
225 pm_runtime_use_autosuspend(bus->dev);
226 pm_runtime_mark_last_busy(bus->dev);
227 pm_runtime_put_autosuspend(bus->dev);
228 pm_runtime_allow(bus->dev);
247 static void hdac_update_stream(struct hdac_bus *bus, struct hdac_stream *stream)
259 static irqreturn_t avs_hda_interrupt(struct hdac_bus *bus)
264 status = snd_hdac_chip_readl(bus, INTSTS);
265 if (snd_hdac_bus_handle_stream_irq(bus, status, hdac_update_stream))
268 spin_lock_irq(&bus->reg_lock);
270 status = snd_hdac_chip_readb(bus, RIRBSTS);
273 snd_hdac_bus_update_rirb(bus);
274 snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK);
278 spin_unlock_irq(&bus->reg_lock);
284 struct hdac_bus *bus = dev_id;
287 intsts = snd_hdac_chip_readl(bus, INTSTS);
292 snd_hdac_chip_updatel(bus, INTCTL, AZX_INT_GLOBAL_EN, 0);
299 struct hdac_bus *bus = dev_id;
302 status = snd_hdac_chip_readl(bus, INTSTS);
304 avs_hda_interrupt(bus);
307 snd_hdac_chip_updatel(bus, INTCTL, AZX_INT_GLOBAL_EN, AZX_INT_GLOBAL_EN);
322 struct hdac_bus *bus = &adev->base.core;
325 status = readl(bus->ppcap + AZX_REG_PP_PPSTS);
330 snd_hdac_chip_updatel(bus, INTCTL, AZX_INT_GLOBAL_EN, AZX_INT_GLOBAL_EN);
337 struct hdac_bus *bus = &adev->base.core;
338 struct pci_dev *pci = to_pci_dev(bus->dev);
348 ret = pci_request_irq(pci, 0, avs_hda_irq_handler, avs_hda_irq_thread, bus,
365 pci_free_irq(pci, 0, bus);
373 struct hda_bus *bus = &adev->base;
378 ret = snd_hdac_ext_bus_init(&bus->core, dev, NULL, &soc_hda_ext_bus_ops);
382 bus->core.use_posbuf = 1;
383 bus->core.bdl_pos_adj = 0;
384 bus->core.sync_write = 1;
385 bus->pci = pci;
386 bus->mixer_assigned = -1;
387 mutex_init(&bus->prepare_mutex);
419 struct hdac_bus *bus;
443 dev_err(dev, "failed to init avs bus: %d\n", ret);
451 bus = &adev->base.core;
452 bus->addr = pci_resource_start(pci, 0);
453 bus->remap_addr = pci_ioremap_bar(pci, 0);
454 if (!bus->remap_addr) {
455 dev_err(bus->dev, "ioremap error\n");
462 dev_err(bus->dev, "ioremap error\n");
467 snd_hdac_bus_parse_capabilities(bus);
468 if (bus->mlcap)
469 snd_hdac_ext_bus_get_ml_capabilities(bus);
475 ret = avs_hdac_bus_init_streams(bus);
483 dev_err(bus->dev, "failed to acquire irq: %d\n", ret);
488 pci_set_drvdata(pci, bus);
491 ret = snd_hdac_i915_init(bus);
495 dev_info(bus->dev, "i915 init unsuccessful: %d\n", ret);
503 pci_free_irq(pci, 0, bus);
508 snd_hdac_bus_free_stream_pages(bus);
509 snd_hdac_ext_stream_free_all(bus);
513 iounmap(bus->remap_addr);
521 struct hdac_bus *bus = pci_get_drvdata(pci);
522 struct avs_dev *adev = hdac_to_avs(bus);
527 snd_hdac_stop_streams(bus);
529 snd_hdac_ext_bus_ppcap_int_enable(bus, false);
530 snd_hdac_ext_bus_link_power_down_all(bus);
532 snd_hdac_bus_stop_chip(bus);
533 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
536 pci_free_irq(pci, 0, bus);
543 struct hdac_bus *bus = pci_get_drvdata(pci);
544 struct avs_dev *adev = hdac_to_avs(bus);
557 snd_hdac_stop_streams_and_chip(bus);
559 snd_hdac_ext_bus_ppcap_int_enable(bus, false);
562 list_for_each_entry_safe(hdev, save, &bus->codec_list, list)
565 snd_hdac_bus_free_stream_pages(bus);
566 snd_hdac_ext_stream_free_all(bus);
568 snd_hdac_ext_link_free_all(bus);
569 snd_hdac_ext_bus_exit(bus);
572 snd_hdac_ext_bus_ppcap_enable(bus, false);
575 snd_hdac_bus_stop_chip(bus);
576 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
577 if (bus->audio_component)
578 snd_hdac_i915_exit(bus);
582 pci_free_irq(pci, 0, bus);
584 iounmap(bus->remap_addr);
600 struct hdac_bus *bus = &adev->base.core;
603 if (bus->cmd_dma_state)
604 snd_hdac_bus_stop_cmd_io(bus);
606 snd_hdac_ext_bus_link_power_down_all(bus);
616 struct hdac_bus *bus = &adev->base.core;
623 snd_hdac_ext_bus_link_power_down_all(bus);
637 snd_hdac_ext_bus_ppcap_int_enable(bus, false);
645 snd_hdac_ext_bus_ppcap_enable(bus, false);
648 snd_hdac_bus_stop_chip(bus);
650 avs_hdac_clock_gating_enable(bus, false);
651 snd_hdac_bus_enter_link_reset(bus);
652 avs_hdac_clock_gating_enable(bus, true);
654 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
661 struct hdac_bus *bus = &adev->base.core;
667 snd_hdac_ext_bus_link_power_up_all(bus);
669 if (bus->cmd_dma_state)
670 snd_hdac_bus_init_cmd_io(bus);
677 struct hdac_bus *bus = &adev->base.core;
683 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, true);
684 avs_hdac_bus_init_chip(bus, true);
686 snd_hdac_ext_bus_ppcap_enable(bus, true);
687 snd_hdac_ext_bus_ppcap_int_enable(bus, true);