/linux/drivers/i2c/algos/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 10 tristate "I2C bit-banging interfaces"
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H A D | i2c-algo-bit.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * i2c-algo-bit.c: i2c driver algorithms for bit-shift adapters 5 * Copyright (C) 1995-2000 Simon G. Vogl 17 #include <linux/i2c-algo-bit.h> 20 /* ----- global defines ----------------------------------------------- */ 33 /* ----- global variables --------------------------------------------- */ 35 static int bit_test; /* see if the line-setting functions work */ 37 MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck"); 43 "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose"); 46 /* --- setting states on the bus with the right timing: --------------- */ [all …]
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/linux/Documentation/devicetree/bindings/iio/adc/ |
H A D | avia-hx711.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/avia-hx711.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andreas Klinger <ak@it-klinger.de> 13 Bit-banging driver using two GPIOs: 14 - sck-gpio gives a clock to the sensor with 24 cycles for data retrieval 17 - dout-gpio is the sensor data the sensor responds to the clock 25 - avia,hx711 27 sck-gpios: [all …]
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/linux/drivers/input/serio/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 113 This driver provides support for the PS/2 ports on PA-RISC machines 131 of delivering interrupts on a periodic and one-shot basis. 132 The SDC may also be connected to a battery-backed real-time 133 clock, a basic audio waveform generator, and an HP-HIL Master 199 echo -n "serio_raw" > /sys/bus/serio/devices/serioX/drvctl 231 When used for the E3 mailboard, a non-standard key table 268 tristate "OLPC AP-SP input support" 272 in the OLPC XO-1.75 and XO-4 laptops. 282 Select this option to enable the Hyper-V Keyboard driver. [all …]
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H A D | olpc_apsp.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (C) 2011-2013 One Laptop Per Child 19 * The OLPC XO-1.75 and XO-4 laptops do not have a hardware PS/2 controller. 20 * Instead, the OLPC firmware runs a bit-banging PS/2 implementation on an 21 * otherwise-unused slow processor which is included in the Marvell MMP2/MMP3 74 struct olpc_apsp *priv = port->port_data; in olpc_apsp_write() 78 if (port == priv->padio) in olpc_apsp_write() 83 dev_dbg(priv->dev, "olpc_apsp_write which=%x val=%x\n", which, val); in olpc_apsp_write() 85 u32 sts = readl(priv->base + COMMAND_FIFO_STATUS); in olpc_apsp_write() 88 priv->base + SECURE_PROCESSOR_COMMAND); in olpc_apsp_write() [all …]
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H A D | ps2-gpio.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * GPIO based serio bus driver for bit banging the PS/2 protocol 5 * Author: Danilo Krummrich <danilokrummrich@dk-develop.de> 24 #define DRIVER_NAME "ps2-gpio" 50 * interrupt interval should be ~60us. Let's allow +/- 20us for frequency 61 * |-----------------| |--------| 68 #define PS2_IRQ_MIN_INTERVAL_US (PS2_CLK_MIN_INTERVAL_US - 20) 98 struct ps2_gpio_data *drvdata = serio->port_data; in ps2_gpio_open() 100 drvdata->t_irq_last = 0; in ps2_gpio_open() 101 drvdata->tx.t_xfer_end = 0; in ps2_gpio_open() [all …]
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/linux/Documentation/devicetree/bindings/iio/proximity/ |
H A D | parallax-ping.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/proximity/parallax-ping.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andreas Klinger <ak@it-klinger.de> 13 Bit-banging driver using one GPIO: 14 - ping-gpios is raised by the driver to start measurement 15 - direction of ping-gpio is then switched into input with an interrupt 19 http://parallax.com/sites/default/files/downloads/28041-LaserPING-2m-Rangefinder-Guide.pdf 20 http://parallax.com/sites/default/files/downloads/28015-PING-Documentation-v1.6.pdf [all …]
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H A D | devantech-srf04.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/iio/proximity/devantech-srf04.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andreas Klinger <ak@it-klinger.de> 13 Bit-banging driver using two GPIOs: 14 - trigger-gpio is raised by the driver to start sending out an ultrasonic 16 - echo-gpio is held high by the sensor after sending ultrasonic burst 20 https://www.robot-electronics.co.uk/htm/srf04tech.htm 22 https://www.maxbotix.com/documents/LV-MaxSonar-EZ_Datasheet.pdf [all …]
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/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_gmbus.c | 3 * Copyright © 2006-2008,2010 Intel Corporation 27 * Chris Wilson <chris@chris-wilson.co.uk> 31 #include <linux/i2c-algo-bit.h> 155 struct drm_i915_private *i915 = to_i915(display->drm); in get_gmbus_pin() 219 /* When using bit bashing for I2C, this bit needs to be set to 1 */ in pnv_gmbus_clock_gating() 242 struct intel_display *display = bus->display; in get_reserved() 243 struct drm_i915_private *i915 = to_i915(display->drm); in get_reserved() 248 reserved = intel_de_read_notrace(display, bus->gpio_reg) & in get_reserved() 257 struct intel_display *display = bus->display; in get_clock() 260 intel_de_write_notrace(display, bus->gpio_reg, reserved | GPIO_CLOCK_DIR_MASK); in get_clock() [all …]
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H A D | intel_dvo.c | 3 * Copyright © 2006-2007 Intel Corporation 132 struct drm_i915_private *i915 = to_i915(connector->base.dev); in intel_dvo_connector_get_hw_state() 135 enum port port = encoder->port; in intel_dvo_connector_get_hw_state() 143 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); in intel_dvo_connector_get_hw_state() 149 struct drm_i915_private *i915 = to_i915(encoder->base.dev); in intel_dvo_get_hw_state() 150 enum port port = encoder->port; in intel_dvo_get_hw_state() 163 struct drm_i915_private *i915 = to_i915(encoder->base.dev); in intel_dvo_get_config() 164 enum port port = encoder->port; in intel_dvo_get_config() 167 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO); in intel_dvo_get_config() 179 pipe_config->hw.adjusted_mode.flags |= flags; in intel_dvo_get_config() [all …]
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H A D | intel_crt.c | 2 * Copyright © 2006-2007 Intel Corporation 93 struct drm_i915_private *dev_priv = to_i915(display->drm); in intel_crt_port_enabled() 111 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_crt_get_hw_state() 117 encoder->power_domain); in intel_crt_get_hw_state() 121 ret = intel_crt_port_enabled(display, crt->adpa_reg, pipe); in intel_crt_get_hw_state() 123 intel_display_power_put(dev_priv, encoder->power_domain, wakeref); in intel_crt_get_hw_state() 134 tmp = intel_de_read(display, crt->adpa_reg); in intel_crt_get_flags() 152 crtc_state->output_types |= BIT(INTEL_OUTPUT_ANALOG); in intel_crt_get_config() 154 crtc_state->hw.adjusted_mode.flags |= intel_crt_get_flags(encoder); in intel_crt_get_config() 156 crtc_state->hw.adjusted_mode.crtc_clock = crtc_state->port_clock; in intel_crt_get_config() [all …]
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/linux/drivers/gpu/drm/gma500/ |
H A D | intel_gmbus.c | 3 * Copyright © 2006-2008,2010 Intel Corporation 27 * Chris Wilson <chris@chris-wilson.co.uk> 31 #include <linux/i2c-algo-bit.h> 44 ret__ = -ETIMEDOUT; \ 55 #define GMBUS_REG_READ(reg) ioread32(dev_priv->gmbus_reg + (reg)) 56 #define GMBUS_REG_WRITE(reg, val) iowrite32((val), dev_priv->gmbus_reg + (reg)) 84 /* When using bit bashing for I2C, this bit needs to be set to 1 */ in intel_i2c_quirk_set() 89 if (!IS_PINEVIEW(dev_priv->dev)) in intel_i2c_quirk_set() 105 struct drm_psb_private *dev_priv = gpio->dev_priv; in get_reserved() 109 reserved = GMBUS_REG_READ(gpio->reg) & in get_reserved() [all …]
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/linux/Documentation/misc-devices/ |
H A D | c2port.rst | 1 .. SPDX-License-Identifier: GPL-2.0 23 -------- 26 C2 Interface used for in-system programming of micro controllers. 28 By using this driver you can reprogram the in-system flash without EC2 33 ---------- 38 - AN127: FLASH Programming via the C2 Interface at 41 - C2 Specification at 44 however it implements a two wire serial communication protocol (bit 45 banging) designed to enable in-system programming, debugging, and 46 boundary-scan testing on low pin-count Silicon Labs devices. Currently [all …]
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/linux/Documentation/driver-api/gpio/ |
H A D | intro.rst | 17 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled 20 represents a bit connected to a particular pin, or "ball" on Ball Grid Array 25 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every 26 non-dedicated pin can be configured as a GPIO; and most chips have at least 31 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS 36 - Output values are writable (high=1, low=0). Some chips also have 38 value might be driven, supporting "wire-OR" and similar schemes for the 41 - Input values are likewise readable (1, 0). Some chips support readback 42 of pins configured as "output", which is very useful in such "wire-OR" 44 input de-glitch/debounce logic, sometimes with software controls. [all …]
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H A D | drivers-on-gpio.rst | 6 the right in-kernel and userspace APIs/ABIs for the job, and that these 10 - leds-gpio: drivers/leds/leds-gpio.c will handle LEDs connected to GPIO 13 - ledtrig-gpio: drivers/leds/trigger/ledtrig-gpio.c will provide a LED trigger, 15 (and that LED may in turn use the leds-gpio as per above). 17 - gpio-keys: drivers/input/keyboard/gpio_keys.c is used when your GPIO line 20 - gpio-keys-polled: drivers/input/keyboard/gpio_keys_polled.c is used when your 24 - gpio_mouse: drivers/input/mouse/gpio_mouse.c is used to provide a mouse with 29 - gpio-beeper: drivers/input/misc/gpio-beeper.c is used to provide a beep from 31 off/on, for an actual PWM waveform, see pwm-gpio below.) 33 - pwm-gpio: drivers/pwm/pwm-gpio.c is used to toggle a GPIO with a high [all …]
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/ |
H A D | bus.c | 30 * i2c-algo-bit 50 bus->func->drive_scl(bus, state); in nvkm_i2c_bus_setscl() 57 bus->func->drive_sda(bus, state); in nvkm_i2c_bus_setsda() 64 return bus->func->sense_scl(bus); in nvkm_i2c_bus_getscl() 71 return bus->func->sense_sda(bus); in nvkm_i2c_bus_getsda() 75 * !i2c-algo-bit (off-chip i2c bus / hw i2c / internal bit-banging algo) 87 ret = bus->func->xfer(bus, msgs, num); in nvkm_i2c_bus_xfer() 111 if (bus->func->init) in nvkm_i2c_bus_init() 112 bus->func->init(bus); in nvkm_i2c_bus_init() 114 mutex_lock(&bus->mutex); in nvkm_i2c_bus_init() [all …]
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/linux/drivers/media/pci/pt3/ |
H A D | pt3_i2c.c | 1 // SPDX-License-Identifier: GPL-2.0 49 if ((cbuf->num_cmds % 2) == 0) in cmdbuf_add() 50 cbuf->tmp = cmd; in cmdbuf_add() 52 cbuf->tmp |= cmd << 4; in cmdbuf_add() 53 buf_idx = cbuf->num_cmds / 2; in cmdbuf_add() 54 if (buf_idx < ARRAY_SIZE(cbuf->data)) in cmdbuf_add() 55 cbuf->data[buf_idx] = cbuf->tmp; in cmdbuf_add() 57 cbuf->num_cmds++; in cmdbuf_add() 63 if (cbuf->num_cmds % 2) in put_end() 91 cmdbuf_add(cbuf, (i == size - 1) ? I_DATA_H_NOP : I_DATA_L_NOP); in put_byte_read() [all …]
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/linux/drivers/fsi/ |
H A D | fsi-master-gpio.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * A FSI master controller, using a simple GPIO bit-banging interface 18 #include "fsi-master.h" 54 if (!master->no_delays) in clock_toggle() 56 gpiod_set_value(master->gpio_clk, 0); in clock_toggle() 57 if (!master->no_delays) in clock_toggle() 59 gpiod_set_value(master->gpio_clk, 1); in clock_toggle() 67 if (!master->no_delays) in sda_clock_in() 69 gpiod_set_value(master->gpio_clk, 0); in sda_clock_in() 72 gpiod_get_value(master->gpio_data); in sda_clock_in() [all …]
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/linux/drivers/iio/humidity/ |
H A D | dht11.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * DHT11/DHT22 bit banging GPIO driver 45 * 0-bit: 22-30uS -- typically 26uS (AM2302) 46 * 1-bit: 68-75uS -- typically 70uS (AM2302) 51 * timeres > 34uS ... don't know what a 1-tick pulse is 53 * 30uS > timeres > 23uS ... don't know what a 2-tick pulse is 56 * Luckily clocks in the 33-44kHz range are quite uncommon, so we can 57 * support most systems if the threshold for decoding a pulse as 1-bit 84 /* num_edges: -1 means "no transmission in progress" */ 98 dev_dbg(dht11->dev, "%d edges detected:\n", dht11->num_edges); in dht11_edges_print() [all …]
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/linux/drivers/net/can/sja1000/ |
H A D | peak_pci.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Copyright (C) 2012 Stephane Grosjean <s.grosjean@peak-system.com> 8 * Copyright (C) 2001-2006 PEAK System-Technik GmbH 19 #include <linux/i2c-algo-bit.h> 25 MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>"); 26 MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI family cards"); 62 #define PEAK_PC_104P_DEVICE_ID 0x0006 /* PCAN-PC/104+ cards */ 63 #define PEAK_PCI_104E_DEVICE_ID 0x0007 /* PCAN-PCI/104 Express cards */ 65 #define PEAK_PCIE_OEM_ID 0x0009 /* PCAN-PCI Express OEM */ 66 #define PEAK_PCIEC34_DEVICE_ID 0x000A /* PCAN-PCI Express 34 (one channel) */ [all …]
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/linux/drivers/spi/ |
H A D | spi-gpio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 25 * platform_device->driver_data ... points to spi_gpio 27 * spi->controller_state ... reserved for bitbang framework code 29 * spi->controller->dev.driver_data ... points to spi_gpio->bitbang 40 /*----------------------------------------------------------------------*/ 44 * per transferred bit can make performance a problem, this code 47 * - The slow generic way: set up platform_data to hold the GPIO 51 * - The quicker inlined way: only helps with platform GPIO code 62 * #include "spi-gpio.c" 72 /*----------------------------------------------------------------------*/ [all …]
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/linux/Documentation/PCI/ |
H A D | pci-error-recovery.rst | 1 .. SPDX-License-Identifier: GPL-2.0 8 :Authors: - Linas Vepstas <linasvepstas@gmail.com> 9 - Richard Lary <rlary@us.ibm.com> 10 - Mike Mason <mmlnx@us.ibm.com> 16 chipsets are able to deal with these errors; these include PCI-E chipsets, 17 and the PCI-host bridges found on IBM Power4, Power5 and Power6-based 32 including multiple instances of a device driver on multi-function 34 waiting for some i/o-space register to change, when it never will. 39 is forced by the need to handle multi-function devices, that is, 42 of reset it desires, the choices being a simple re-enabling of I/O [all …]
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H A D | pci.rst | 1 .. SPDX-License-Identifier: GPL-2.0 7 :Authors: - Martin Mares <mj@ucw.cz> 8 - Grant Grundler <grundler@parisc-linux.org> 11 Since each CPU architecture implements different chip-sets and PCI devices 18 by Jonathan Corbet, Alessandro Rubini, and Greg Kroah-Hartman. 22 However, keep in mind that all documents are subject to "bit rot". 26 "Linux PCI" <linux-pci@atrey.karlin.mff.cuni.cz> mailing list. 38 supporting hot-pluggable PCI, CardBus, and Express-Card in a single driver]. 45 - Enable the device 46 - Request MMIO/IOP resources [all …]
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/linux/drivers/gpu/drm/radeon/ |
H A D | radeon_i2c.c | 2 * Copyright 2007-8 Advanced Micro Devices, Inc. 58 if (radeon_connector->router.ddc_valid) in radeon_ddc_probe() 62 ret = i2c_transfer(&radeon_connector->ddc_bus->aux.ddc, msgs, 2); in radeon_ddc_probe() 64 ret = i2c_transfer(&radeon_connector->ddc_bus->adapter, msgs, 2); in radeon_ddc_probe() 83 /* bit banging i2c */ 88 struct radeon_device *rdev = i2c->dev->dev_private; in pre_xfer() 89 struct radeon_i2c_bus_rec *rec = &i2c->rec; in pre_xfer() 92 mutex_lock(&i2c->mutex); in pre_xfer() 95 * holds the i2c port in a bad state - switch hw i2c away before in pre_xfer() 96 * doing DDC - do this for all r200s/r300s/r400s for safety sake in pre_xfer() [all …]
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/linux/arch/arm/boot/dts/st/ |
H A D | ste-ux500-samsung-janice.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Devicetree for the Samsung Galaxy S Advance GT-I9070 also known as Janice. 6 /dts-v1/; 7 #include "ste-db8500.dtsi" 8 #include "ste-ab8500.dtsi" 9 #include "ste-dbx5x0-pinctrl.dtsi" 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/interrupt-controller/irq.h> [all …]
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