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/linux/Documentation/devicetree/bindings/dma/
H A Dqcom,bam-dma.yaml4 $id: http://devicetree.org/schemas/dma/qcom,bam-dma.yaml#
7 title: Qualcomm Technologies Inc BAM DMA controller
21 - qcom,bam-v1.3.0
23 - qcom,bam-v1.4.0
25 - qcom,bam-v1.7.0
29 - qcom,bam-v1.7.4
30 - const: qcom,bam-v1.7.0
54 Indicates supported number of DMA channels in a remotely controlled bam.
59 Indicates that the bam is controlled by remote processor i.e. execution
74 controlled bam.
[all …]
/linux/include/linux/dma/
H A Dqcom_bam_dma.h13 * supported by BAM DMA Engine.
38 * prep_bam_ce_le32 - Wrapper function to prepare a single BAM command
41 * @bam_ce: bam command element
43 * @cmd: BAM command
57 * bam_prep_ce - Wrapper function to prepare a single BAM command element
60 * @bam_ce: BAM command element
62 * @cmd: BAM command
/linux/Documentation/devicetree/bindings/net/
H A Dqcom,bam-dmux.yaml4 $id: http://devicetree.org/schemas/net/qcom,bam-dmux.yaml#
7 title: Qualcomm BAM Data Multiplexer
13 The BAM Data Multiplexer provides access to the network data channels
16 (Qualcomm BAM DMA) and bidirectional interrupts to coordinate power control.
25 const: qcom,bam-dmux
79 bam-dmux {
80 compatible = "qcom,bam-dmux";
/linux/drivers/dma/qcom/
H A Dbam_dma.c6 * QCOM BAM DMA engine driver
8 * QCOM BAM DMA blocks are distributed amongst a number of the on-chip
201 /* BAM CTRL */
212 /* BAM REVISION */
234 /* BAM NUM PIPES */
242 /* BAM CNFG BITS */
404 * bam_addr - returns BAM register address
405 * @bdev: bam device
421 * bam_reset() - reset and initialize BAM registers
422 * @bdev: bam device
[all …]
H A DKconfig14 tristate "QCOM BAM DMA support"
19 Enable support for the QCOM BAM DMA controller. This controller
/linux/drivers/mmc/host/
H A Dmmci_qcom_dml.c66 /* Set the Producer BAM block size */ in qcom_dma_start()
69 /* Set Producer BAM Transaction size */ in qcom_dma_start()
147 * want the BAM interface to connect with SDCC-DML. in qcom_dma_setup()
152 * BAM connected with DML should MASTER the AHB bus. in qcom_dma_setup()
164 * Initialize the logical BAM pipe size for producer in qcom_dma_setup()
/linux/drivers/crypto/qce/
H A Dcore.c170 * Pipe pair number depends on the actual BAM dma pipe in qce_check_version()
171 * that is used for transfers. The BAM dma pipes are passed in qce_check_version()
174 * BAM dma pipes(rx, tx) CE pipe pair id in qce_check_version()
/linux/drivers/net/wwan/
H A DKconfig65 tristate "Qualcomm BAM-DMUX WWAN network driver"
68 The BAM Data Multiplexer provides access to the network data channels
/linux/drivers/i2c/busses/
H A Di2c-qup.c185 * is_tx_blk_mode: whether tx uses block or FIFO mode in case of non BAM xfer.
186 * is_rx_blk_mode: whether rx uses block or FIFO mode in case of non BAM xfer.
318 * Check for BAM mode and returns if already error has come for current in qup_i2c_interrupt()
328 * Don’t reset the QUP state in case of BAM mode. The BAM in qup_i2c_interrupt()
330 * which will clear the remaining schedule descriptors in BAM in qup_i2c_interrupt()
331 * HW FIFO and generates the BAM interrupt. in qup_i2c_interrupt()
763 /* scratch buf to read the BAM EOT FLUSH tags */ in qup_i2c_bam_schedule_desc()
881 /* set BAM mode */ in qup_i2c_bam_xfer()
904 * Make DMA descriptor and schedule the BAM transfer if its in qup_i2c_bam_xfer()
1518 * DMA using BAM : Appropriate for any transaction size but the address should
/linux/tools/testing/selftests/bpf/prog_tests/
H A Dlinked_list.c763 id = btf__add_decl_tag(btf, "contains:bam:a", 9, 0); in test_btf()
764 if (!ASSERT_EQ(id, 10, "btf__add_decl_tag contains:bam:a")) in test_btf()
766 id = btf__add_struct(btf, "bam", 24); in test_btf()
767 if (!ASSERT_EQ(id, 11, "btf__add_struct bam")) in test_btf()
770 if (!ASSERT_OK(err, "btf__add_field bam::a")) in test_btf()
/linux/drivers/char/hw_random/
H A Dintel-rng.c109 /* BAM, CAM, DBM, FBM, GxM
111 { PCI_DEVICE(0x8086, 0x244c) }, /* BAM */
/linux/arch/arm64/boot/dts/qcom/
H A Dsda660-inforce-ifc6560.dts175 * BAM DMA interconnects support is in place.
188 * BAM DMA interconnects support is in place.
H A Dmsm8917.dtsi1262 compatible = "qcom,bam-v1.7.0";
1322 compatible = "qcom,bam-v1.7.0";
1335 compatible = "qcom,bam-v1.7.0";
H A Dmsm8937.dtsi1425 compatible = "qcom,bam-v1.7.0";
1495 compatible = "qcom,bam-v1.7.0";
1610 compatible = "qcom,bam-v1.7.0";
H A Dmsm8996.dtsi841 compatible = "qcom,bam-v1.7.0";
3261 compatible = "qcom,bam-v1.7.0";
3338 compatible = "qcom,bam-v1.7.0";
3519 compatible = "qcom,bam-v1.7.0";
H A Dmsm8976.dtsi1363 compatible = "qcom,bam-v1.7.0";
1484 compatible = "qcom,bam-v1.7.0";
H A Dsdm630.dtsi1738 compatible = "qcom,bam-v1.7.0";
1860 compatible = "qcom,bam-v1.7.0";
/linux/drivers/mtd/nand/raw/
H A Dqcom_nandc.c1466 /* Free the initially allocated BAM transaction for reading the ONFI params */ in qcom_nand_attach_chip()
1473 /* Now allocate the BAM transaction based on updated max_cwperpage */ in qcom_nand_attach_chip()
1478 "failed to allocate bam transaction\n"); in qcom_nand_attach_chip()
2048 /* enable ADM or BAM DMA */ in qcom_nandc_setup()
2055 * in BAM mode. So update the NAND_CTRL register in qcom_nandc_setup()
2056 * only if it is not in BAM mode. In most cases BAM in qcom_nandc_setup()
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8960.dtsi401 compatible = "qcom,bam-v1.3.0";
430 compatible = "qcom,bam-v1.3.0";
H A Dqcom-msm8226.dtsi921 compatible = "qcom,bam-v1.4.0";
975 bam_dmux: bam-dmux {
976 compatible = "qcom,bam-dmux";
H A Dqcom-msm8974.dtsi596 compatible = "qcom,bam-v1.4.0";
1516 compatible = "qcom,bam-v1.4.0";
1563 bam_dmux: bam-dmux {
1564 compatible = "qcom,bam-dmux";
H A Dqcom-sdx65.dtsi275 compatible = "qcom,bam-v1.7.0";
/linux/drivers/spi/
H A Dspi-qpic-snand.c329 * Free the temporary BAM transaction allocated initially by in qcom_spi_ecc_init_ctx_pipelined()
339 dev_err(snandc->dev, "failed to allocate BAM transaction\n"); in qcom_spi_ecc_init_ctx_pipelined()
/linux/net/can/j1939/
H A Dtransport.c1752 netdev_info(priv->ndev, "%s: failed to create TP BAM session\n", in j1939_xtp_rx_rts()
2052 netdev_err_once(priv->ndev, "%s: BAM to unicast (%02x), ignoring!\n", in j1939_tp_cmd_recv()
/linux/arch/x86/pci/
H A Dfixup.c151 * while they are obviously not. The 82801 family (AA, AB, BAM/CAM,

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