Home
last modified time | relevance | path

Searched full:bam (Results 1 – 25 of 28) sorted by relevance

12

/linux/Documentation/devicetree/bindings/dma/
H A Dqcom,bam-dma.yaml4 $id: http://devicetree.org/schemas/dma/qcom,bam-dma.yaml#
7 title: Qualcomm Technologies Inc BAM DMA controller
21 - qcom,bam-v1.3.0
23 - qcom,bam-v1.4.0
25 - qcom,bam-v1.7.0
29 - qcom,bam-v1.7.4
30 - const: qcom,bam-v1.7.0
52 Indicates supported number of DMA channels in a remotely controlled bam.
57 Indicates that the bam is controlled by remote processor i.e. execution
72 controlled bam.
[all …]
/linux/include/linux/dma/
H A Dqcom_bam_dma.h13 * supported by BAM DMA Engine.
38 * prep_bam_ce_le32 - Wrapper function to prepare a single BAM command
41 * @bam_ce: bam command element
43 * @cmd: BAM command
57 * bam_prep_ce - Wrapper function to prepare a single BAM command element
60 * @bam_ce: BAM command element
62 * @cmd: BAM command
/linux/Documentation/devicetree/bindings/net/
H A Dqcom,bam-dmux.yaml4 $id: http://devicetree.org/schemas/net/qcom,bam-dmux.yaml#
7 title: Qualcomm BAM Data Multiplexer
13 The BAM Data Multiplexer provides access to the network data channels
16 (Qualcomm BAM DMA) and bidirectional interrupts to coordinate power control.
25 const: qcom,bam-dmux
79 bam-dmux {
80 compatible = "qcom,bam-dmux";
/linux/drivers/dma/qcom/
H A Dbam_dma.c6 * QCOM BAM DMA engine driver
8 * QCOM BAM DMA blocks are distributed amongst a number of the on-chip
201 /* BAM CTRL */
212 /* BAM REVISION */
234 /* BAM NUM PIPES */
242 /* BAM CNFG BITS */
404 * bam_addr - returns BAM register address
405 * @bdev: bam device
421 * bam_reset() - reset and initialize BAM registers
422 * @bdev: bam device
[all …]
H A DKconfig14 tristate "QCOM BAM DMA support"
19 Enable support for the QCOM BAM DMA controller. This controller
/linux/drivers/mmc/host/
H A Dmmci_qcom_dml.c66 /* Set the Producer BAM block size */ in qcom_dma_start()
69 /* Set Producer BAM Transaction size */ in qcom_dma_start()
147 * want the BAM interface to connect with SDCC-DML. in qcom_dma_setup()
152 * BAM connected with DML should MASTER the AHB bus. in qcom_dma_setup()
164 * Initialize the logical BAM pipe size for producer in qcom_dma_setup()
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,msm8916-mss-pil.yaml132 bam-dmux:
133 $ref: /schemas/net/qcom,bam-dmux.yaml#
135 Qualcomm BAM Data Multiplexer (provides network interface to the modem)
/linux/drivers/net/wwan/
H A DKconfig65 tristate "Qualcomm BAM-DMUX WWAN network driver"
68 The BAM Data Multiplexer provides access to the network data channels
/linux/drivers/mtd/
H A Dftl.c396 /* Write the BAM stub */ in prepare_xfer()
447 /* Read current BAM */ in copy_erase_unit()
460 printk( KERN_WARNING "ftl: Failed to read BAM cache in copy_erase_unit()!\n"); in copy_erase_unit()
474 printk( KERN_WARNING "ftl: Failed to write back to BAM cache in copy_erase_unit()!\n"); in copy_erase_unit()
516 /* Write the BAM to the transfer unit */ in copy_erase_unit()
523 printk( KERN_WARNING "ftl: Error writing BAM in copy_erase_unit\n"); in copy_erase_unit()
667 the BAM cache for the erase unit containing the free block. It
706 /* Is this unit's BAM cached? */ in find_free()
718 printk(KERN_WARNING"ftl: Error reading BAM in find_free\n"); in find_free()
902 /* Tag the BAM entry, and write the new block */ in ftl_write()
/linux/drivers/i2c/busses/
H A Di2c-qup.c182 * is_tx_blk_mode: whether tx uses block or FIFO mode in case of non BAM xfer.
183 * is_rx_blk_mode: whether rx uses block or FIFO mode in case of non BAM xfer.
310 * Check for BAM mode and returns if already error has come for current in qup_i2c_interrupt()
320 * Don’t reset the QUP state in case of BAM mode. The BAM in qup_i2c_interrupt()
322 * which will clear the remaining schedule descriptors in BAM in qup_i2c_interrupt()
323 * HW FIFO and generates the BAM interrupt. in qup_i2c_interrupt()
736 /* scratch buf to read the BAM EOT FLUSH tags */ in qup_i2c_bam_schedule_desc()
850 /* set BAM mode */ in qup_i2c_bam_xfer()
873 * Make DMA descriptor and schedule the BAM transfer if its in qup_i2c_bam_xfer()
1488 * DMA using BAM : Appropriate for any transaction size but the address should
/linux/tools/testing/selftests/bpf/prog_tests/
H A Dlinked_list.c762 id = btf__add_decl_tag(btf, "contains:bam:a", 9, 0); in test_btf()
763 if (!ASSERT_EQ(id, 10, "btf__add_decl_tag contains:bam:a")) in test_btf()
765 id = btf__add_struct(btf, "bam", 24); in test_btf()
766 if (!ASSERT_EQ(id, 11, "btf__add_struct bam")) in test_btf()
769 if (!ASSERT_OK(err, "btf__add_field bam::a")) in test_btf()
/linux/Documentation/devicetree/bindings/slimbus/
H A Dqcom,slim.yaml40 - description: Interrupt for controller core's BAM
/linux/drivers/char/hw_random/
H A Dintel-rng.c109 /* BAM, CAM, DBM, FBM, GxM
111 { PCI_DEVICE(0x8086, 0x244c) }, /* BAM */
/linux/drivers/mtd/nand/raw/
H A Dqcom_nandc.c1466 /* Free the initially allocated BAM transaction for reading the ONFI params */ in qcom_nand_attach_chip()
1473 /* Now allocate the BAM transaction based on updated max_cwperpage */ in qcom_nand_attach_chip()
1478 "failed to allocate bam transaction\n"); in qcom_nand_attach_chip()
2040 /* enable ADM or BAM DMA */ in qcom_nandc_setup()
2047 * in BAM mode. So update the NAND_CTRL register in qcom_nandc_setup()
2048 * only if it is not in BAM mode. In most cases BAM in qcom_nandc_setup()
/linux/arch/arm64/boot/dts/qcom/
H A Dipq6018.dtsi349 compatible = "qcom,bam-v1.7.0";
480 compatible = "qcom,bam-v1.7.0";
637 compatible = "qcom,bam-v1.7.0";
H A Dmsm8976.dtsi1326 compatible = "qcom,bam-v1.7.0";
1446 compatible = "qcom,bam-v1.7.0";
H A Dmsm8953.dtsi1459 compatible = "qcom,bam-v1.7.0";
1583 compatible = "qcom,bam-v1.7.0";
H A Dmsm8998.dtsi2269 compatible = "qcom,bam-v1.7.0";
2524 compatible = "qcom,bam-v1.7.0";
H A Dsa8775p.dtsi2411 compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8974.dtsi595 compatible = "qcom,bam-v1.4.0";
1515 compatible = "qcom,bam-v1.4.0";
1562 bam_dmux: bam-dmux {
1563 compatible = "qcom,bam-dmux";
H A Dqcom-apq8064.dtsi923 compatible = "qcom,bam-v1.3.0";
951 compatible = "qcom,bam-v1.3.0";
980 compatible = "qcom,bam-v1.3.0";
H A Dqcom-ipq8064.dtsi687 compatible = "qcom,bam-v1.3.0";
697 compatible = "qcom,bam-v1.3.0";
/linux/net/can/j1939/
H A Dtransport.c1756 netdev_info(priv->ndev, "%s: failed to create TP BAM session\n", in j1939_xtp_rx_rts()
2056 netdev_err_once(priv->ndev, "%s: BAM to unicast (%02x), ignoring!\n", in j1939_tp_cmd_recv()
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_link.c3811 /* Enable CL37 BAM */ in bnx2x_warpcore_enable_AN_KR()
3819 DP(NETIF_MSG_LINK, "Enable CL37 BAM on KR\n"); in bnx2x_warpcore_enable_AN_KR()
5072 /* Enable TetonII and BAM autoneg */ in bnx2x_set_autoneg()
5078 /* Enable BAM aneg Mode and TetonII aneg Mode */ in bnx2x_set_autoneg()
5082 /* TetonII and BAM Autoneg Disabled */ in bnx2x_set_autoneg()
5098 /* Enable BAM Station Manager*/ in bnx2x_set_autoneg()
5233 /* Enable and restart BAM/CL37 aneg */ in bnx2x_restart_autoneg()
5500 * does support cl37 BAM. In this case we disable cl73 and in bnx2x_check_fallback_to_cl37()
7420 /* Enable CL37 BAM */ in bnx2x_8073_config_init()
7432 DP(NETIF_MSG_LINK, "Enable CL37 BAM on KR\n"); in bnx2x_8073_config_init()
/linux/drivers/tty/serial/
H A Dmsm_serial.c691 * Switch from DMA to SW/FIFO mode. After clearing Rx BAM (UARTDM_DMEN), in msm_start_rx_dma()

12