| /linux/Documentation/devicetree/bindings/dma/ |
| H A D | qcom,bam-dma.yaml | 4 $id: http://devicetree.org/schemas/dma/qcom,bam-dma.yaml# 7 title: Qualcomm Technologies Inc BAM DMA controller 21 - qcom,bam-v1.3.0 23 - qcom,bam-v1.4.0 25 - qcom,bam-v1.7.0 29 - qcom,bam-v1.7.4 30 - const: qcom,bam-v1.7.0 54 Indicates supported number of DMA channels in a remotely controlled bam. 59 Indicates that the bam is controlled by remote processor i.e. execution 74 controlled bam. [all …]
|
| /linux/include/linux/dma/ |
| H A D | qcom_bam_dma.h | 13 * supported by BAM DMA Engine. 38 * prep_bam_ce_le32 - Wrapper function to prepare a single BAM command 41 * @bam_ce: bam command element 43 * @cmd: BAM command 57 * bam_prep_ce - Wrapper function to prepare a single BAM command element 60 * @bam_ce: BAM command element 62 * @cmd: BAM command
|
| /linux/Documentation/devicetree/bindings/net/ |
| H A D | qcom,bam-dmux.yaml | 4 $id: http://devicetree.org/schemas/net/qcom,bam-dmux.yaml# 7 title: Qualcomm BAM Data Multiplexer 13 The BAM Data Multiplexer provides access to the network data channels 16 (Qualcomm BAM DMA) and bidirectional interrupts to coordinate power control. 25 const: qcom,bam-dmux 79 bam-dmux { 80 compatible = "qcom,bam-dmux";
|
| /linux/drivers/dma/qcom/ |
| H A D | bam_dma.c | 6 * QCOM BAM DMA engine driver 8 * QCOM BAM DMA blocks are distributed amongst a number of the on-chip 202 /* BAM CTRL */ 213 /* BAM REVISION */ 235 /* BAM NUM PIPES */ 243 /* BAM CNFG BITS */ 405 * bam_addr - returns BAM register address 406 * @bdev: bam device 422 * bam_reset() - reset and initialize BAM registers 423 * @bdev: bam device [all …]
|
| H A D | Kconfig | 14 tristate "QCOM BAM DMA support" 19 Enable support for the QCOM BAM DMA controller. This controller
|
| H A D | qcom_adm.c | 566 * IRQ handler for the bam controller
|
| /linux/drivers/mtd/nand/ |
| H A D | qpic_common.c | 19 * qcom_free_bam_transaction() - Frees the BAM transaction memory 22 * This function frees the bam transaction memory 33 * qcom_alloc_bam_transaction() - allocate BAM transaction 36 * This function will allocate and initialize the BAM transaction structure 77 * qcom_clear_bam_transaction() - Clears the BAM transaction 80 * This function will clear the BAM transaction indexes. 145 * DMA descriptor for BAM.This descriptor will be added in the NAND DMA 219 * qcom_prep_bam_dma_desc_cmd() - Prepares the command descriptor for BAM DMA 227 * This function will prepares the command descriptor for BAM DMA 241 dev_err(nandc->dev, "BAM in qcom_prep_bam_dma_desc_cmd() [all...] |
| /linux/drivers/mmc/host/ |
| H A D | mmci_qcom_dml.c | 66 /* Set the Producer BAM block size */ in qcom_dma_start() 69 /* Set Producer BAM Transaction size */ in qcom_dma_start() 147 * want the BAM interface to connect with SDCC-DML. in qcom_dma_setup() 152 * BAM connected with DML should MASTER the AHB bus. in qcom_dma_setup() 164 * Initialize the logical BAM pipe size for producer in qcom_dma_setup()
|
| /linux/drivers/crypto/qce/ |
| H A D | core.c | 170 * Pipe pair number depends on the actual BAM dma pipe in qce_check_version() 171 * that is used for transfers. The BAM dma pipes are passed in qce_check_version() 174 * BAM dma pipes(rx, tx) CE pipe pair id in qce_check_version()
|
| H A D | sha.c | 234 * rctx->buflen is 0 because the crypto engine BAM does not allow in qce_ahash_update()
|
| /linux/drivers/mtd/ |
| H A D | ftl.c | 393 /* Write the BAM stub */ in prepare_xfer() 444 /* Read current BAM */ in copy_erase_unit() 457 printk( KERN_WARNING "ftl: Failed to read BAM cache in copy_erase_unit()!\n"); in copy_erase_unit() 471 printk( KERN_WARNING "ftl: Failed to write back to BAM cache in copy_erase_unit()!\n"); in copy_erase_unit() 513 /* Write the BAM to the transfer unit */ in copy_erase_unit() 520 printk( KERN_WARNING "ftl: Error writing BAM in copy_erase_unit\n"); in copy_erase_unit() 664 the BAM cache for the erase unit containing the free block. It 703 /* Is this unit's BAM cached? */ in find_free() 715 printk(KERN_WARNING"ftl: Error reading BAM in find_free\n"); in find_free() 899 /* Tag the BAM entr in ftl_write() [all...] |
| /linux/drivers/i2c/busses/ |
| H A D | i2c-qup.c | 185 * is_tx_blk_mode: whether tx uses block or FIFO mode in case of non BAM xfer. 186 * is_rx_blk_mode: whether rx uses block or FIFO mode in case of non BAM xfer. 318 * Check for BAM mode and returns if already error has come for current in qup_i2c_interrupt() 328 * Don’t reset the QUP state in case of BAM mode. The BAM in qup_i2c_interrupt() 330 * which will clear the remaining schedule descriptors in BAM in qup_i2c_interrupt() 331 * HW FIFO and generates the BAM interrupt. in qup_i2c_interrupt() 763 /* scratch buf to read the BAM EOT FLUSH tags */ in qup_i2c_bam_schedule_desc() 881 /* set BAM mode */ in qup_i2c_bam_xfer() 904 * Make DMA descriptor and schedule the BAM transfer if its in qup_i2c_bam_xfer() 1518 * DMA using BAM : Appropriate for any transaction size but the address should
|
| /linux/tools/testing/selftests/bpf/prog_tests/ |
| H A D | linked_list.c | 763 id = btf__add_decl_tag(btf, "contains:bam:a", 9, 0); in test_btf() 764 if (!ASSERT_EQ(id, 10, "btf__add_decl_tag contains:bam:a")) in test_btf() 766 id = btf__add_struct(btf, "bam", 24); in test_btf() 767 if (!ASSERT_EQ(id, 11, "btf__add_struct bam")) in test_btf() 770 if (!ASSERT_OK(err, "btf__add_field bam::a")) in test_btf()
|
| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sda660-inforce-ifc6560.dts | 175 * BAM DMA interconnects support is in place. 188 * BAM DMA interconnects support is in place.
|
| H A D | msm8996.dtsi | 841 compatible = "qcom,bam-v1.7.0"; 3261 compatible = "qcom,bam-v1.7.0"; 3338 compatible = "qcom,bam-v1.7.0"; 3519 compatible = "qcom,bam-v1.7.0";
|
| H A D | sdm845.dtsi | 2718 compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; 5416 compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
|
| H A D | sdx75.dtsi | 884 compatible = "qcom,bam-v1.7.0";
|
| H A D | sm8350.dtsi | 1810 compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
|
| H A D | talos.dtsi | 1507 compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
|
| /linux/drivers/char/hw_random/ |
| H A D | intel-rng.c | 109 /* BAM, CAM, DBM, FBM, GxM 111 { PCI_DEVICE(0x8086, 0x244c) }, /* BAM */
|
| /linux/drivers/spi/ |
| H A D | spi-qpic-snand.c | 329 * Free the temporary BAM transaction allocated initially by in qcom_spi_ecc_init_ctx_pipelined() 339 dev_err(snandc->dev, "failed to allocate BAM transaction\n"); in qcom_spi_ecc_init_ctx_pipelined()
|
| /linux/arch/arm/boot/dts/qcom/ |
| H A D | qcom-sdx65.dtsi | 275 compatible = "qcom,bam-v1.7.0";
|
| /linux/net/can/j1939/ |
| H A D | transport.c | 1783 netdev_info(priv->ndev, "%s: failed to create TP BAM session\n", in j1939_xtp_rx_rts() 2083 netdev_err_once(priv->ndev, "%s: BAM to unicast (%02x), ignoring!\n", in j1939_tp_cmd_recv()
|
| /linux/arch/x86/pci/ |
| H A D | fixup.c | 151 * while they are obviously not. The 82801 family (AA, AB, BAM/CAM,
|
| /linux/drivers/net/ethernet/broadcom/bnx2x/ |
| H A D | bnx2x_link.c | 3811 /* Enable CL37 BAM */ in bnx2x_warpcore_enable_AN_KR() 3819 DP(NETIF_MSG_LINK, "Enable CL37 BAM on KR\n"); in bnx2x_warpcore_enable_AN_KR() 5072 /* Enable TetonII and BAM autoneg */ in bnx2x_set_autoneg() 5078 /* Enable BAM aneg Mode and TetonII aneg Mode */ in bnx2x_set_autoneg() 5082 /* TetonII and BAM Autoneg Disabled */ in bnx2x_set_autoneg() 5098 /* Enable BAM Station Manager*/ in bnx2x_set_autoneg() 5233 /* Enable and restart BAM/CL37 aneg */ in bnx2x_restart_autoneg() 5500 * does support cl37 BAM. In this case we disable cl73 and in bnx2x_check_fallback_to_cl37() 7420 /* Enable CL37 BAM */ in bnx2x_8073_config_init() 7432 DP(NETIF_MSG_LINK, "Enable CL37 BAM on KR\n"); in bnx2x_8073_config_init()
|