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/linux/Documentation/devicetree/bindings/clock/
H A Dintel,agilex5-clkmgr.yaml4 $id: http://devicetree.org/schemas/clock/intel,agilex5-clkmgr.yaml#
7 title: Intel SoCFPGA Agilex5 clock manager
13 The Intel Agilex5 Clock Manager is an integrated clock controller, which
18 const: intel,agilex5-clkmgr
36 compatible = "intel,agilex5-clkmgr";
/linux/arch/arm64/boot/dts/intel/
H A Dsocfpga_agilex5_socdk_nand.dts8 model = "SoCFPGA Agilex5 SoCDK NAND daughter board";
9 compatible = "intel,socfpga-agilex5-socdk-nand", "intel,socfpga-agilex5";
H A Dsocfpga_agilex5_socdk.dts8 model = "SoCFPGA Agilex5 SoCDK";
9 compatible = "intel,socfpga-agilex5-socdk", "intel,socfpga-agilex5";
H A Dsocfpga_agilex5_socdk_013b.dts8 model = "SoCFPGA Agilex5 013B SoCDK";
9 compatible = "intel,socfpga-agilex5-socdk-013b", "intel,socfpga-agilex5";
H A Dsocfpga_agilex3_socdk.dts10 "intel,socfpga-agilex5";
/linux/Documentation/devicetree/bindings/firmware/
H A Dintel,stratix10-svc.yaml37 - intel,agilex5-svc
76 - intel,agilex5-svc
/linux/drivers/clk/socfpga/
H A DMakefile6 clk-agilex.o clk-agilex5.o
H A DKconfig16 …bool "Intel Stratix / Agilex / N5X / Agilex5 clock controller support" if COMPILE_TEST && (!ARM64 …
H A Dclk-agilex5.c10 #include <dt-bindings/clock/intel,agilex5-clkmgr.h>
544 { .compatible = "intel,agilex5-clkmgr", .data = agilex5_clkmgr_init },
551 .name = "agilex5-clkmgr",
/linux/Documentation/devicetree/bindings/i3c/
H A Dsnps,dw-i3c-master.yaml20 - const: altr,agilex5-dw-i3c-master
/linux/drivers/i3c/master/
H A Ddw-i3c-master.c1822 { .compatible = "altr,agilex5-dw-i3c-master",