| /linux/drivers/zorro/ |
| H A D | zorro.ids | 21 0000 Stormbringer [Accelerator]
22 1300 Warp Engine [Accelerator, SCSI Host Adapter and RAM Expansion]
40 5000 A2620 68020 [Accelerator and RAM Expansion]
41 5100 A2630 68030 [Accelerator and RAM Expansion]
52 6900 A2000 68040 [Accelerator]
53 9600 68040 [Accelerator]
76 4500 VXL-30 [Accelerator]
90 3900 Hurricane 2800 [Accelerator and RAM Expansion]
91 5700 Hurricane 2800 [Accelerator and RAM Expansion]
112 1100 Magnum 40 [Accelerator and SCSI Host Adapter]
[all …]
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| /linux/drivers/crypto/ |
| H A D | Kconfig | 76 or Accelerator (CEXxA) mode.
221 tristate "Driver HIFN 795x crypto accelerator chips"
277 tristate "Driver AMCC PPC4xx crypto accelerator"
308 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
317 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
331 OMAP processors have AES module accelerator. Select this if you
341 OMAP processors have DES/3DES module accelerator. Select this if you
349 tristate "Support for SAHARA crypto accelerator"
356 This option enables support for the SAHARA HW crypto accelerator
375 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
[all …]
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| /linux/drivers/crypto/hisilicon/ |
| H A D | Kconfig | 4 tristate "Support for Hisilicon SEC crypto block cipher accelerator"
18 tristate "Support for HiSilicon SEC2 crypto block cipher accelerator"
49 HiSilicon accelerator engines use a common queue management
53 tristate "Support for HiSilicon ZIP accelerator"
64 tristate "Support for HISI HPRE accelerator"
76 accelerator, which can accelerate RSA and DH algorithms.
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| /linux/Documentation/devicetree/bindings/crypto/ |
| H A D | img-hash.txt | 1 Imagination Technologies hardware hash accelerator
3 The hash accelerator provides hardware hashing acceleration for
8 - compatible : "img,hash-accelerator"
15 "hash" Used to clock data through the accelerator
20 compatible = "img,hash-accelerator";
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| /linux/Documentation/devicetree/bindings/dma/ |
| H A D | stericsson,dma40.yaml | 70 48: Crypto Accelerator 1
71 49: Crypto Accelerator 1 TX or Hash Accelerator 1 TX
72 50: Hash Accelerator 1 TX
83 61: Crypto Accelerator 0
84 62: Crypto Accelerator 0 TX or Hash Accelerator 0 TX
85 63: Hash Accelerator 0 TX
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| /linux/drivers/staging/media/atomisp/pci/isp/kernels/sdis/common/ |
| H A D | ia_css_sdis_common_types.h | 114 /* DVS statistics generated by accelerator global configuration
125 /* DVS statistics generated by accelerator level grid
139 /* DVS statistics generated by accelerator level grid start
151 /* DVS statistics generated by accelerator level grid end
161 /* DVS statistics generated by accelerator Feature Extraction
175 /* DVS statistics generated by accelerator public configuration
186 /* DVS statistics grid generated by accelerator
198 /* DVS statistics generated by accelerator default grid info
215 /** DVS statistics produced by accelerator grid info */
|
| /linux/drivers/crypto/intel/iaa/ |
| H A D | Kconfig | 2 tristate "Support for Intel(R) IAA Compression Accelerator"
8 decompression with the Intel Analytics Accelerator (IAA)
13 bool "Enable Intel(R) IAA Compression Accelerator Statistics"
17 Enable statistics for the IAA compression accelerator.
|
| /linux/arch/powerpc/platforms/book3s/ |
| H A D | Kconfig | 3 bool "IBM Virtual Accelerator Switchboard (VAS)"
7 This enables support for IBM Virtual Accelerator Switchboard (VAS).
10 provide access to accelerator coprocessors such as NX-GZIP and
12 and user-mode APIs for the NX-GZIP accelerator on POWER9 PowerNV
|
| /linux/Documentation/misc-devices/ |
| H A D | uacce.rst | 6 Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
8 So accelerator can access any data structure of the main cpu.
13 Uacce takes the hardware accelerator as a heterogeneous processor, while
21 | User application (CPU) | | Hardware Accelerator |
95 The accelerator device present itself as an Uacce object, which exports as
175 match the right accelerator accordingly.
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| /linux/Documentation/arch/powerpc/ |
| H A D | cxl.rst | 2 Coherent Accelerator Interface (CXL)
8 The coherent accelerator interface is designed to allow the
11 Accelerator Interface Architecture (CAIA).
13 IBM refers to this as the Coherent Accelerator Processor Interface
17 Coherent in this context means that the accelerator and CPUs can
46 The POWER Service Layer (PSL) and the Accelerator Function Unit
52 The AFU is the core part of the accelerator (eg. the compression,
86 this mode, only one userspace process can use the accelerator at
91 applications may use the accelerator (although specific AFUs may
102 A portion of the accelerator MMIO space can be directly mapped
[all …]
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| /linux/drivers/crypto/stm32/ |
| H A D | Kconfig | 8 This enables support for the CRC32 hw accelerator which can be found
23 This enables support for the HASH hw accelerator which can be found
33 This enables support for the CRYP (AES/DES/TDES) hw accelerator which
|
| /linux/Documentation/devicetree/bindings/powerpc/4xx/ |
| H A D | ppc440spe-adma.txt | 1 PPC440SPe DMA/XOR (DMA Controller and XOR Accelerator)
60 iii) XOR Accelerator node
64 - compatible : "amcc,xor-accelerator";
71 compatible = "amcc,xor-accelerator";
|
| /linux/drivers/misc/ocxl/ |
| H A D | Kconfig | 3 # Open Coherent Accelerator (OCXL) compatible devices
11 tristate "OpenCAPI coherent accelerator support"
17 Coherent Accelerator Processor Interface (OpenCAPI) devices.
|
| /linux/drivers/crypto/marvell/ |
| H A D | Kconfig | 19 Security Accelerator (CESA) which can be found on MVEBU and ORION
35 Accelerator Unit(CPT) found in OcteonTX series of processors.
55 Accelerator Unit(CPT) found in OcteonTX2 series of processors.
|
| /linux/drivers/net/ethernet/chelsio/inline_crypto/ |
| H A D | Kconfig | 22 Support Chelsio Inline TLS with Chelsio crypto accelerator.
34 Support Chelsio Inline IPsec with Chelsio crypto accelerator.
48 crypto accelerator. CONFIG_CHELSIO_TLS_DEVICE flag can be enabled
|
| /linux/Documentation/accel/ |
| H A D | introduction.rst | 16 Typically, a compute accelerator will belong to one of the following
54 devices. In addition, new features that will be added for the accelerator
61 from trying to use an accelerator as a GPU, the compute accelerators will be
67 The accelerator devices will be exposed to the user space with the dedicated
85 To expose your device as an accelerator, two changes are needed to
|
| /linux/Documentation/devicetree/bindings/media/ |
| H A D | st,stm32-dma2d.yaml | 7 title: STMicroelectronics STM32 Chrom-Art Accelerator DMA2D
10 Chrom-ART Accelerator(DMA2D), graphical hardware accelerator
|
| /linux/arch/sh/include/asm/ |
| H A D | hd64461.h | 93 #define HD64461_GRCFGR HD64461_IO_OFFSET(0x1044) /* Accelerator Configuration Register */
95 #define HD64461_GRCFGR_ACCSTATUS 0x10 /* Accelerator Status */
96 #define HD64461_GRCFGR_ACCRESET 0x08 /* Accelerator Reset */
97 #define HD64461_GRCFGR_ACCSTART_BITBLT 0x06 /* Accelerator Start BITBLT */
98 #define HD64461_GRCFGR_ACCSTART_LINE 0x04 /* Accelerator Start Line Drawing */
99 #define HD64461_GRCFGR_COLORDEPTH16 0x01 /* Sets Colordepth 16 for Accelerator */
100 #define HD64461_GRCFGR_COLORDEPTH8 0x01 /* Sets Colordepth 8 for Accelerator */
|
| /linux/drivers/soc/ti/ |
| H A D | Kconfig | 54 tristate "K3 Ring accelerator Sub System"
58 Say y here to support the K3 Ring accelerator module.
59 The Ring Accelerator (RINGACC or RA) provides hardware acceleration
|
| /linux/drivers/media/platform/samsung/s5p-g2d/ |
| H A D | Kconfig | 2 tristate "Samsung S5P and EXYNOS4 G2D 2d graphics accelerator driver"
10 2d graphics accelerator.
|
| /linux/drivers/misc/genwqe/ |
| H A D | Kconfig | 3 # IBM Accelerator Family 'GenWQE'
7 tristate "GenWQE PCIe Accelerator"
|
| /linux/Documentation/devicetree/bindings/arm/omap/ |
| H A D | iva.txt | 1 * TI - IVA (Imaging and Video Accelerator) subsystem
3 The IVA contain various audio, video or imaging HW accelerator
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| /linux/drivers/crypto/intel/qat/qat_420xx/ |
| H A D | adf_drv.c | 45 * If the accelerator is connected to a node with no memory in adf_probe()
46 * there is no point in using the accelerator since the remote in adf_probe()
66 dev_err(&pdev->dev, "Failed to add new accelerator device.\n"); in adf_probe()
121 /* Get accelerator capabilities mask */ in adf_probe()
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| /linux/drivers/crypto/intel/qat/qat_4xxx/ |
| H A D | adf_drv.c | 47 * If the accelerator is connected to a node with no memory in adf_probe()
48 * there is no point in using the accelerator since the remote in adf_probe()
68 dev_err(&pdev->dev, "Failed to add new accelerator device.\n"); in adf_probe()
123 /* Get accelerator capabilities mask */ in adf_probe()
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| /linux/Documentation/devicetree/bindings/soc/ti/ |
| H A D | k3-ringacc.yaml | 8 title: Texas Instruments K3 NavigatorSS Ring Accelerator
15 The Ring Accelerator (RA) is a machine which converts read/write accesses
25 The Ring Accelerator is a hardware module that is responsible for accelerating
|