xref: /linux/Documentation/devicetree/bindings/media/qcom,qcm2290-venus.yaml (revision bfe62a454542cfad3379f6ef5680b125f41e20f4) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/qcom,qcm2290-venus.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm QCM2290 Venus video encode and decode accelerators
8
9maintainers:
10  - Jorge Ramirez-Ortiz <jorge.ramirez@oss.qualcomm.com>
11
12description:
13  The Venus AR50_LITE IP is a video encode and decode accelerator present
14  on Qualcomm platforms.
15
16allOf:
17  - $ref: qcom,venus-common.yaml#
18
19properties:
20  compatible:
21    const: qcom,qcm2290-venus
22
23  power-domains:
24    maxItems: 3
25
26  power-domain-names:
27    items:
28      - const: venus
29      - const: vcodec0
30      - const: cx
31
32  clocks:
33    maxItems: 6
34
35  clock-names:
36    items:
37      - const: core
38      - const: iface
39      - const: bus
40      - const: throttle
41      - const: vcodec0_core
42      - const: vcodec0_bus
43
44  iommus:
45    maxItems: 2
46
47  interconnects:
48    maxItems: 2
49
50  interconnect-names:
51    items:
52      - const: video-mem
53      - const: cpu-cfg
54
55  operating-points-v2: true
56  opp-table:
57    type: object
58
59required:
60  - compatible
61  - power-domain-names
62  - iommus
63
64unevaluatedProperties: false
65
66examples:
67  - |
68    #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
69    #include <dt-bindings/interconnect/qcom,qcm2290.h>
70    #include <dt-bindings/interconnect/qcom,rpm-icc.h>
71    #include <dt-bindings/interrupt-controller/arm-gic.h>
72    #include <dt-bindings/power/qcom-rpmpd.h>
73
74    venus: video-codec@5a00000 {
75        compatible = "qcom,qcm2290-venus";
76        reg = <0x5a00000 0xf0000>;
77
78        interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
79
80        power-domains = <&gcc GCC_VENUS_GDSC>,
81                        <&gcc GCC_VCODEC0_GDSC>,
82                        <&rpmpd QCM2290_VDDCX>;
83        power-domain-names = "venus",
84                             "vcodec0",
85                             "cx";
86
87        operating-points-v2 = <&venus_opp_table>;
88
89        clocks = <&gcc GCC_VIDEO_VENUS_CTL_CLK>,
90                 <&gcc GCC_VIDEO_AHB_CLK>,
91                 <&gcc GCC_VENUS_CTL_AXI_CLK>,
92                 <&gcc GCC_VIDEO_THROTTLE_CORE_CLK>,
93                 <&gcc GCC_VIDEO_VCODEC0_SYS_CLK>,
94                 <&gcc GCC_VCODEC0_AXI_CLK>;
95        clock-names = "core",
96                       "iface",
97                       "bus",
98                       "throttle",
99                       "vcodec0_core",
100                       "vcodec0_bus";
101
102        memory-region = <&pil_video_mem>;
103
104        iommus = <&apps_smmu 0x860 0x0>,
105                 <&apps_smmu 0x880 0x0>;
106
107        interconnects = <&mmnrt_virt MASTER_VIDEO_P0 RPM_ALWAYS_TAG
108                         &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>,
109                        <&bimc MASTER_APPSS_PROC RPM_ACTIVE_TAG
110                         &config_noc SLAVE_VENUS_CFG RPM_ACTIVE_TAG>;
111        interconnect-names = "video-mem",
112                             "cpu-cfg";
113
114        venus_opp_table: opp-table {
115            compatible = "operating-points-v2";
116
117            opp-133333333 {
118                opp-hz = /bits/ 64 <133333333>;
119                required-opps = <&rpmpd_opp_low_svs>;
120            };
121
122            opp-240000000 {
123                opp-hz = /bits/ 64 <240000000>;
124                required-opps = <&rpmpd_opp_svs>;
125            };
126        };
127    };
128