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/freebsd/sys/x86/acpica/
H A Dmadt.c51 /* These two arrays are indexed by APIC IDs. */
72 static int madt_find_interrupt(int intr, void **apic, u_int *pin);
100 * Look for an ACPI Multiple APIC Description Table ("APIC")
200 * Initialize the local APIC on the BSP.
224 TUNABLE_INT_FETCH("hw.apic.x2apic_mode", &user_x2apic); in madt_setup_local()
248 printf("ACPI APIC Table: <%.*s %.*s>\n", in madt_setup_local()
253 * We ignore 64-bit local APIC override entries. Should we in madt_setup_local()
276 printf("Try disabling either ACPI or apic support.\n"); in madt_setup_io()
283 /* First, we run through adding I/O APIC's. */ in madt_setup_io()
296 printf("MADT: Could not find APIC for SCI IRQ %u\n", in madt_setup_io()
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/freebsd/share/man/man4/
H A Dapic.429 .Nm apic
30 .Nd Advanced Programmable Interrupt Controller (APIC) driver
37 .Cd "device apic"
43 .It Va hint.apic. Ns Ar X Ns Va .clock
47 .It Va hint.apic. Ns Ar X Ns Va .disabled
48 Set this to 1 to disable APIC support, falling back to the legacy PIC.
51 There are two components in the Intel APIC system, the local APIC (LAPIC)
52 and the I/O APIC.
53 There is one local APIC in each CPU in the system.
54 There is typically one I/O APIC for each peripheral bus in the system.
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/freebsd/sys/x86/x86/
H A Dio_apic.c63 static MALLOC_DEFINE(M_IOAPIC, "io_apic", "I/O APIC structures");
66 * I/O APIC interrupt source driver. Each pin is assigned an IRQ cookie
68 * APIC has a contiguous chunk of the System Interrupt address space.
71 * IRQ 0 is actually an ExtINT pin. The apic enumerators override the
74 * Documentation for the I/O APIC: "82093AA I/O Advanced Programmable
97 u_int io_hw_apic_id:8; /* Content of APIC ID register */
110 static u_int ioapic_read(volatile ioapic_t *apic, int reg);
111 static void ioapic_write(volatile ioapic_t *apic, int reg, u_int val);
151 "Enable the ExtINT pin in the first I/O APIC");
183 * Otherwise, if IO-APIC is too old to provide EOIR, in _ioapic_eoi_source()
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H A Dlocal_apic.c33 * Local APIC support on Pentium and later processors.
89 static MALLOC_DEFINE(M_LAPIC, "local_apic", "Local APIC items");
149 /* Global defaults for local APIC LVT entries. */
160 /* Global defaults for AMD local APIC ELVT entries. */
210 SYSCTL_NODE(_hw, OID_AUTO, apic, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
211 "APIC options");
220 "timeout (in us) for APIC Delivery Status to become Idle (xAPIC only)");
230 * local CPU's APIC, so there isn't in fact a race here. Furthermore, the
385 panic("bad APIC LVT delivery mode: %#x\n", value); in lvt_mode_impl()
423 * Map the local APIC and setup necessary interrupt vectors.
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H A Dmptable.c62 #define MAX_LAPIC_ID 63 /* Max local APIC ID for HTT fixup */
64 #define MAX_LAPIC_ID 31 /* Max local APIC ID for HTT fixup */
85 {2, 8, "I/O APIC"},
391 * Initialize the local APIC on the BSP.
438 /* Second, we run through adding I/O APIC's and buses. */ in mptable_setup_io()
444 /* Fourth, we register all the I/O APIC's. */ in mptable_setup_io()
452 /* Finally, we throw the switch to enable the I/O APIC's. */ in mptable_setup_io()
562 io_apic_entry_ptr apic; in mptable_count_items_handler() local
573 apic = (io_apic_entry_ptr)entry; in mptable_count_items_handler()
574 if (apic->apic_flags & IOAPICENTRY_FLAG_EN) in mptable_count_items_handler()
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H A Dmp_x86.c159 "Maximum permitted APIC ID for interrupt delivery (-1 is unlimited)");
225 "APIC IDs than a package (%u > %u)\n", level, in add_deterministic_cache()
231 "APIC IDs than a core (%u < %u)\n", level, in add_deterministic_cache()
265 * XXX Lack of an AMD IOMMU driver prevents use of APIC IDs above in topo_probe_amd()
444 printf("WARNING: core covers more APIC IDs than a package\n"); in topo_probe_intel_0xb()
518 * assumption that APIC ID to hardware component ID mapping is
555 ("bug in APIC topology discovery")); in topo_probe()
584 ("bug in APIC topology discovery")); in topo_probe()
586 ("bug in APIC topology discovery")); in topo_probe()
588 ("bug in APIC topology discovery")); in topo_probe()
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H A Dmsi.c35 * x86 are basically APIC messages that the northbridge delivers directly
36 * to the local APICs as if they had come from an I/O APIC.
103 * thus certain properties (such as the local APIC ID target on x86).
107 * Note that local APIC ID is kind of special. Each message will be
119 u_int msi_cpu; /* Local APIC ID. (g) */
299 printf("msi: Assigning %s IRQ %d to local APIC %u vector %u\n", in msi_assign_cpu()
309 printf("msi: Assigning MSI IRQ %d to local APIC %u vector %u\n", in msi_assign_cpu()
315 "remap irq %u to APIC ID %u failed (error %d)\n", in msi_assign_cpu()
502 "msi: routing MSI IRQ %d to local APIC %u vector %u\n", in msi_alloc()
648 printf("%s: unsupported destination APIC ID %u\n", __func__, in msi_map()
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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dintel,ce4100-ioapic.yaml7 title: Intel I/O Advanced Programmable Interrupt Controller (IO APIC)
13 Intel's Advanced Programmable Interrupt Controller (APIC) is a
14 family of interrupt controllers. The APIC is a split
16 into the processor itself and an external I/O APIC. Local APIC
18 from internal sources and from an external I/O APIC (ioapic).
26 This schema defines bindings for I/O APIC interrupt controller.
H A Dintel,ce4100-lapic.yaml13 Intel's Advanced Programmable Interrupt Controller (APIC) is a
14 family of interrupt controllers. The APIC is a split
16 into the processor itself and an external I/O APIC. Local APIC
18 from internal sources and from an external I/O APIC (ioapic).
26 This schema defines bindings for local APIC interrupt controller.
H A Dintel,ce4100-ioapic.txt4 * Intel I/O Advanced Programmable Interrupt Controller (IO APIC)
16 IO APIC. The second number (S) represents the sense of interrupt which
23 * Local APIC
/freebsd/sys/contrib/edk2/Include/IndustryStandard/
H A DAcpi20.h247 /// Multiple APIC Description Table header definition. The rest of the table
262 /// Multiple APIC Flags
268 // Multiple APIC Description Table APIC structure types
283 // APIC Structure Definitions
287 /// Processor Local APIC Structure Definition
298 /// Local APIC Flags. All other bits are reserved and must be 0.
303 /// IO APIC Structure
337 /// Local APIC NMI Structure
348 /// Local APIC Address Override Structure
483 /// "APIC" Multiple APIC Description Table
H A DAcpi30.h292 /// Multiple APIC Description Table header definition. The rest of the table
307 /// Multiple APIC Flags
313 // Multiple APIC Description Table APIC structure types
328 // APIC Structure Definitions
332 /// Processor Local APIC Structure Definition
343 /// Local APIC Flags. All other bits are reserved and must be 0.
348 /// IO APIC Structure
406 /// Local APIC NMI Structure
417 /// Local APIC Address Override Structure
531 /// Processor Local APIC/SAPIC Affinity Structure Definition
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H A DAcpi10.h498 /// Multiple APIC Description Table header definition. The rest of the table
513 /// Multiple APIC Flags
519 // Multiple APIC Description Table APIC structure types
530 // APIC Structure Definitions
534 /// Processor Local APIC Structure Definition.
545 /// Local APIC Flags. All other bits are reserved and must be 0.
550 /// IO APIC Structure.
584 /// Local APIC NMI Structure.
614 /// "APIC" Multiple APIC Description Table.
H A DAcpi40.h259 /// Multiple APIC Description Table header definition. The rest of the table
274 /// Multiple APIC Flags
280 // Multiple APIC Description Table APIC structure types
297 // APIC Structure Definitions
301 /// Processor Local APIC Structure Definition
312 /// Local APIC Flags. All other bits are reserved and must be 0.
317 /// IO APIC Structure
375 /// Local APIC NMI Structure
386 /// Local APIC Address Override Structure
525 /// Processor Local APIC/SAPIC Affinity Structure Definition
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/freebsd/sys/x86/include/
H A Dapicreg.h32 * Local && I/O APIC definitions.
36 * Pentium P54C+ Built-in APIC
39 * Base Address of Built-in APIC in memory location
42 * Map of APIC Registers:
47 * 020 ID Local APIC ID R/W
48 * 030 VER Local APIC Version R
116 * LOCAL APIC structure
265 * non-APIC purposes in the future processor models.
270 * I/O APIC structure
290 * LOCAL APIC defines
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H A Dapicvar.h32 * Local && I/O APIC variable definitions.
36 * Layout of local APIC interrupt vectors:
83 * x2APIC. IPIs are not sent to I/O APICs so it's acceptable for an I/O APIC
97 * Each local apic has an interrupt receive fifo that is two entries deep
99 * Once the fifo is full the APIC can no longer receive interrupts for this
110 /* Interrupts for local APIC LVT entries other than the timer. */
149 * it is not a normal interrupt. (Does not use the APIC's interrupt fifo)
171 * An APIC enumerator is a pseudo bus driver that enumerates APIC's including
172 * CPU's and I/O APIC's.
/freebsd/sys/conf/
H A Dfiles.i38664 #i386/i386/apic_vector.S optional apic
127 x86/acpica/madt.c optional acpi apic
130 x86/isa/elcr.c optional atpic | apic
133 x86/x86/io_apic.c optional apic
134 x86/x86/local_apic.c optional apic
135 x86/x86/mptable.c optional apic
136 x86/x86/mptable_pci.c optional apic pci
137 x86/x86/msi.c optional apic pci
/freebsd/sys/amd64/amd64/
H A Dapic_vector.S60 /* End Of Interrupt to APIC */
90 movq lapic_map, %rdx /* pointer to local APIC */
108 * 8259 PIC for missing INTs. See the APIC documentation for details.
126 * Local APIC periodic timer handler.
136 * Local APIC CMCI handler.
145 * Local APIC error interrupt handler.
/freebsd/sys/i386/i386/
H A Dapic_vector.S49 /* End Of Interrupt to APIC */
87 movl lapic_map, %edx /* pointer to local APIC */
106 * 8259 PIC for missing INTs. See the APIC documentation for details.
126 * Local APIC periodic timer handler.
143 * Local APIC CMCI handler.
158 * Local APIC error interrupt handler.
/freebsd/tools/tools/ncpus/
H A Dacpi.c65 struct MADT_local_apic *apic; in acpi_handle_apic() local
73 apic = &mp->body.local_apic; in acpi_handle_apic()
74 warnx("MADT: Found CPU APIC ID %d %s", in acpi_handle_apic()
75 apic->cpu_id, in acpi_handle_apic()
76 apic->flags & ACPI_MADT_APIC_LOCAL_FLAG_ENABLED ? in acpi_handle_apic()
78 if (apic->flags & ACPI_MADT_APIC_LOCAL_FLAG_ENABLED) in acpi_handle_apic()
150 if (!memcmp(sdp->signature, "APIC", 4)) in acpi_handle_rsdt()
/freebsd/sys/contrib/device-tree/Bindings/x86/
H A Dce4100.txt6 Many of the "generic" devices like HPET or IO APIC have the ce4100
38 Local APIC ID, the unique number assigned to each processor by
52 If the OS is using the IO-APIC for interrupt routing then the reported
/freebsd/sys/contrib/xen/hvm/
H A Dhvm_info_table.h41 * that Xen's vCPU id always equals to ACPI (not APIC!) id in MADT table which
50 /* Should firmware build APIC descriptors (APIC MADT / MP BIOS)? */
/freebsd/sys/amd64/vmm/io/
H A Dvlapic_priv.h35 * APIC Register: Offset Description
37 #define APIC_OFFSET_ID 0x20 /* Local APIC ID */
38 #define APIC_OFFSET_VER 0x30 /* Local APIC Version */
161 * The 'isrvec_stk' is a stack of vectors injected by the local apic.
172 * Copies of some registers in the virtual APIC page. We do this for
/freebsd/sys/x86/xen/
H A Dxen_apic.c110 /*------------------------------- Xen PV APIC --------------------------------*/
122 * using the local APIC, or an hypercall as a shortcut like it's done in send_nmi()
170 "Sending NMI using hypercall failed (%d) switching to APIC\n", rc); in xen_pv_lapic_ipi_vectored()
305 * Those functions are provided outside of the Xen PV APIC implementation
306 * so PVHVM guests can also use PV IPIs without having an actual Xen PV APIC,
342 * Check whether the APIC virtualization is hardware assisted, as in xen_setup_cpus()
/freebsd/sys/x86/iommu/
H A Damd_reg.h197 #define AMDIOMMU_CTRL_GAPPI_EN 0x0080000000000000ull /* Guest APIC phys proc intr En */
392 u_int dest:8; /* Destination APIC */
407 u_int dest:8; /* Destination APIC */
426 u_int dest:8; /* Destination APIC for dorbell */
431 uint64_t vapicrp:40; /* 51:12 bits of SPA for APIC backing page */
445 u_int dest0:24; /* Destination APIC 23:0 */
450 u_int dest1:8; /* Destination APIC 31:24 */
464 u_int dest0:24; /* Destination APIC for dorbell 23:0 */
468 uint64_t vapicrp:40; /* 51:12 bits of SPA for APIC backing page */
470 u_int dest1:8; /* Destination APIC 31:24 */

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