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/linux/arch/riscv/kvm/
H A Daia_device.c35 kvm->arch.aia.in_kernel = true; in aia_create()
50 struct kvm_aia *aia = &kvm->arch.aia; in aia_config() local
76 aia->mode = *nr; in aia_config()
78 *nr = aia->mode; in aia_config()
88 aia->nr_ids = *nr; in aia_config()
90 *nr = aia->nr_ids; in aia_config()
97 aia->nr_sources = *nr; in aia_config()
99 *nr = aia->nr_sources; in aia_config()
105 aia->nr_group_bits = *nr; in aia_config()
107 *nr = aia->nr_group_bits; in aia_config()
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H A Dvcpu.c163 /* Setup VCPU AIA */ in kvm_arch_vcpu_create()
193 /* Cleanup VCPU AIA context */ in kvm_arch_vcpu_destroy()
360 /* Flush AIA high interrupts */ in kvm_riscv_vcpu_flush_interrupts()
394 /* Sync-up AIA high interrupts */ in kvm_riscv_vcpu_sync_interrupts()
456 /* Check AIA high interrupts */ in kvm_riscv_vcpu_has_interrupts()
926 /* Update AIA HW state before entering guest */ in kvm_arch_vcpu_ioctl_run()
H A Daia.c223 /* If AIA not available then redirect trap */ in kvm_riscv_vcpu_aia_rmw_topei()
227 /* If AIA not initialized then forward to user space */ in kvm_riscv_vcpu_aia_rmw_topei()
383 /* If AIA not available then redirect trap */ in kvm_riscv_vcpu_aia_rmw_ireg()
655 /* Enable KVM AIA support */ in kvm_riscv_aia_init()
H A Daia_imsic.c785 if (kvm->arch.aia.mode == KVM_DEV_RISCV_AIA_MODE_EMUL) in kvm_riscv_vcpu_aia_imsic_update()
803 if (kvm->arch.aia.mode == KVM_DEV_RISCV_AIA_MODE_HWACCEL) { in kvm_riscv_vcpu_aia_imsic_update()
1073 if (!kvm->arch.aia.nr_ids) in kvm_riscv_vcpu_aia_imsic_init()
1083 imsic->nr_msis = kvm->arch.aia.nr_ids + 1; in kvm_riscv_vcpu_aia_imsic_init()
/linux/tools/arch/riscv/include/asm/
H A Dcsr.h172 /* AIA CSR bits */
301 /* Supervisor-Level Window to Indirectly Accessed Registers (AIA) */
305 /* Supervisor-Level Interrupts (AIA) */
309 /* Supervisor-Level High-Half CSRs (AIA) */
342 /* Virtual Interrupts and Interrupt Priorities (H-extension with AIA) */
348 /* VS-Level Window to Indirectly Accessed Registers (H-extension with AIA) */
352 /* VS-Level Interrupts (H-extension with AIA) */
356 /* Hypervisor and VS-Level High-Half CSRs (H-extension with AIA) */
388 /* Machine-Level Window to Indirectly Accessed Registers (AIA) */
392 /* Machine-Level Interrupts (AIA) */
[all …]
/linux/arch/riscv/include/asm/
H A Dcsr.h184 /* AIA CSR bits */
333 /* Supervisor-Level Window to Indirectly Accessed Registers (AIA) */
337 /* Supervisor-Level Interrupts (AIA) */
341 /* Supervisor-Level High-Half CSRs (AIA) */
374 /* Virtual Interrupts and Interrupt Priorities (H-extension with AIA) */
380 /* VS-Level Window to Indirectly Accessed Registers (H-extension with AIA) */
384 /* VS-Level Interrupts (H-extension with AIA) */
388 /* Hypervisor and VS-Level High-Half CSRs (H-extension with AIA) */
422 /* Machine-Level Window to Indirectly Accessed Registers (AIA) */
426 /* Machine-Level Interrupts (AIA) */
[all …]
H A Dkvm_aia.h63 /* CPU AIA CSR context of Guest VCPU */
78 #define kvm_riscv_aia_initialized(k) ((k)->arch.aia.initialized)
80 #define irqchip_in_kernel(k) ((k)->arch.aia.in_kernel)
/linux/drivers/irqchip/
H A Dirq-riscv-aplic-msi.c44 * sources" of the RISC-V AIA specification says: in aplic_msi_irq_retrigger_level()
197 * controller to be RISC-V AIA IMSIC controller. in aplic_msi_setup()
H A Dirq-riscv-intc.c202 riscv_isa_extension_available(NULL, SxAIA) ? " using AIA" : ""); in riscv_intc_init_common()
H A Dirq-riscv-imsic-state.c819 pr_err("%pfwP: AIA support not available\n", fwnode); in imsic_setup_state()
/linux/tools/testing/selftests/kvm/riscv/
H A Dget-reg-list.c139 /* AIA registers are always available when Ssaia can't be disabled */ in filter_reg()
1068 {"aia", .feature = KVM_RISCV_ISA_EXT_SSAIA, .regs = aia_regs, .regs_n = ARRAY_SIZE(aia_regs),}
1147 KVM_ISA_EXT_SUBLIST_CONFIG(aia, AIA);
/linux/
H A DMAINTAINERS22048 RISC-V AIA DRIVERS