Searched full:aia (Results 1 – 12 of 12) sorted by relevance
39 kvm->arch.aia.in_kernel = true; in aia_create()54 struct kvm_aia *aia = &kvm->arch.aia; in aia_config() local80 aia->mode = *nr; in aia_config()82 *nr = aia->mode; in aia_config()92 aia->nr_ids = *nr; in aia_config()94 *nr = aia->nr_ids; in aia_config()101 aia->nr_sources = *nr; in aia_config()103 *nr = aia->nr_sources; in aia_config()109 aia->nr_group_bits = *nr; in aia_config()111 *nr = aia->nr_group_bits; in aia_config()[all …]
183 /* Setup VCPU AIA */ in kvm_arch_vcpu_create()213 /* Cleanup VCPU AIA context */ in kvm_arch_vcpu_destroy()384 /* Flush AIA high interrupts */ in kvm_riscv_vcpu_flush_interrupts()424 /* Sync-up AIA high interrupts */ in kvm_riscv_vcpu_sync_interrupts()500 /* Check AIA high interrupts */ in kvm_riscv_vcpu_has_interrupts()953 /* Update AIA HW state before entering guest */ in kvm_arch_vcpu_ioctl_run()
802 if (kvm->arch.aia.mode == KVM_DEV_RISCV_AIA_MODE_EMUL) in kvm_riscv_vcpu_aia_imsic_update()824 if (kvm->arch.aia.mode == KVM_DEV_RISCV_AIA_MODE_HWACCEL) { in kvm_riscv_vcpu_aia_imsic_update()1110 if (!kvm->arch.aia.nr_ids) in kvm_riscv_vcpu_aia_imsic_init()1120 imsic->nr_msis = kvm->arch.aia.nr_ids + 1; in kvm_riscv_vcpu_aia_imsic_init()
729 /* copy AIA csr regs */ in copy_csr_reg_indices()
185 /* AIA CSR bits */314 /* Supervisor-Level Window to Indirectly Accessed Registers (AIA) */318 /* Supervisor-Level Interrupts (AIA) */322 /* Supervisor-Level High-Half CSRs (AIA) */355 /* Virtual Interrupts and Interrupt Priorities (H-extension with AIA) */361 /* VS-Level Window to Indirectly Accessed Registers (H-extension with AIA) */365 /* VS-Level Interrupts (H-extension with AIA) */369 /* Hypervisor and VS-Level High-Half CSRs (H-extension with AIA) */401 /* Machine-Level Window to Indirectly Accessed Registers (AIA) */405 /* Machine-Level Interrupts (AIA) */[all …]
210 /* AIA CSR bits */383 /* Supervisor-Level Window to Indirectly Accessed Registers (AIA) */393 /* Supervisor-Level Interrupts (AIA) */397 /* Supervisor-Level High-Half CSRs (AIA) */430 /* Virtual Interrupts and Interrupt Priorities (H-extension with AIA) */436 /* VS-Level Window to Indirectly Accessed Registers (H-extension with AIA) */448 /* VS-Level Interrupts (H-extension with AIA) */452 /* Hypervisor and VS-Level High-Half CSRs (H-extension with AIA) */486 /* Machine-Level Window to Indirectly Accessed Registers (AIA) */496 /* Machine-Level Interrupts (AIA) */[all …]
44 * sources" of the RISC-V AIA specification says: in aplic_msi_irq_retrigger_level()197 * controller to be RISC-V AIA IMSIC controller. in aplic_msi_setup()
39 * interrupt-enable bits. The AIA specification states that "Whenever interrupt source i is in aplic_restore_states()
146 /* AIA registers are always available when Ssaia can't be disabled */ in filter_reg() 1225 KVM_ISA_EXT_SUBLIST_CONFIG(aia, SSAIA);
182 request #42 from riscv/jhauser-2023-RC4") of riscv-aia.228 ("Merge pull request #42 from riscv/jhauser-2023-RC4") of riscv-aia.
4240 * for which we do need to set this flag. (AIA) in ntfs_non_resident_attr_shrink()
23877 RISC-V AIA DRIVERS