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/linux/Documentation/devicetree/bindings/sound/
H A Dnvidia,tegra-audio-graph-card.yaml132 dmas = <&adma 1>, <&adma 1>,
133 <&adma 2>, <&adma 2>,
134 <&adma 3>, <&adma 3>,
135 <&adma 4>, <&adma 4>,
136 <&adma 5>, <&adma 5>,
137 <&adma 6>, <&adma 6>,
138 <&adma 7>, <&adma 7>,
139 <&adma 8>, <&adma 8>,
140 <&adma 9>, <&adma 9>,
141 <&adma 10>, <&adma 10>;
H A Dnvidia,tegra210-ahub.yaml13 external interfaces such as I2S, DMIC, DSPK. It interfaces with ADMA
150 dmas = <&adma 1>, <&adma 1>,
151 <&adma 2>, <&adma 2>,
152 <&adma 3>, <&adma 3>,
153 <&adma 4>, <&adma 4>,
154 <&adma 5>, <&adma 5>,
155 <&adma 6>, <&adma 6>,
156 <&adma 7>, <&adma 7>,
157 <&adma 8>, <&adma 8>,
158 <&adma 9>, <&adma 9>,
[all …]
/linux/Documentation/devicetree/bindings/dma/
H A Dnvidia,tegra210-adma.yaml4 $id: http://devicetree.org/schemas/dma/nvidia,tegra210-adma.yaml#
7 title: NVIDIA Tegra Audio DMA (ADMA) controller
20 - nvidia,tegra210-adma
21 - nvidia,tegra186-adma
22 - nvidia,tegra264-adma
25 - nvidia,tegra234-adma
26 - nvidia,tegra194-adma
27 - const: nvidia,tegra186-adma
52 description: Must contain one entry for the ADMA module clock
83 - nvidia,tegra210-adma
[all …]
H A Dmarvell,mmp-dma.yaml19 - marvell,adma-1.0
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra264.dtsi66 adma: dma-controller@9440000 { label
67 compatible = "nvidia,tegra264-adma";
151 /* ADMA is under AHUB range, its excluded in the defined range */
1152 dmas = <&adma 1>, <&adma 1>,
1153 <&adma 2>, <&adma 2>,
1154 <&adma 3>, <&adma 3>,
1155 <&adma 4>, <&adma 4>,
1156 <&adma 5>, <&adma 5>,
1157 <&adma 6>, <&adma 6>,
1158 <&adma 7>, <&adma 7>,
[all …]
H A Dtegra186.dtsi453 dmas = <&adma 1>, <&adma 1>,
454 <&adma 2>, <&adma 2>,
455 <&adma 3>, <&adma 3>,
456 <&adma 4>, <&adma 4>,
457 <&adma 5>, <&adma 5>,
458 <&adma 6>, <&adma 6>,
459 <&adma 7>, <&adma 7>,
460 <&adma 8>, <&adma 8>,
461 <&adma 9>, <&adma 9>,
462 <&adma 10>, <&adma 10>,
[all …]
H A Dtegra194.dtsi548 dmas = <&adma 1>, <&adma 1>,
549 <&adma 2>, <&adma 2>,
550 <&adma 3>, <&adma 3>,
551 <&adma 4>, <&adma 4>,
552 <&adma 5>, <&adma 5>,
553 <&adma 6>, <&adma 6>,
554 <&adma 7>, <&adma 7>,
555 <&adma 8>, <&adma 8>,
556 <&adma 9>, <&adma 9>,
557 <&adma 10>, <&adma 10>,
[all …]
H A Dtegra210.dtsi1496 dmas = <&adma 1>, <&adma 1>,
1497 <&adma 2>, <&adma 2>,
1498 <&adma 3>, <&adma 3>,
1499 <&adma 4>, <&adma 4>,
1500 <&adma 5>, <&adma 5>,
1501 <&adma 6>, <&adma 6>,
1502 <&adma 7>, <&adma 7>,
1503 <&adma 8>, <&adma 8>,
1504 <&adma 9>, <&adma 9>,
1505 <&adma 10>, <&adma 10>;
[all …]
H A Dtegra234.dtsi1441 dmas = <&adma 1>, <&adma 1>,
1442 <&adma 2>, <&adma 2>,
1443 <&adma 3>, <&adma 3>,
1444 <&adma 4>, <&adma 4>,
1445 <&adma 5>, <&adma 5>,
1446 <&adma 6>, <&adma 6>,
1447 <&adma 7>, <&adma 7>,
1448 <&adma 8>, <&adma 8>,
1449 <&adma 9>, <&adma 9>,
1450 <&adma 10>, <&adma 10>,
[all …]
/linux/drivers/ata/
H A Dpdc_adma.c3 * pdc_adma.c - Pacific Digital Corporation ADMA
12 * Supports ATA disks in single-packet ADMA mode.
15 * TODO: Use ADMA transfers for ATAPI devices, when possible.
36 /* macro to calculate base address for ADMA regs */
57 ADMA_CONTROL = 0x0000, /* ADMA control */
58 ADMA_STATUS = 0x0002, /* ADMA status */
69 aRSTADM = (1 << 5), /* ADMA logic reset */
104 board_1841_idx = 0, /* ADMA 2-port controller */
181 /* reset ADMA to idle state */ in adma_reset_engine()
197 /* reset the ADMA engine */ in adma_reinit_engine()
[all …]
H A Dsata_nv.c18 * similar to the ADMA specification (with some modifications).
91 /* BAR5 offset to ADMA general registers */
96 /* BAR5 offset to ADMA ports */
99 /* size of ADMA port register space */
102 /* ADMA port registers */
188 /* ADMA Physical Region Descriptor - one SG segment */
207 /* ADMA Command Parameter Block
341 ADMA, enumerator
559 /* ADMA */
615 ata_port_warn(ap, "timeout waiting for ADMA IDLE, stat=0x%hx\n", in nv_adma_register_mode()
[all …]
H A Dsata_inic162x.c35 * show how to use the IDMA (ADMA + some initio specific twists)
154 IDMA_STAT_CPBERR = (1 << 1), /* ADMA CPB error */
155 IDMA_STAT_LGCY = (1 << 3), /* ADMA legacy */
156 IDMA_STAT_UIRQ = (1 << 4), /* ADMA unsolicited irq */
157 IDMA_STAT_STPD = (1 << 5), /* ADMA stopped */
158 IDMA_STAT_PSD = (1 << 6), /* ADMA pause */
159 IDMA_STAT_DONE = (1 << 7), /* ADMA done */
548 /* fire up the ADMA engine */ in inic_qc_issue()
/linux/drivers/dma/
H A Dtegra210-adma.c3 * ADMA driver for Nvidia's Tegra210 ADMA controller.
105 * @max_page: Maximum ADMA Channel Page.
134 * struct tegra_adma_chan_regs - Tegra ADMA channel registers
148 * struct tegra_adma_desc - Tegra ADMA descriptor to manage transfer requests.
159 * struct tegra_adma_chan - Tegra ADMA channel information
184 * struct tegra_adma - Tegra ADMA controller information
326 /* Enable global ADMA registers */ in tegra_adma_init()
419 /* Disable ADMA */ in tegra_adma_stop()
475 /* Start ADMA */ in tegra_adma_start()
706 * ADMA channel. in tegra_adma_set_xfer_params()
[all …]
H A DKconfig79 tristate "AMCC PPC440SPe ADMA support"
475 Say Y here if you enabled MMP ADMA, otherwise say N.
647 tristate "NVIDIA Tegra210 ADMA support"
652 Support for the NVIDIA Tegra210/Tegra186/Tegra194/Tegra234 ADMA
/linux/include/linux/platform_data/
H A Ddma-iop32x.h25 * struct iop_adma_device - internal representation of an ADMA device
27 * @id: HW ADMA Device selector
41 * struct iop_adma_chan - internal representation of an ADMA device
67 * struct iop_adma_desc_slot - IOP-ADMA software descriptor
/linux/drivers/dma/ppc4xx/
H A Dadma.h46 * struct ppc440spe_adma_device - internal representation of an ADMA device
51 * @id: HW ADMA Device selector
74 * struct ppc440spe_adma_chan - internal representation of an ADMA channel
119 * struct ppc440spe_adma_desc_slot - PPC440SPE-ADMA software descriptor
H A Dadma.c15 * ADMA driver written by D.Williams.
34 #include "adma.h"
71 /* The list of channels exported by ppc440spe ADMA */
348 * this slot will be pasted from ADMA level in ppc440spe_desc_init_dma01pq()
483 * this slot will be pasted from ADMA level in ppc440spe_desc_init_dma01pqzero_sum()
886 * ADMA channel low-level routines
1218 * ADMA device level
1339 /* In the current implementation of ppc440spe ADMA driver it in ppc440spe_adma_estimate()
1541 dev_dbg(chan->device->common.dev, "ppc440spe adma%d: %s\n", in __ppc440spe_adma_slot_cleanup()
1787 printk(KERN_INFO "SPE ADMA Channel only initialized" in ppc440spe_adma_alloc_chan_resources()
[all …]
H A DMakefile2 obj-$(CONFIG_AMCC_PPC440SPE_ADMA) += adma.o
/linux/sound/soc/tegra/
H A DKconfig127 Config to enable ADMAIF which is the interface between ADMA and
128 Audio Hub (AHUB). Each ADMA channel that sends/receives data to/
129 from AHUB must interface through an ADMAIF channel. ADMA channel
131 ADMA channel receiving data from AHUB pairs with an ADMAIF Rx
H A Dtegra_isomgr_bw.c5 // ADMA bandwidth calculation
129 MODULE_DESCRIPTION("Tegra ADMA Bandwidth Request driver");
/linux/Documentation/devicetree/bindings/powerpc/4xx/
H A Dppc440spe-adma.txt3 Device nodes needed for operation of the ppc440spe-adma driver
6 by ADMA driver for configuration of RAID-6 H/W capabilities of
/linux/Documentation/devicetree/bindings/mfd/
H A Dsamsung,exynos5433-lpass.yaml90 dmas = <&adma 0>, <&adma 2>;
/linux/Documentation/devicetree/bindings/dma/xilinx/
H A Dxlnx,zynqmp-dma-1.0.yaml32 description: memory map for gdma/adma module access
/linux/drivers/clk/imx/
H A Dclk-imx8qxp-lpcg.h50 /* ADMA SS */
/linux/include/dt-bindings/clock/
H A Dxlnx-versal-clk.h90 #define ADMA 81 macro

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