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Searched +full:800 +full:khz (Results 1 – 25 of 38) sorted by relevance

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/freebsd/sys/dev/videomode/
H A Dmodelines18 # 640x350 @ 85Hz (VESA) hsync: 37.9kHz
21 # 640x400 @ 85Hz (VESA) hsync: 37.9kHz
24 # 720x400 @ 70Hz (EDID established timing) hsync: 31.47kHz
27 # 720x400 @ 85Hz (VESA) hsync: 37.9kHz
30 # 720x400 @ 88Hz (EDID established timing) hsync: 39.44kHz
33 # 640x480 @ 60Hz (Industry standard) hsync: 31.5kHz
34 ModeLine "640x480" 25.175 640 656 752 800 480 490 492 525 -hsync -vsync
36 # 640x480 @ 72Hz (VESA) hsync: 37.9kHz
39 # 640x480 @ 75Hz (VESA) hsync: 37.5kHz
42 # 640x480 @ 85Hz (VESA) hsync: 43.3kHz
[all …]
H A Dedidreg.h135 #define EDID_EST_TIMING_800_600_56 0x0200 /* 800x600 @ 56Hz */
136 #define EDID_EST_TIMING_800_600_60 0x0100 /* 800x600 @ 60Hz */
137 #define EDID_EST_TIMING_800_600_72 0x0080 /* 800x600 @ 72Hz */
138 #define EDID_EST_TIMING_800_600_75 0x0040 /* 800x600 @ 75Hz */
228 #define EDID_DESC_RANGE_MIN_HFREQ(ptr) ((ptr)[7]) /* kHz */
229 #define EDID_DESC_RANGE_MAX_HFREQ(ptr) ((ptr)[8]) /* kHz */
H A Dedid.c56 "800x600x75",
57 "800x600x72",
58 "800x600x60",
59 "800x600x56",
241 printf("\tHorizontal: %d - %d kHz\n", in edid_print()
/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Drichtek,rt6245-regulator.yaml63 Buck switch frequency selection. Each respective value means 400KHz,
64 800KHz, 1200KHz. If this property is missing then keep in chip default.
/freebsd/sys/contrib/device-tree/Bindings/leds/backlight/
H A Dqcom-wled.yaml84 kHz; switching frequency.
86 enum: [ 600, 640, 685, 738, 800, 872, 960, 1066, 1200, 1371, 1600, 1920,
205 default: 800
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6dl-b1x5pv2.dtsi17 /* Do not allow frequencies above 800MHz */
21 /* kHz uV */
26 /* ARM kHz SOC-PU uV */
34 /* kHz uV */
39 /* ARM kHz SOC-PU uV */
H A Dimx53-usbarmory.dts79 * Not every i.MX53 P/N supports clock > 800MHz.
84 /* kHz */
H A Dimx53-sk-imx53.dts64 /* CPU rated to 800 MHz, not the default 1.2GHz. */
66 /* kHz uV */
/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-rk3x.yaml81 SCL frequency to use (in Hz). If omitted, 100kHz is used.
140 i2c-scl-rising-time-ns = <800>;
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Ds5pv210-aquila.dts69 i2c-gpio,delay-us = <2>; /* ~100 kHz */
230 regulator-name = "32KHz AP";
380 hactive = <800>;
H A Dexynos4210-universal_c210.dts154 vactive = <800>;
209 /* Corresponds to 800MHz */
493 regulator-name = "32KHz AP";
498 regulator-name = "32KHz CP";
H A Ds5pv210-goni.dts81 i2c-gpio,delay-us = <2>; /* ~100 kHz */
228 regulator-name = "32KHz AP";
433 vactive = <800>;
/freebsd/sys/contrib/device-tree/Bindings/input/
H A Diqs626a.yaml284 1: 2 MHz (500 kHz)
285 2: 1 MHz (250 kHz)
286 3: 500 kHz (125 kHz)
400 3: 2 MHz (500 kHz)
604 1: 2 MHz (500 kHz)
605 2: 1 MHz (250 kHz)
606 3: 500 kHz (125 kHz)
799 azoteq,timeout-swipe-ms = <800>;
/freebsd/sys/contrib/device-tree/Bindings/iio/pressure/
H A Dhoneywell,hsc030pa.yaml31 exceed 800kHz and the MOSI signal is not required.
/freebsd/sys/contrib/device-tree/src/arm/synaptics/
H A Dberlin2q.dtsi35 /* kHz uV */
53 /* kHz uV */
71 /* kHz uV */
89 /* kHz uV */
263 gpio1: gpio@800 {
H A Dberlin2.dtsi40 /* kHz uV */
57 /* kHz uV */
202 gpio1: gpio@800 {
H A Dberlin2cd.dtsi38 /* kHz uV */
192 gpio1: gpio@800 {
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Daxp20x.txt39 AXP20x/DCDC2: 1600, 800
40 AXP20x/LDO3: 1600, 800
47 - x-powers,dcdc-freq: defines the work frequency of DC-DC in KHz
H A Dx-powers,axp152.yaml274 Defines the work frequency of DC-DC in kHz.
285 Only 800 and 1600 are valid for the DCDC2 and LDO3 regulators on
/freebsd/contrib/ntp/html/drivers/
H A Ddriver7.html31 …he data. If compiled for the audio codec, it requires a sampling rate of 8 kHz and &mu;-law compan…
37 <p>The driver processes 8-kHz &mu;-law companded codec samples using maximum-likelihood techniques …
54 …>/dev/icom</tt> and, if successful will tune the radio to 3.331 MHz. The 1-kHz offset is useful wi…
60 …and <tt>b</tt> the burst distance (0-40). Good bursts will have spans of a 800 or more and the oth…
H A Ddriver36.html24 <p>The driver requires an audio codec or sound card with sampling rate 8 kHz and &mu;-law compandin…
30 …kHz &mu;-law companded codec samples using maximum-likelihood techniques which exploit the conside…
34 …100 Hz and a 150-Hz lowpass filter. The minute pulse is extracted using an 800-ms synchronous matc…
/freebsd/contrib/ntp/ntpd/
H A Drefclock_chu.c36 * Ottawa, Ontario. Transmissions are made continuously on 3330 kHz,
37 * 7850 kHz and 14670 kHz in upper sideband, compatible AM mode. An
44 * kHz and mu-law companding. This is the same standard as used by the
169 * ident identifier (CHU0 3330 kHz, CHU1 7850 kHz, CHU2 14670 kHz)
231 #define SPAN 800. /* min envelope span */
437 * Note the tuned frequencies are 1 kHz higher than the carrier. CHU
1540 * The radio can be tuned to three channels: 0 (3330 kHz), 1 in chu_newchan()
1541 * (7850 kHz) and 2 (14670 kHz). There are five one-minute in chu_newchan()
H A Drefclock_wwv.c43 * kHz and mu-law companding. This is the same standard as used by the
94 #define SYNCYC 800 /* minute filter cycles */
358 {COEF2, 3}, /* 43 800 (not used) */
908 * the minute starting at the 800-ms minute sync pulse found during the
916 * sync signal (800 ms at 1000 Hz) and WWVH minute sync signal (800 ms
1052 * Matlab 4th-order IIR elliptic, 800-1400 Hz bandpass, 0.2 dB in wwv_rf()
1081 * respectively. The WWV and WWVH signals are processed by 800- in wwv_rf()
1290 * AWND (20 ms). Note that the discriminator peak occurs about 800 ms
1629 * and station mitigation. Also set the seconds epoch at 800 m in wwv_epoch()
[all...]
/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3288-veyron.dtsi337 /* 100kHz since 4.7k resistors don't rise fast enough */
340 i2c-scl-rising-time-ns = <800>; /* 600ns measured */
/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra20-acer-a500-picasso.dts1195 /* PMIC has a built-in 32KHz oscillator which is used by PMC */
1204 * This standalone onboard fixed-clock always-ON 32KHz
1244 vactive = <800>;

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