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/linux/drivers/gpu/drm/i915/display/
H A Dvlv_dsi_pll_regs.h1 /* SPDX-License-Identifier: MIT */
21 #define BXT_MIPI_DIV_SHIFT(port) \ argument
22 _MIPI_PORT(port, BXT_MIPI1_DIV_SHIFT, \
25 /* TX control divider to select actual TX clock output from (8x/var) */
28 #define BXT_MIPI_TX_ESCLK_SHIFT(port) \ argument
29 _MIPI_PORT(port, BXT_MIPI1_TX_ESCLK_SHIFT, \
33 #define BXT_MIPI_TX_ESCLK_FIXDIV_MASK(port) \ argument
34 _MIPI_PORT(port, BXT_MIPI1_TX_ESCLK_FIXDIV_MASK, \
36 #define BXT_MIPI_TX_ESCLK_DIVIDER(port, val) \ argument
37 (((val) & 0x3F) << BXT_MIPI_TX_ESCLK_SHIFT(port))
[all …]
H A Dvlv_dsi_regs.h1 /* SPDX-License-Identifier: MIT */
14 #define _MIPI_MMIO_BASE(display) ((display)->dsi.mmio_base)
16 #define _MIPI_PORT(port, a, c) (((port) == PORT_A) ? a : c) /* ports A and C only */ argument
17 #define _MMIO_MIPI(base, port, a, c) _MMIO((base) + _MIPI_PORT(port, a, c)) argument
40 #define VLV_MIPI_PORT_CTRL(port) _MMIO_MIPI(VLV_MIPI_BASE, port, _MIPIA_PORT_CTRL, _MIPIC_PORT_CTR… argument
42 /* BXT port control */
70 #define BANDGAP_MASK (1 << 8)
71 #define BANDGAP_PNW_CIRCUIT (0 << 8)
72 #define BANDGAP_LNC_CIRCUIT (1 << 8)
89 #define VLV_MIPI_TEARING_CTRL(port) _MMIO_MIPI(VLV_MIPI_BASE, port, _MIPIA_TEARING_CTRL, _MIPIC_T… argument
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/linux/arch/alpha/kernel/
H A Dio.c1 // SPDX-License-Identifier: GPL-2.0
12 /* Out-of-line versions of the i/o routines that redirect into the
13 platform-specific version. Note that "platform-specific" may mean
86 u8 inb(unsigned long port) in inb() argument
88 return ioread8(ioport_map(port, 1)); in inb()
91 u16 inw(unsigned long port) in inw() argument
93 return ioread16(ioport_map(port, 2)); in inw()
96 u32 inl(unsigned long port) in inl() argument
98 return ioread32(ioport_map(port, 4)); in inl()
101 void outb(u8 b, unsigned long port) in outb() argument
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/linux/arch/m68k/include/asm/
H A Draw_io.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/include/asm-m68k/raw_io.h
5 * 10/20/00 RZ: - created from bits of io.h and ide.h to cleanup namespace
43 #define raw_outb(val,port) out_8((port),(val)) argument
44 #define raw_outw(val,port) out_be16((port),(val)) argument
45 #define raw_outl(val,port) out_be32((port),(val)) argument
51 * Atari ROM port (cartridge port) ISA adapter, used for the EtherNEC NE2000
53 * The ISA adapter connects address lines A9-A13 to ISA address lines A0-A4,
56 * Data lines D8-D15 are connected to ISA data lines D0-D7 for reading.
57 * For writes, address lines A1-A8 are latched to ISA data lines D0-D7
[all …]
/linux/drivers/tty/serial/
H A Dsh-sci.c1 // SPDX-License-Identifier: GPL-2.0
3 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
5 * Copyright (C) 2002 - 2011 Paul Mundt
9 * based off of the old drivers/char/sh-sci.c by:
26 #include <linux/dma-mapping.h>
59 #include "sh-sci.h"
60 #include "sh-sci-common.h"
62 #define SCIx_IRQ_IS_MUXED(port) \ argument
63 ((port)->irqs[SCIx_ERI_IRQ] == \
64 (port)->irqs[SCIx_RXI_IRQ]) || \
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H A Dpmac_zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 * We wrap our port structure around the generic uart_port.
16 struct uart_port port; member
20 /* macio_dev for the escc holding this port (maybe be null on
21 * early inited port)
24 /* device node to this port, this points to one of 2 childs
25 * of "escc" node (ie. ch-a or ch-b)
32 /* Port type as obtained from device tree (IRDA, modem, ...) */
57 unsigned char irq_name[8];
64 if (uap->flags & PMACZILOG_FLAG_IS_CHANNEL_A) in pmz_get_port_A()
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/linux/arch/mips/cavium-octeon/executive/
H A Dcvmx-pko.c7 * Copyright (c) 2003-2008 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
34 #include <asm/octeon/cvmx-config.h>
35 #include <asm/octeon/cvmx-pko.h>
36 #include <asm/octeon/cvmx-helper.h>
61 case 8: in __cvmx_pko_int()
64 return -1; in __cvmx_pko_int()
85 config.s.tail = (queue == (num_queues - 1)); in __cvmx_pko_iport_config()
95 (CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE - in __cvmx_pko_iport_config()
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/linux/arch/x86/boot/
H A Dearly_serial_console.c1 // SPDX-License-Identifier: GPL-2.0
3 * Serial port routines for use during early boot reporting. This code is
26 static void early_serial_init(int port, int baud) in early_serial_init() argument
31 outb(0x3, port + LCR); /* 8n1 */ in early_serial_init()
32 outb(0, port + IER); /* no interrupt */ in early_serial_init()
33 outb(0, port + FCR); /* no fifo */ in early_serial_init()
34 outb(0x3, port + MCR); /* DTR + RTS */ in early_serial_init()
37 c = inb(port + LCR); in early_serial_init()
38 outb(c | DLAB, port + LCR); in early_serial_init()
39 outb(divisor & 0xff, port + DLL); in early_serial_init()
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/linux/include/scsi/fc/
H A Dfc_ms.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Maintained at www.Open-FCoE.org
14 * Fibre Channel Services - Management Service (MS)
15 * From T11.org FC-GS-4 Rev 7.91 February 4, 2004
23 * Common-transport sub-type for FDMI
39 FC_FDMI_GRPL = 0x0102, /* Get Registered Port List */
40 FC_FDMI_GPAT = 0x0110, /* Get Port Attributes */
43 FC_FDMI_RPRT = 0x0210, /* Register Port */
44 FC_FDMI_RPA = 0x0211, /* Register Port Attributes */
47 FC_FDMI_DPRT = 0x0310, /* Deregister Port */
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/linux/drivers/usb/serial/
H A Dftdi_sio_ids.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Philipp Gühring - pg@futureware.at - added the Device ID of the USB relais
25 #define FTDI_4232H_PID 0x6011 /* Quad channel hi-speed device */
26 #define FTDI_232H_PID 0x6014 /* Single channel hi-speed device */
27 #define FTDI_FTX_PID 0x6015 /* FT-X series (FT201X, FT230X, FT231X, etc) */
28 #define FTDI_FT2233HP_PID 0x6040 /* Dual channel hi-speed device with PD */
29 #define FTDI_FT4233HP_PID 0x6041 /* Quad channel hi-speed device with PD */
30 #define FTDI_FT2232HP_PID 0x6042 /* Dual channel hi-speed device with PD */
31 #define FTDI_FT4232HP_PID 0x6043 /* Quad channel hi-speed device with PD */
32 #define FTDI_FT233HP_PID 0x6044 /* Dual channel hi-speed device with PD */
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H A Diuu_phoenix.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2010 James Courtier-Dutton (James@superbug.co.uk)
46 static int iuu_create_sysfs_attrs(struct usb_serial_port *port);
47 static int iuu_remove_sysfs_attrs(struct usb_serial_port *port);
65 static int iuu_port_probe(struct usb_serial_port *port) in iuu_port_probe() argument
72 return -ENOMEM; in iuu_port_probe()
74 priv->buf = kzalloc(256, GFP_KERNEL); in iuu_port_probe()
75 if (!priv->buf) { in iuu_port_probe()
77 return -ENOMEM; in iuu_port_probe()
80 priv->writebuf = kzalloc(256, GFP_KERNEL); in iuu_port_probe()
[all …]
/linux/Documentation/devicetree/bindings/media/
H A Dti,da850-vpif.txt2 ----------------------
4 The TI Video Port InterFace (VPIF) is the primary component for video
12 - compatible: must be "ti,da850-vpif"
13 - reg: physical base address and length of the registers set for the device;
14 - interrupts: should contain IRQ line for the VPIF
18 VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a
19 single 16-bit channel. It should contain one or two port child nodes
20 with child 'endpoint' node. If there are two ports then port@0 must
21 describe the input and port@1 output channels. Please refer to the
23 Documentation/devicetree/bindings/media/video-interfaces.txt.
[all …]
/linux/drivers/tty/serial/8250/
H A D8250_pci.c1 // SPDX-License-Identifier: GPL-2.0
3 * Probe module for 8250/16550-type PCI serial ports.
98 /* Unknown vendors/cards - this should not be in linux/pci_ids.h */
104 * > 0 - number of ports
105 * = 0 - use board->num_ports
106 * < 0 - error
156 "Please send the output of lspci -vv, this\n" in moan_device()
159 "modem board to <linux-serial@vger.kernel.org>.\n", in moan_device()
160 str, dev->vendor, dev->device, in moan_device()
161 dev->subsystem_vendor, dev->subsystem_device); in moan_device()
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H A D8250_exar.c1 // SPDX-License-Identifier: GPL-2.0
3 * Probe module for 8250/16550-type Exar chips PCI serial ports.
102 #define UART_EXAR_8XMODE 0x88 /* 8X sampling rate select */
114 #define UART_EXAR_TXTRG 0x0a /* Tx FIFO trigger level write-only */
115 #define UART_EXAR_RXTRG 0x0b /* Rx FIFO trigger level write-only */
123 #define UART_EXAR_MPIOINT_15_8 0x95 /* MPIOINT[15:8] */
124 #define UART_EXAR_MPIOLVL_15_8 0x96 /* MPIOLVL[15:8] */
125 #define UART_EXAR_MPIO3T_15_8 0x97 /* MPIO3T[15:8] */
126 #define UART_EXAR_MPIOINV_15_8 0x98 /* MPIOINV[15:8] */
127 #define UART_EXAR_MPIOSEL_15_8 0x99 /* MPIOSEL[15:8] */
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H A D8250_uniphier.c1 // SPDX-License-Identifier: GPL-2.0+
17 * - MMIO32 (regshift = 2)
18 * - FCR is not at 2, but 3
19 * - LCR and MCR are not at 3 and 4, they share 4
20 * - No SCR (Instead, CHAR can be used as a scratch register)
21 * - Divisor latch at 9, no divisor latch access bit
26 /* bit[15:8] = CHAR, bit[7:0] = FCR */
28 /* bit[15:8] = LCR, bit[7:0] = MCR */
43 if (!device->port.membase) in uniphier_early_console_setup()
44 return -ENODEV; in uniphier_early_console_setup()
[all …]
/linux/drivers/pinctrl/
H A Dpinctrl-tb10x.c1 // SPDX-License-Identifier: GPL-2.0-only
22 #include "pinctrl-utils.h"
36 #define PCFG_PORT_MASK(PORT) \ argument
37 (((1 << PCFG_PORT_BITWIDTH) - 1) << (PCFG_PORT_BITWIDTH * (PORT)))
40 /* Port 1 */
49 PINCTRL_PIN(TB10X_PORT1 + 8, "MIVAL_S1"),
52 /* Port 2 */
61 PINCTRL_PIN(TB10X_PORT2 + 8, "MIVAL_S3"),
64 /* Port 3 */
73 PINCTRL_PIN(TB10X_PORT3 + 8, "MIVAL_S5"),
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/linux/drivers/scsi/bfa/
H A Dbfa_fc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
4 * Copyright (c) 2014- QLogic Corporation.
8 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
51 u32 cs_ctl:8; /* class specific control */
54 u32 type:8; /* data structure type */
71 FC_RTG_FC4_DEV_DATA = 0x0, /* FC-4 Device Data */
73 FC_RTG_FC4_LINK_DATA = 0x3, /* FC-4 Link Data */
81 * information category for extended link data and FC-4 Link Data
94 FC_CAT_IFR_HDR = 0x1, /* Inter-Fabric routing header */
[all …]
/linux/drivers/media/pci/solo6x10/
H A Dsolo6x10-gpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2010-2013 Bluecherry, LLC <https://www.bluecherrydvr.com>
22 int port; in solo_gpio_mode() local
28 for (port = 0; port < 16; port++) { in solo_gpio_mode()
29 if (!((1 << port) & port_mask)) in solo_gpio_mode()
32 ret &= (~(3 << (port << 1))); in solo_gpio_mode()
33 ret |= ((mode & 3) << (port << 1)); in solo_gpio_mode()
38 /* To set extended gpio - sensor */ in solo_gpio_mode()
41 for (port = 0; port < 16; port++) { in solo_gpio_mode()
42 if (!((1UL << (port + 16)) & port_mask)) in solo_gpio_mode()
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/linux/drivers/net/dsa/b53/
H A Db53_common.c4 * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org>
46 { 8, 0x00, "TxOctets" },
58 { 8, 0x44, "RxOctets" },
71 { 8, 0x7c, "RxGoodOctets" },
84 { 8, 0x00, "TxOctets" },
97 { 8, 0x3c, "TxQoSOctets" },
98 { 8, 0x44, "RxOctets" },
111 { 8, 0x7c, "RxGoodOctets" },
120 { 8, 0xa8, "RxQoSOctets" },
132 { 8, 0x00, "TxOctets" },
[all …]
/linux/drivers/ata/pata_parport/
H A Dbpck6.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * backpack.c is a low-level protocol driver for the Micro Solutions
6 * "BACKPACK" parallel port IDE adapter (works on Series 6 drives).
8 * Written by: Ken Hahn (linux-dev@micro-solutions.com)
9 * Clive Turvey (linux-dev@micro-solutions.com)
29 #define PREFIX_IO16 0x01 // perform 16-bit wide I/O
30 #define PREFIX_FASTWR 0x04 // enable PPC mode fast-write
51 /* DONT CHANGE THESE LEST YOU BREAK EVERYTHING - BIT FIELD DEPENDENCIES */
65 switch (mode_map[pi->mode]) { in bpck6_send_cmd()
70 parport_write_data(pi->pardev->port, cmd); in bpck6_send_cmd()
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/linux/Documentation/devicetree/bindings/soundwire/
H A Dqcom,soundwire.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
19 - enum:
20 - qcom,soundwire-v1.3.0
21 - qcom,soundwire-v1.5.0
22 - qcom,soundwire-v1.5.1
23 - qcom,soundwire-v1.6.0
[all …]
/linux/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2.h1 /* SPDX-License-Identifier: GPL-2.0 */
34 #define MVPP2_RX_DATA_FIFO_SIZE_REG(port) (0x00 + 4 * (port)) argument
35 #define MVPP2_RX_ATTR_FIFO_SIZE_REG(port) (0x20 + 4 * (port)) argument
38 #define MVPP22_TX_FIFO_THRESH_REG(port) (0x8840 + 4 * (port)) argument
39 #define MVPP22_TX_FIFO_SIZE_REG(port) (0x8860 + 4 * (port)) argument
42 #define MVPP2_RX_CTRL_REG(port) (0x140 + 4 * (port)) argument
61 #define MVPP2_MH_REG(port) (0x5040 + 4 * (port)) argument
70 #define MVPP2_PRS_PORT_LU_MASK(port) (0xff << ((port) * 4)) argument
71 #define MVPP2_PRS_PORT_LU_VAL(port, val) ((val) << ((port) * 4)) argument
72 #define MVPP2_PRS_INIT_OFFS_REG(port) (0x1004 + ((port) & 4)) argument
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/linux/drivers/input/joystick/
H A Dtmdc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 1998-2001 Vojtech Pavlik
6 * Trystan Larey-Williams
34 #define TMDC_MODE_FM 8
46 static const unsigned char tmdc_byte_d[16] = { 2, 5, 8, 9 };
53 { ABS_X, ABS_Y, ABS_RUDDER, -1, ABS_THROTTLE };
71 } tmdc_hat_to_axis[] = {{ 0, 0}, { 1, 0}, { 0,-1}, {-1, 0}, { 0, 1}};
84 { 3, "ThrustMaster Rage 3D Gamepad", 2, 0, { 8, 2 }, { 0, 0 }, tmdc_abs, tmdc_btn_pad },
86 { 8, "ThrustMaster FragMaster", 4, 0, { 8, 2 }, { 0, 0 }, tmdc_abs_fm, tmdc_btn_fm },
87 { 163, "Thrustmaster Fusion GamePad", 2, 0, { 8, 2 }, { 0, 0 }, tmdc_abs, tmdc_btn_pad },
[all …]
/linux/drivers/gpio/
H A Dgpio-gpio-mm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * GPIO driver for the Diamond Systems GPIO-MM
6 * This driver supports the following Diamond Systems devices: GPIO-MM and
7 * GPIO-MM-12.
19 #include "gpio-i8255.h"
23 #define GPIOMM_EXTENT 8
29 MODULE_PARM_DESC(base, "Diamond Systems GPIO-MM base addresses");
41 .reg_bits = 8,
43 .val_bits = 8,
52 "Port 1A0", "Port 1A1", "Port 1A2", "Port 1A3", "Port 1A4", "Port 1A5",
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/linux/drivers/net/ethernet/brocade/bna/
H A Dbfa_defs_mfg_comm.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Linux network driver for QLogic BR-series Converged Network Adapter.
6 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
7 * Copyright (c) 2014-2015 QLogic Corporation
35 BFA_MFG_TYPE_FC8P2 = 825, /*!< 8G 2port FC card */
36 BFA_MFG_TYPE_FC8P1 = 815, /*!< 8G 1port FC card */
37 BFA_MFG_TYPE_FC4P2 = 425, /*!< 4G 2port FC card */
38 BFA_MFG_TYPE_FC4P1 = 415, /*!< 4G 1port FC card */
39 BFA_MFG_TYPE_CNA10P2 = 1020, /*!< 10G 2port CNA card */
40 BFA_MFG_TYPE_CNA10P1 = 1010, /*!< 10G 1port CNA card */
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