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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dapm-xgene-phy.txt1 * APM X-Gene 15Gbps Multi-purpose PHY nodes
3 PHY nodes are defined to describe on-chip 15Gbps Multi-purpose PHY. Each
7 - compatible : Shall be "apm,xgene-phy".
8 - reg : PHY memory resource is the SDS PHY access resource.
9 - #phy-cells : Shall be 1 as it expects one argument for setting
14 - status : Shall be "ok" if enabled or "disabled" if disabled.
16 - clocks : Reference to the clock entry.
17 - apm,tx-eye-tuning : Manual control to fine tune the capture of the serial
19 Two set of 3-tuple setting for each (up to 3)
22 - apm,tx-eye-direction : Eye tuning manual control direction. 0 means sample
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H A Dapm,xgene-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/apm,xgene-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: APM X-Gene 15Gbps Multi-purpose PHY
10 - Khuong Dinh <khuong@os.amperecomputing.com>
13 PHY nodes are defined to describe on-chip 15Gbps Multi-purpose PHY. Each
19 - const: apm,xgene-phy
24 '#phy-cells':
32 apm,tx-eye-tuning:
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/freebsd/sys/ofed/include/rdma/
H A Dopa_port_info.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
42 #define OPA_PORT_PACKET_FORMAT_8B 1 /* Format 8B */
45 #define OPA_PORT_PACKET_FORMAT_16B 8 /* Format 16B */
48 #define OPA_PORT_LTP_CRC_MODE_14 1 /* 14-bit LTP CRC mode (optional) */
49 #define OPA_PORT_LTP_CRC_MODE_16 2 /* 16-bit LTP CRC mode */
50 #define OPA_PORT_LTP_CRC_MODE_48 4 /* 48-bit LTP CRC mode (optional) */
51 #define OPA_PORT_LTP_CRC_MODE_PER_LANE 8 /* 12/16-bit per lane LTP CRC mode */
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/freebsd/share/man/man4/
H A Dice.42 .\" SPDX-License-Identifier: BSD-3-Clause
4 .\" Copyright (c) 2019-2020, Intel Corporation
73 .Bl -bullet -compact
91 .Sx Link-Level Flow Control
113 .Sx Optics and auto-negotiation
115 .Sx PCI-Express Slot Bandwidth
136 .Xr ifconfig 8
147 .Xr ifconfig 8 Ap s
156 .Xr ifconfig 8 .
198 .Xr ifconfig 8
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/freebsd/contrib/ofed/libibverbs/examples/
H A Ddevinfo.c15 * - Redistributions of source code must retain the above
19 * - Redistributions in binary form must reproduce the above
51 return !(gid->raw[8] | gid->raw[9] | gid->raw[10] | gid->raw[11] | in null_gid()
52 gid->raw[12] | gid->raw[13] | gid->raw[14] | gid->raw[15]); in null_gid()
129 case 4: return "8"; in width_str()
130 case 8: return "12"; in width_str()
139 case 1: return "2.5 Gbps"; in speed_str()
140 case 2: return "5.0 Gbps"; in speed_str()
143 case 8: return "10.0 Gbps"; in speed_str()
145 case 16: return "14.0 Gbps"; in speed_str()
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/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-8040-puzzle-m801.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * Device Tree file for IEI Puzzle-M801
9 #include "armada-8040.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/leds/common.h>
15 model = "IEI-Puzzle-M801";
16 …compatible = "iei,puzzle-m801", "marvell,armada8040", "marvell,armada-ap806-quad", "marvell,armada…
28 stdout-path = "serial0:115200n8";
37 v_3_3: regulator-3-3v {
38 compatible = "regulator-fixed";
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/freebsd/contrib/ofed/opensm/opensm/
H A Dosm_helper.c2 * Copyright (c) 2004-2009 Voltaire, Inc. All rights reserved.
3 * Copyright (c) 2002-2015 Mellanox Technologies LTD. All rights reserved.
4 * Copyright (c) 1996-2003 Intel Corporation. All rights reserved.
18 * - Redistributions of source code must retain the above
22 * - Redistributions in binary form must reproduce the above
63 /* we use two tables - one for queries and one for responses */
73 "RESERVED", /* 8 */
86 "SubnAdmDelete", /* 15 */
90 #define OSM_SA_METHOD_STR_UNKNOWN_VAL (ARR_SIZE(ib_sa_method_str) - 1)
103 "RESERVED", /* 8A */
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H A Dosm_subnet.c2 * Copyright (c) 2004-2009 Voltaire, Inc. All rights reserved.
3 * Copyright (c) 2002-2011 Mellanox Technologies LTD. All rights reserved.
4 * Copyright (c) 1996-2003 Intel Corporation. All rights reserved.
8 * Copyright (c) 2009-2015 ZIH, TU Dresden, Federal Republic of Germany. All rights reserved.
21 * - Redistributions of source code must retain the above
25 * - Redistributions in binary form must reproduce the above
230 n += vsnprintf(buf + n, sizeof(buf) - n, fmt, args); in log_config_value()
231 if (n > sizeof(buf) - 2) in log_config_value()
232 n = sizeof(buf) - 2; in log_config_value()
233 snprintf(buf + n, sizeof(buf) - n, "\n"); in log_config_value()
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H A Dosm_console.c2 * Copyright (c) 2005-2009 Voltaire, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
108 fprintf(out, "quit (not valid in local mode; use ctl-c)\n"); in help_quit()
113 fprintf(out, "loglevel [<log-level>]\n"); in help_loglevel()
115 fprintf(out, " log-level is OR'ed from the following\n"); in help_loglevel()
147 fprintf(out, "priority [<sm-priority>]\n"); in help_priority()
177 fprintf(out, " loop -- type \"q<ret>\" to quit\n"); in help_status()
183 fprintf(out, "logflush [on|off] -- toggle opensm.log file flushing\n"); in help_logflush()
189 "querylid lid -- print internal information about the lid specified\n"); in help_querylid()
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/freebsd/contrib/ofed/libibmad/
H A Ddump.c2 * Copyright (c) 2004-2009 Voltaire Inc. All rights reserved.
4 * Copyright (c) 2009-2011 Mellanox Technologies LTD. All rights reserved.
17 * - Redistributions of source code must retain the above
21 * - Redistributions in binary form must reproduce the above
63 case 8: in mad_dump_int()
88 case 8: in mad_dump_uint()
124 case 8: in mad_dump_hex()
160 case 8: in mad_dump_rhex()
181 snprintf(buf, bufsz, "8X"); in mad_dump_linkwidth()
183 case 8: in mad_dump_linkwidth()
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/freebsd/sys/netinet/
H A Dtcp_ratelimit.c1 /*-
3 * SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2018-2020
73 * Why do the rates cluster in the 1-100Mbps range more
81 * Chelsio - Supporting 16 configurable rates.
82 * Mlx - c4 supporting 13 fixed rates.
83 * Mlx - c5 & c6 supporting 127 configurable rates.
113 * by the hardware will cause a 390 micro-second gap between
115 * would need 416 micro-seconds gap between each send.
126 * delta between the two rates (416 - 390) divided into the rate
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/freebsd/contrib/ofed/infiniband-diags/src/
H A Dibportstate.c2 * Copyright (c) 2004-2009 Voltaire Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
168 sizeof buf - strlen(buf), val); in show_port_info()
172 sizeof buf - strlen(buf), val); in show_port_info()
176 sizeof buf - strlen(buf), val); in show_port_info()
180 sizeof buf - strlen(buf), val); in show_port_info()
184 sizeof buf - strlen(buf), val); in show_port_info()
188 sizeof buf - strlen(buf), val); in show_port_info()
192 sizeof buf - strlen(buf), val); in show_port_info()
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/freebsd/sys/dev/pms/RefTisa/tisa/api/
H A Dtitypes.h2 *Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved.
154 bit8 FunctionSpecificArea[8];
193 #define DIF_ACTION_FLAG_MASK 0x00000007 /* 0 - 2 */
199 #define DIF_UDTR_REF_BLOCK_COUNT 0x00000100 /* 8 */
201 #define DIF_CUST_APP_TAG 0x00000C00 /* 10 - 11 */
202 #define DIF_FLAG_RESERVED 0x0000F000 /* 12 - 15 */
203 #define DIF_DATA_BLOCK_SIZE_MASK 0x000F0000 /* 16 - 19 */
205 #define DIF_TAG_VERIFY_MASK 0x03F00000 /* 20 - 25 */
206 #define DIF_TAG_UPDATE_MASK 0xFC000000 /* 26 - 31 */
228 /* Bit 6-7: reserved
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/freebsd/sys/dev/qlnx/qlnxe/
H A Dmcp_public.h2 * Copyright (c) 2017-2018 Cavium, Inc.
72 #define ETH_SPEED_SMARTLINQ 0x8 /* deprecated - use link_modes field instead */
86 #define ETH_LOOPBACK_MAC (4) /* MAC Loopback - not supported */
90 #define ETH_LOOPBACK_REVERSE_MAC_AH_ONLY (8) /* Loop RX packet from PCS to TX */
94 #define EEE_CFG_EEE_ENABLED (1<<0) /* EEE is enabled (configuration). Refer to eee_status->active f…
121 u64 r64; /* 0x00 (Offset 0x00 ) RX 64-byte frame counter*/
129 u64 r1522; /* 0x06 (Offset 0x30 ) RX 1519 to 1522 byte VLAN-tagged frame counter */
154 u64 t64; /* 0x40 (Offset 0xa8 ) TX 64-byte frame counter */
196 /* HSI - Cannot add more stats to this struct. If needed, then need to open new struct */
200 u64 brb_truncate[8];
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H A Decore_init_fw_funcs.c2 * Copyright (c) 2017-2018 Cavium, Inc.
57 #define QM_PQ_SIZE_256B(pq_size) (pq_size ? DIV_ROUND_UP(pq_size, 0x100) - 1 : 0)
72 /* Upper bound in MB, 10 * burst size of 1ms in 50Gbps */
99 /* RL increment value - rate is specified in mbps. the factor of 1.01 was
100 * added after seeing only 99% factor reached in a 25Gbps port with DPDK RFC
106 …C_VAL(rate) OSAL_MAX_T(u32, (u32)(((rate ? rate : 100000) * QM_RL_PERIOD * 101) / (8 * 100)), 1)
108 /* PF RL Upper bound is set to 10 * burst size of 1ms in 50Gbps */
121 #define QM_VP_RL_BYPASS_THRESH_SPEED (QM_VP_RL_UPPER_BOUND(10000) - 1)
133 #define PBF_CMDQ_LINES_E5_RSVD_RATIO 8
135 …INES_VOQ0_RT_OFFSET + ext_voq * (PBF_REG_YCMD_QS_NUM_LINES_VOQ1_RT_OFFSET - PBF_REG_YCMD_QS_NUM_…
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/freebsd/sys/dev/oce/
H A Doce_hw.h1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
34 * freebsd-drivers@emulex.com
130 #define PHY_LINK_SPEED_1GBPS 0x3 /* (1 Gbps) */
131 #define PHY_LINK_SPEED_10GBPS 0x4 /* (10 Gbps) */
143 #define PHY_LINK_SPEED_1GBPS 0x3 /* (1 Gbps) */
144 #define PHY_LINK_SPEED_10GBPS 0x4 /* (10 Gbps) */
222 #define OCE_INTF_SLI_REV4 4 /* driver supports SLI-4 */
253 uint32_t sli_hint1:8;
265 uint32_t sli_hint1:8;
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/freebsd/crypto/openssl/crypto/modes/asm/
H A Dghash-sparcv9.pl2 # Copyright 2010-2021 The OpenSSL Project Authors. All Rights Reserved.
19 # The module implements "4-bit" GCM GHASH function and underlying
20 # single multiplication operation in GF(2^128). "4-bit" means that it
21 # uses 256 bytes per-key table [+128 bytes shared table]. Performance
22 # results are for streamed GHASH subroutine on UltraSPARC pre-Tx CPU
27 # 32-bit build 81.4 43.3 12.6 (+546%/+244%)
28 # 64-bit build 20.2 21.2 12.6 (+60%/+68%)
34 # 32-bit build 566 50 (+1000%)
35 # 64-bit build 56 50 (+12%)
37 # I don't quite understand why difference between 32-bit and 64-bit
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/freebsd/crypto/openssl/crypto/md5/asm/
H A Dmd5-sparcv9.pl2 # Copyright 2012-2021 The OpenSSL Project Authors. All Rights Reserved.
23 # faster than software. Multi-process benchmark saturates at 12x
24 # single-process result on 8-core processor, or ~11GBps per 2.85GHz
36 # 64-bit values
41 # 32-bit values
85 srl $a,32-$rot,$a
101 srl $a,32-$rot,$a
123 srl $a,32-$rot,$a
148 srl $a,32-$rot,$a
172 srl $a,32-$rot,$a
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/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-385-clearfog-gtr.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Rabeeh Khoury <rabeeh@solid-run.com>, based on Russell King clearfog work
9 SERDES mapping -
10 0. SATA1 on CON18, or optionally mini PCIe CON3 - PCIe0
11 1. 6141 switch (2.5Gbps capable)
12 2. SATA0 on CON17, or optionally mini PCIe CON4 - PCIe1
14 4. mini PCIe CON2 - PCIe2
17 USB 2.0 mapping -
18 0. USB 2.0 - 0 USB pins header CON12
19 1. USB 2.0 - 1 mini PCIe CON2
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/freebsd/crypto/openssl/crypto/sha/asm/
H A Dsha1-sparcv9.pl2 # Copyright 2007-2021 The OpenSSL Project Authors. All Rights Reserved.
19 # Performance improvement is not really impressive on pre-T1 CPU: +8%
21 # turned to be 40% faster than 64-bit code generated by Sun C 5.8 and
22 # >2x than 64-bit code generated by gcc 3.4. And there is a gimmick.
23 # X[16] vector is packed to 8 64-bit registers and as result nothing
26 # subject to [inter-thread] cache-thrashing hazard. The goal is to
31 # faster than software. Multi-process benchmark saturates at 11x
32 # single-process result on 8-core processor, or ~9GBps per 2.85GHz
62 my $xi=($i&1)?@X[($i/2)%8]:$Xi;
78 if ($i&1 && $i<15) {
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/freebsd/share/misc/
H A Dpci_vendors5 # Date: 2025-10-18 03:15:01
8 # the PCI ID Project at https://pci-ids.ucw.cz/.
14 # (version 2 or higher) or the 3-clause BSD License.
25 # device device_name <-- single tab
26 # subvendor subdevice subsystem_name <-- two tabs
30 # This is a relabelled RTL-8139
31 8139 AT-2500TX V3 Ethernet
41 7a09 PCI-to-PCI Bridge
51 7a19 PCI-to-PCI Bridge
57 7a29 PCI-to-PCI Bridge
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/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Ddraak.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Renesas Electronics Corp.
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
21 audio_clkout: audio-clkout {
24 * but needed to avoid cs2000/rcar_sound probe dead-lock
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <12288000>;
32 compatible = "pwm-backlight";
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H A Debisu.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Ebisu/Ebisu-4D board
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
33 stdout-path = "serial0:115200n8";
36 audio_clkout: audio-clkout {
39 * but needed to avoid cs2000/rcar_sound probe dead-lock
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <11289600>;
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/freebsd/sys/dev/pms/RefTisa/sallsdk/api/
H A Dsa_spec.h2 *Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved.
135 #define SA_SATA_MAX_PM_PORTS 15
183 /* b7-b4 reserved */
184 /* b3-b0 PM Port. device port address that the PM should deliver the FIS to */
204 /* b5-b4 : reserved */
205 /* b3-b0 : PM Port */
217 /* b5-b4: reserved2 */
218 /* b3-b0: PM Port */
221 /* b6-b4: Status Hi. Contains the contents to be placed in bits 6, 5, and 4 of
224 /* b2-b0: Status Lo Contains the contents to be placed in bits 2,1, and 0 of the
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/freebsd/sbin/camcontrol/
H A Dcamcontrol.8145 .Bk -words
402 .Bl -tag -width 14n
419 function-specific arguments.
437 .Bl -tag -width 14n
477 .Bl -tag -width periphlist
500 .Bl -tag -width 4n
514 .Bl -tag -width 4n
534 .Bl -tag -width 14n
541 .Bl -tag -width 012345678
569 .Bl -tag -width 5n
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