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/linux/lib/
H A Dclz_tab.c1 // SPDX-License-Identifier: GPL-2.0
11 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
12 8, 8, 8, 8, 8, 8, 8, 8,
13 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
14 8, 8, 8, 8, 8, 8, 8, 8,
15 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
16 8, 8, 8, 8, 8, 8, 8, 8,
17 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
18 8, 8, 8, 8, 8, 8, 8, 8,
/linux/include/dt-bindings/iio/
H A Dqcom,spmi-adc7-pm8350b.h1 /* SPDX-License-Identifier: GPL-2.0-only */
13 #include <dt-bindings/iio/qcom,spmi-vadc.h>
16 #define PM8350B_ADC7_REF_GND (PM8350B_SID << 8 | ADC7_REF_GND)
17 #define PM8350B_ADC7_1P25VREF (PM8350B_SID << 8 | ADC7_1P25VREF)
18 #define PM8350B_ADC7_VREF_VADC (PM8350B_SID << 8 | ADC7_VREF_VADC)
19 #define PM8350B_ADC7_DIE_TEMP (PM8350B_SID << 8 | ADC7_DIE_TEMP)
21 #define PM8350B_ADC7_AMUX_THM1 (PM8350B_SID << 8 | ADC7_AMUX_THM1)
22 #define PM8350B_ADC7_AMUX_THM2 (PM8350B_SID << 8 | ADC7_AMUX_THM2)
23 #define PM8350B_ADC7_AMUX_THM3 (PM8350B_SID << 8 | ADC7_AMUX_THM3)
24 #define PM8350B_ADC7_AMUX_THM4 (PM8350B_SID << 8 | ADC7_AMUX_THM4)
[all …]
H A Dqcom,spmi-adc7-pm7325.h1 /* SPDX-License-Identifier: GPL-2.0-only */
13 #include <dt-bindings/iio/qcom,spmi-vadc.h>
16 #define PM7325_ADC7_REF_GND (PM7325_SID << 8 | ADC7_REF_GND)
17 #define PM7325_ADC7_1P25VREF (PM7325_SID << 8 | ADC7_1P25VREF)
18 #define PM7325_ADC7_VREF_VADC (PM7325_SID << 8 | ADC7_VREF_VADC)
19 #define PM7325_ADC7_DIE_TEMP (PM7325_SID << 8 | ADC7_DIE_TEMP)
21 #define PM7325_ADC7_AMUX_THM1 (PM7325_SID << 8 | ADC7_AMUX_THM1)
22 #define PM7325_ADC7_AMUX_THM2 (PM7325_SID << 8 | ADC7_AMUX_THM2)
23 #define PM7325_ADC7_AMUX_THM3 (PM7325_SID << 8 | ADC7_AMUX_THM3)
24 #define PM7325_ADC7_AMUX_THM4 (PM7325_SID << 8 | ADC7_AMUX_THM4)
[all …]
H A Dqcom,spmi-adc7-pm8350.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 #include <dt-bindings/iio/qcom,spmi-vadc.h>
12 #define PM8350_ADC7_REF_GND(sid) ((sid) << 8 | ADC7_REF_GND)
13 #define PM8350_ADC7_1P25VREF(sid) ((sid) << 8 | ADC7_1P25VREF)
14 #define PM8350_ADC7_VREF_VADC(sid) ((sid) << 8 | ADC7_VREF_VADC)
15 #define PM8350_ADC7_DIE_TEMP(sid) ((sid) << 8 | ADC7_DIE_TEMP)
17 #define PM8350_ADC7_AMUX_THM1(sid) ((sid) << 8 | ADC7_AMUX_THM1)
18 #define PM8350_ADC7_AMUX_THM2(sid) ((sid) << 8 | ADC7_AMUX_THM2)
19 #define PM8350_ADC7_AMUX_THM3(sid) ((sid) << 8 | ADC7_AMUX_THM3)
20 #define PM8350_ADC7_AMUX_THM4(sid) ((sid) << 8 | ADC7_AMUX_THM4)
[all …]
/linux/drivers/mtd/nand/raw/
H A Dnand_ids.c1 // SPDX-License-Identifier: GPL-2.0-only
29 {"TC58NVG0S3E 1G 3.3V 8-bit",
31 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
34 SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
37 SZ_4K, SZ_512, SZ_256K, 0, 8, 256, NAND_ECC_INFO(8, SZ_512) },
38 {"TC58NVG3S0F 8G 3.3V 8-bit",
40 SZ_4K, SZ_1K, SZ_256K, 0, 8, 232, NAND_ECC_INFO(4, SZ_512) },
41 {"TC58NVG5D2 32G 3.3V 8-bit",
[all …]
/linux/arch/powerpc/boot/
H A Dwii-head.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * arch/powerpc/boot/wii-head.S
6 * Copyright (C) 2008-2009 The GameCube Linux Team
14 * - if the data and instruction caches are enabled or not
15 * - if the MMU is enabled or not
16 * - if the high BATs are enabled or not
32 mflr 8
33 clrlwi 8, 8, 3 /* convert to a real address */
34 addi 8, 8, _mmu_off - 1b
35 mtsrr0 8
[all …]
H A Dgamecube-head.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * arch/powerpc/boot/gamecube-head.S
6 * Copyright (C) 2004-2009 The GameCube Linux Team
14 * - if the data and instruction caches are enabled or not
15 * - if the MMU is enabled or not
31 mflr 8
32 clrlwi 8, 8, 3 /* convert to a real address */
33 addi 8, 8, _mmu_off - 1b
34 mtsrr0 8
42 li 8, 0
[all …]
/linux/drivers/mfd/
H A Dmt6370.c1 // SPDX-License-Identifier: GPL-2.0-only
38 REGMAP_IRQ_REG_LINE(MT6370_IRQ_DIRCHGON, 8),
39 REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_TREG, 8),
40 REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_AICR, 8),
41 REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_MIVR, 8),
42 REGMAP_IRQ_REG_LINE(MT6370_IRQ_PWR_RDY, 8),
43 REGMAP_IRQ_REG_LINE(MT6370_IRQ_FL_CHG_VINOVP, 8),
44 REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_VSYSUV, 8),
45 REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_VSYSOV, 8),
46 REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_VBATOV, 8),
[all …]
H A Dmt6360-core.c1 // SPDX-License-Identifier: GPL-2.0
79 /* reg 0 -> 0 ~ 7 */
84 /* REG 1 -> 8 ~ 15 */
91 /* REG 2 -> 16 ~ 23 */
92 /* REG 3 -> 24 ~ 31 */
99 /* REG 4 -> 32 ~ 39 */
107 /* REG 5 -> 40 ~ 47 */
116 /* REG 6 -> 48 ~ 55 */
124 /* REG 7 -> 56 ~ 63 */
133 /* REG 8 -> 64 ~ 71 */
[all …]
/linux/arch/powerpc/kernel/
H A Didle_book3s.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
10 * The platform / CPU caller must ensure SPRs and any other non-GPR
15 #include <asm/asm-offsets.h>
16 #include <asm/ppc-opcode.h>
60 std r2,-8*1(r1)
61 std r14,-8*2(r1)
62 std r15,-8*3(r1)
63 std r16,-8*4(r1)
64 std r17,-8*5(r1)
65 std r18,-8*6(r1)
[all …]
/linux/arch/arm64/crypto/
H A Dsha3-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sha3-ce-core.S - core SHA-3 transform using v8.2 Crypto Extensions
15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
46 ld1 { v0.1d- v3.1d}, [x0]
47 ld1 { v4.1d- v7.1d}, [x8], #32
48 ld1 { v8.1d-v11.1d}, [x8], #32
49 ld1 {v12.1d-v15.1d}, [x8], #32
50 ld1 {v16.1d-v19.1d}, [x8], #32
51 ld1 {v20.1d-v23.1d}, [x8], #32
59 ld1 {v25.8b-v28.8b}, [x1], #32
[all …]
/linux/Documentation/driver-api/media/drivers/ccs/
H A Dccs-regs.asc1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause
2 # Copyright (C) 2019--2020 Intel Corporation
5 # - f field LSB MSB rflags
6 # - e enum value # after a field
7 # - e enum value [LSB MSB]
8 # - b bool bit
9 # - l arg name min max elsize [discontig...]
12 # 8, 16, 32 register bits (default is 8)
20 module_revision_number_major 0x0002 8
21 frame_count 0x0005 8
[all …]
/linux/Documentation/devicetree/bindings/ptp/
H A Dptp-idtcm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ptp/ptp-idtcm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vincent Cheng <vincent.cheng.xh@renesas.com>
16 - idt,8a34000
17 - idt,8a34001
18 - idt,8a34002
19 - idt,8a34003
20 - idt,8a34004
[all …]
/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2014 Tensilica Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
44 #define XCHAL_CP1_SA_ALIGN 8 /* min alignment of save area */
66 /* Save area for non-coprocessor optional and custom (TIE) state: */
71 #define XCHAL_TOTAL_SA_SIZE 240 /* with 16-byte align padding */
72 #define XCHAL_TOTAL_SA_ALIGN 8 /* actual minimum alignment */
84 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
90 * asize = allocated size in bytes (asize*8 == bitsz + gapsz + padsz)
92 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
[all …]
/linux/arch/powerpc/perf/
H A Dhv-gpci-requests.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 #include "req-gen/_begin.h"
22 * - starting_index_kind is one of the following, depending on the event:
24 * hw_chip_id: hardware chip id or -1 for current hw chip
28 * 0xffffffffffffffff: or -1, which means it is irrelavant for the event
43 * - expose secondary index (if any counter ever uses it, only 0xA0
45 * - embed versioning info
46 * - include counter descriptions
52 REQUEST(__count(0, 8, processor_time_in_timebase_cycles)
73 REQUEST(__field(0, 8, partition_id)
[all …]
/linux/Documentation/userspace-api/media/v4l/
H A Dmetafmt-generic.rst1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
8 Generic line-based metadata formats
14 These generic line-based metadata formats define the memory layout of the data
17 .. _v4l2-meta-fmt-generic-8:
20 -----------------------
22 The V4L2_META_FMT_GENERIC_8 format is a plain 8-bit metadata format. This format
23 is used on CSI-2 for 8 bits per :term:`Data Unit`.
26 packed into one 16-bit Data Unit. Otherwise the 16 bits per pixel dataformat is
27 :ref:`V4L2_META_FMT_GENERIC_CSI2_16 <v4l2-meta-fmt-generic-csi2-16>`.
34 .. flat-table:: Sample 4x2 Metadata Frame
[all …]
/linux/arch/arm/crypto/
H A Daes-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * aes-ce-core.S - AES in CBC/CTR/XTS mode using ARMv8 Crypto Extensions
12 .arch armv8-a
13 .fpu crypto-neon-fp-armv8
17 aese.8 \state, \key
18 aesmc.8 \state, \state
22 aesd.8 \state, \key
23 aesimc.8 \state, \state
38 aese.8 q0, \key2
44 aesd.8 q0, \key2
[all …]
H A Daes-neonbs-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
11 * 'Faster and Timing-Attack Resistant AES-GCM' by Emilia Kaesper and
15 * for 32-bit ARM written by Andy Polyakov <appro@openssl.org>
67 vtbl.8 \out\()l, {\tbl}, \in\()l
69 vtbl.8 \out\()h, {\tmp}, \in\()h
71 vtbl.8 \out\()h, {\tbl}, \in\()h
77 vldr \out\()h, \sym + 8
262 vld1.8 {\t0-\t1}, [bskey, :256]!
264 vld1.8 {\t2-\t3}, [bskey, :256]!
269 vld1.8 {\t0-\t1}, [bskey, :256]!
[all …]
H A Dcurve25519-core.S1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
3 * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
13 .arch armv7-a
18 push {r4-r11, lr}
27 vshr.u64 q0, q0, #8
31 vst1.8 {d2-d3}, [r6, : 128]!
32 vst1.8 {d0-d1}, [r6, : 128]!
33 vst1.8 {d4-d5}, [r6, : 128]
36 vst1.8 {d4-d5}, [r6, : 128]!
37 vst1.8 {d4-d5}, [r6, : 128]!
[all …]
/linux/drivers/media/test-drivers/vicodec/
H A Dcodec-fwht.c1 // SPDX-License-Identifier: LGPL-2.1+
6 * 8x8 Fast Walsh Hadamard Transform in sequency order based on the paper:
8 * A Recursive Algorithm for Sequency-Ordered Fast Walsh Transforms,
15 #include "codec-fwht.h"
21 * be guaranteed that the magic 8 byte sequence (see below) can
34 1, 8,
57 s16 block[8 * 8]; in rlc()
67 for (y = 0; y < 8; y++) { in rlc()
68 for (x = 0; x < 8; x++) { in rlc()
69 *wp = in[x + y * 8]; in rlc()
[all …]
/linux/drivers/gpu/drm/display/
H A Ddrm_dsc_helper.c1 // SPDX-License-Identifier: MIT
35 * drm_dsc_dp_pps_header_init() - Initializes the PPS Header
49 pps_header->HB1 = DP_SDP_PPS; in drm_dsc_dp_pps_header_init()
50 pps_header->HB2 = DP_SDP_PPS_HEADER_PAYLOAD_BYTES_MINUS_1; in drm_dsc_dp_pps_header_init()
55 * drm_dsc_dp_rc_buffer_size - get rc buffer size in bytes
57 * @rc_buffer_size: number of blocks - 1, according to DPCD offset 63h
82 * drm_dsc_pps_payload_pack() - Populates the DSC PPS
110 pps_payload->dsc_version = in drm_dsc_pps_payload_pack()
111 dsc_cfg->dsc_version_minor | in drm_dsc_pps_payload_pack()
112 dsc_cfg->dsc_version_major << DSC_PPS_VERSION_MAJOR_SHIFT; in drm_dsc_pps_payload_pack()
[all …]
/linux/Documentation/gpu/
H A Dafbc.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 It provides fine-grained random access and minimizes the amount of
21 AFBC streams can contain several components - where a component
37 reside in the least-significant bits of the corresponding linear
42 * Component 0: R(8)
43 * Component 1: G(8)
44 * Component 2: B(8)
45 * Component 3: A(8)
49 * Component 0: R(8)
50 * Component 1: G(8)
[all …]
/linux/include/sound/
H A Dump_msg.h1 // SPDX-License-Identifier: GPL-2.0-or-later
36 UMP_CC_BALANCE = 8,
135 u32 note:8;
136 u32 velocity:8;
138 u32 velocity:8;
139 u32 note:8;
154 u32 note:8;
155 u32 data:8;
157 u32 data:8;
158 u32 note:8;
[all …]
/linux/arch/x86/lib/
H A Dmemmove_64.S1 /* SPDX-License-Identifier: GPL-2.0 */
4 * of line code. Based on asm-i386/string.h.
6 * This assembly file is re-written from memmove_64.c file.
7 * - Copyright 2011 Fenghua Yu <fenghua.yu@intel.com>
67 movq 0*8(%rsi), %r11
68 movq 1*8(%rsi), %r10
69 movq 2*8(%rsi), %r9
70 movq 3*8(%rsi), %r8
71 leaq 4*8(%rsi), %rsi
73 movq %r11, 0*8(%rdi)
[all …]
/linux/tools/perf/arch/powerpc/tests/
H A Dregs_load.S1 /* SPDX-License-Identifier: GPL-2.0 */
6 #define R1 1 * 8
7 #define R2 2 * 8
8 #define R3 3 * 8
9 #define R4 4 * 8
10 #define R5 5 * 8
11 #define R6 6 * 8
12 #define R7 7 * 8
13 #define R8 8 * 8
14 #define R9 9 * 8
[all …]

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