Searched +full:6 +full:e (Results 1 – 25 of 1259) sorted by relevance
12345678910>>...51
26 * E - either cluster50 and $17, 0xff, $17 # E : L L U U : 00000000000000ch53 cmpult $18, 9, $4 # E : small (< 1 quad) string?54 or $2, $17, $17 # E : 000000000000chch55 lda $3, -1($31) # E : U L L U58 addq $16, $5, $5 # E : Max search address59 or $2, $17, $17 # E : 00000000chchchch62 or $2, $17, $17 # E : chchchchchchchch65 ldq_u $6, -1($5) # L : L U U L : eight or less bytes to search Latency=367 extqh $6, $16, $6 # U : 2 cycle stall for $6[all …]
15 * E - either cluster53 and $17,255,$1 # E : 00000000000000ch55 bis $16,$16,$0 # E : return value58 addq $18,$16,$6 # E : max address to write to59 bis $1,$2,$17 # E : 000000000000chch63 or $3,$4,$3 # E : 00000000chch000065 xor $16,$6,$1 # E : will complete write be within one quadword?66 inswl $17,6,$2 # U : chch00000000000068 or $17,$3,$17 # E : 00000000chchchch69 or $2,$5,$2 # E : chchchch00000000[all …]
17 * E - either cluster36 * (we can't hide the 3-cycle latency of the unpkbw in the 6-instruction sequence)69 and $16,7,$6 # E : src misalignment74 extql $0,$6,$0 # U :75 extqh $1,$6,$22 # U :79 cmoveq $6,$31,$22 # E : src aligned?82 addl $19,$7,$19 # E : U L U L : <sign bits>bbaabb0084 or $0,$22,$0 # E : 1st src word complete85 extql $1,$6,$1 # U :86 or $18,$4,$18 # E : 000000CCDDAABBCC[all …]
16 * E - either cluster34 mov $16, $0 # E : copy dest to return36 xor $16, $17, $1 # E : are source and dest alignments the same?37 and $1, 7, $1 # E : are they the same mod 8?41 and $16, 7, $1 # E : Are both 0mod8?43 nop # E :53 subq $18, 1, $18 # E : count--54 addq $17, 1, $17 # E : src++56 addq $16, 1, $16 # E : dest++57 and $16, 7, $1 # E : Are we at 0mod8 yet?[all …]
14 * instructions. E.g. evldw, evlwwsplat, ...19 * This is a quite good tradeoff for low power devices (e.g. routers) without35 .long R(ff, f2, f2, 0d), R(d6, 6b, 6b, bd)36 .long R(de, 6f, 6f, b1), R(91, c5, c5, 54)44 .long R(8e, 47, 47, c9), R(fb, f0, f0, 0b)50 .long R(3d, 93, 93, ae), R(4c, 26, 26, 6a)51 .long R(6c, 36, 36, 5a), R(7e, 3f, 3f, 41)58 .long R(46, 23, 23, 65), R(9d, c3, c3, 5e)61 .long R(0e, 07, 07, 09), R(24, 12, 12, 36)63 .long R(cd, eb, eb, 26), R(4e, 27, 27, 69)[all …]
5 …<path transform="scale(-.6)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.01772c-1.7455 2.37206-1…8 …<path transform="scale(-.6)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.01772c-1.7455 2.37206-1…11 …<path transform="scale(-.6)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.01772c-1.7455 2.37206-1…14 …<path transform="scale(-.6)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.01772c-1.7455 2.37206-1…17 …<path transform="scale(-.6)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.01772c-1.7455 2.37206-1…20 …<path transform="scale(-.6)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.01772c-1.7455 2.37206-1…23 … transform="scale(.6) rotate(180) translate(0)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.0177…26 … transform="scale(.6) rotate(180) translate(0)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.0177…29 … transform="scale(.6) rotate(180) translate(0)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.0177…32 … transform="scale(.6) rotate(180) translate(0)" d="m8.71859 4.03374-10.9259-4.01772 10.9259-4.0177…[all …]
6 # - e enum value # after a field7 # - e enum value [LSB MSB]23 - e GRBG 024 - e RGGB 125 - e BGGR 226 - e GBRG 328 - e v1_0 0x1029 - e v1_1 0x1140 - e ts 041 - e es 1[all …]
97 PCR-00: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 7598 PCR-01: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 7599 PCR-02: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75100 PCR-03: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75101 PCR-04: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75130 B4 76 41 82 C9 20 2C 10 18 40 BC 8B E5 44 4C 6C132 1E E4 81 84 CE B2 F2 45 1C F0 85 99 61 02 4D EB133 86 C4 F7 F3 29 60 52 93 6B B2 E5 AB 8B A9 09 E3134 D7 0E 7D CA 41 BF 43 07 65 86 3C 8C 13 7A D0 8B135 82 5E 96 0B F8 1F 5F 34 06 DA A2 52 C1 A9 D5 26[all …]
55 .long smovcr |$00-6 fmovecr all64 .long serror |$01-6 fint ERROR73 .long serror |$02-6 fsinh ERROR82 .long serror |$03-6 fintrz ERROR91 .long serror |$04-6 ERROR - illegal extension100 .long serror |$05-6 ERROR - illegal extension109 .long serror |$06-6 flognp1 ERROR118 .long serror |$07-6 ERROR - illegal extension127 .long serror |$08-6 fetoxm1 ERROR136 .long serror |$09-6 ftanh ERROR[all …]
32 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"47 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"77 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"92 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"108 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"121 id="path1200-9-6"123 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"136 id="path1200-9-6-9"138 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"151 id="path1200-9-6-9-9"[all …]
12 #define pte_ERROR(e) \ argument14 __FILE__, __LINE__, &(e), (e).pte_high, (e).pte_low)15 #define pmd_ERROR(e) \ argument17 __FILE__, __LINE__, &(e), pmd_val(e))18 #define pgd_ERROR(e) \ argument20 __FILE__, __LINE__, &(e), pgd_val(e))154 * 6 6 6 6 5 5 5 5 5 5 5 5 5 5 4 4 4 4 4 4 4 4 4 4 3 3 3 3 3 3 3 3155 * 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2159 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0160 * --------------------------------------------> 0 E 0 0 0 0 0 0 0[all …]
13 * RC6-6A-20 (no toggle bit)14 * RC6-6A-24 (no toggle bit)15 * RC6-6A-32 (MCE version with toggle bit in body)23 #define RC6_PREFIX_PULSE (6 * RC6_UNIT)29 #define RC6_SUFFIX_SPACE (6 * RC6_UNIT)33 #define RC6_6A_LCC_MASK 0xffff0000 /* RC6-6A-32 long customer code mask */64 case 6: in rc6_mode()254 dev_dbg(&dev->dev, "RC6(6A) unsupported length\n"); in ir_rc6_decode()258 dev_dbg(&dev->dev, "RC6(6A) proto 0x%04x, scancode 0x%08x (toggle: %u)\n", in ir_rc6_decode()313 struct ir_raw_event *e = events; in ir_rc6_encode() local[all …]
41 <STM32_PINMUX('E', 4, AF13)>,/* DCMI_D3 */45 <STM32_PINMUX('E', 14, AF13)>;/* DCMI_D7 */59 <STM32_PINMUX('E', 4, ANALOG)>,/* DCMI_D3 */63 <STM32_PINMUX('E', 14, ANALOG)>;/* DCMI_D7 */73 <STM32_PINMUX('E', 5, AF10)>, /* ETH_RGMII_TXD3 */108 <STM32_PINMUX('E', 5, ANALOG)>, /* ETH_RGMII_TXD3 */163 <STM32_PINMUX('E', 6, AF11)>, /* ETH_RGMII_TXD3 */164 <STM32_PINMUX('F', 6, AF11)>, /* ETH_RGMII_TX_CTL */166 <STM32_PINMUX('B', 6, AF11)>, /* ETH_MDIO */175 <STM32_PINMUX('E', 2, AF10)>, /* ETH_RGMII_RXD1 */[all …]
81 pinmux = <STM32_PINMUX('B', 6, AF5)>;91 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */114 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */122 <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */136 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */144 <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */157 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */158 <STM32_PINMUX('C', 6, AF13)>,/* DCMI_D0 */161 <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */162 <STM32_PINMUX('E', 11, AF13)>,/* DCMI_D4 */[all …]
94 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"170 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"185 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"200 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"215 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"230 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"299 id="EmptyTriangleOutL-6"364 id="path4502-57-6"379 id="path4369-6"381 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"[all …]
18 #define PIN_MIPIRX3P PINPOS('A', 6)29 #define PIN_MIPIRX2N PINPOS('B', 6)43 #define PIN_MIPIRX2P PINPOS('C', 6)59 #define PIN_MIPI_TXP0 PINPOS('E', 1)60 #define PIN_MIPI_TXM0 PINPOS('E', 2)61 #define PIN_CAM_PD1 PINPOS('E', 4)62 #define PIN_CAM_RST0 PINPOS('E', 5)63 #define PIN_VIVO_D0 PINPOS('E', 10)64 #define PIN_ADC1 PINPOS('E', 13)65 #define PIN_ADC2 PINPOS('E', 14)[all …]
64 SHA256_ROUND(i,a,b,c,d,e,f,g,h) global() argument 74 u32 a, b, c, d, e, f, g, h; sha256_transform() local
37 #define LPC18XX_SCU_PIN_EZI BIT(6)248 LPC_P(1,6, GPIO, CTIN, R, EMC, R, R, SGPIO, SDMMC, 0, ND);269 LPC_P(2,6, SGPIO, UART0, EMC, USB0, GPIO, CTIN, TIMER3, R, 0, ND);283 LPC_P(3,6, GPIO, SPI, SSP0, SPIFI, R, SSP0_ALT, R, R, 0, ND);292 LPC_P(4,6, GPIO, CTOUT, LCD, R, R, R, R, SGPIO, 0, ND);303 LPC_P(5,6, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);305 LPC_P(6,0, R, I2S0_RX_MCLK,R, R, I2S0_RX_SCK, R, R, R, 0, ND);306 LPC_P(6,1, GPIO, EMC, UART0, I2S0_RX_WS, R, TIMER2, R, R, 0, ND);307 LPC_P(6,2, GPIO, EMC, UART0, I2S0_RX_SDA, R, TIMER2, R, R, 0, ND);308 LPC_P(6,3, GPIO, USB0, SGPIO, EMC, R, TIMER2, R, R, 0, ND);[all …]
25 * value is within 6 to 9 otherwise event_open for the group will fail.29 struct event *e, events[3]; in group_constraint_unit() local34 * when the unit is within 6 to 9 is only applicable on in group_constraint_unit()41 e = &events[0]; in group_constraint_unit()42 event_init(e, EventCode_1); in group_constraint_unit()44 /* Expected to fail as PMC 4 is not used with unit field value 6 to 9 */ in group_constraint_unit()48 e = &events[1]; in group_constraint_unit()49 event_init(e, EventCode_2); in group_constraint_unit()51 /* Expected to pass as PMC 4 is used with unit field value 6 to 9 */ in group_constraint_unit()55 e = &events[2]; in group_constraint_unit()[all …]
15 * Performance Monitor Counter 6 (PMC6).16 * Test that pmc5/6 is excluded from constraint22 struct event *e, events[3]; in group_pmc56_exclude_constraints() local29 * PMC5/6 is excluded from constraint bit in group_pmc56_exclude_constraints()35 e = &events[0]; in group_pmc56_exclude_constraints()36 event_init(e, 0x500fa); in group_pmc56_exclude_constraints()38 e = &events[1]; in group_pmc56_exclude_constraints()39 event_init(e, 0x600f4); in group_pmc56_exclude_constraints()41 e = &events[2]; in group_pmc56_exclude_constraints()42 event_init(e, 0x22C040); in group_pmc56_exclude_constraints()
119 mov e_64, tmp0 # tmp = e121 ror $23, tmp0 # 41 # tmp = e ror 23122 and e_64, T1 # T1 = (f ^ g) & e123 xor e_64, tmp0 # tmp = (e ror 23) ^ e124 xor g_64, T1 # T1 = ((f ^ g) & e) ^ g = CH(e,f,g)127 ror $4, tmp0 # 18 # tmp = ((e ror 23) ^ e) ror 4128 xor e_64, tmp0 # tmp = (((e ror 23) ^ e) ror 4) ^ e130 add h_64, T1 # T1 = CH(e,f,g) + W[t] + K[t] + h131 ror $14, tmp0 # 14 # tmp = ((((e ror23)^e)ror4)^e)ror14 = S1(e)132 add tmp0, T1 # T1 = CH(e,f,g) + W[t] + K[t] + S1(e)[all …]
32 JOINED_MACV4_MC_ADDR="01:00:5e:01:02:03"33 UNKNOWN_MACV4_MC_ADDR1="01:00:5e:01:02:04"34 UNKNOWN_MACV4_MC_ADDR2="01:00:5e:01:02:05"35 UNKNOWN_MACV4_MC_ADDR3="01:00:5e:01:02:06"44 00 00 3e 37 63 ff fe cf 17 0e 00 01 00 00 00 00 \49 00 00 3e 37 63 ff fe cf 17 0e 00 01 00 00 02 00 \52 01:80:c2:00:00:0e 00:00:de:ad:be:ef 88:f7 02 02 \54 00 00 3e 37 63 ff fe cf 17 0e 00 01 00 06 05 7f \58 01:00:5e:00:01:81 00:00:de:ad:be:ef 08:00 45 00 \61 02 00 00 00 00 00 00 00 00 00 00 00 00 00 3e 37 \[all …]
32 set -e62 set +e66 set -e103 set +e129 set -e156 set +e170 neigh_show_output=$(ip -6 -netns ${ROUTER_NS_V6} neigh show \189 set -e217 set +e
![[all …]](/source/more/linux/Documentation/networking/device_drivers/can/ctu/fsm_txt_buffer_user.svg?full=6e){kind=link}
![[all …]](/source/more/linux/Documentation/gpu/amdgpu/display/pipeline_4k_no_split.svg?full=6e){kind=link}
![[all …]](/source/more/linux/Documentation/gpu/amdgpu/display/pipeline_4k_split.svg?full=6e){kind=link}
![[all …]](/source/more/linux/Documentation/i2c/i2c_bus.svg?full=6e){kind=link}