| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | apm-xgene-phy.txt | 1 * APM X-Gene 15Gbps Multi-purpose PHY nodes
3 PHY nodes are defined to describe on-chip 15Gbps Multi-purpose PHY. Each
7 - compatible : Shall be "apm,xgene-phy".
8 - reg : PHY memory resource is the SDS PHY access resource.
9 - #phy-cells : Shall be 1 as it expects one argument for setting
14 - status : Shall be "ok" if enabled or "disabled" if disabled.
16 - clocks : Reference to the clock entry.
17 - apm,tx-eye-tuning : Manual control to fine tune the capture of the serial
19 Two set of 3-tuple setting for each (up to 3)
22 - apm,tx-eye-direction : Eye tuning manual control direction. 0 means sample
[all …]
|
| H A D | apm,xgene-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/apm,xgene-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: APM X-Gene 15Gbps Multi-purpose PHY
10 - Khuong Dinh <khuong@os.amperecomputing.com>
13 PHY nodes are defined to describe on-chip 15Gbps Multi-purpose PHY. Each
19 - const: apm,xgene-phy
24 '#phy-cells':
32 apm,tx-eye-tuning:
[all …]
|
| /freebsd/share/man/man4/ |
| H A D | mvs.4 | 35 .Bd -ragged -offset indent
44 .Bd -literal -offset indent
50 .Bl -ohang
55 Non-zero value enables CCC and defines maximum time (in us), request can wait
69 .Bl -tag -width 4n -offset indent -compact
82 A manual bus reset is needed on device hot-plug.
85 Values 1, 2 and 3 are respectively 1.5, 3 and 6Gbps.
92 ports of several generations (Gen-I/II/IIe) of Marvell SATA controllers.
94 target, or, if HBA supports Port Multipliers (Gen-II/IIe), 16 targets.
95 Most of the bus-management details are handled by the SATA-specific
[all …]
|
| H A D | ice.4 | 2 .\" SPDX-License-Identifier: BSD-3-Clause
4 .\" Copyright (c) 2019-2020, Intel Corporation
73 .Bl -bullet -compact
91 .Sx Link-Level Flow Control
113 .Sx Optics and auto-negotiation
115 .Sx PCI-Express Slot Bandwidth
236 To use RDMA monitoring, more MSI-X interrupts may need to be reserved.
241 .Bd -literal -offset indent
245 The number of extra MSI-X interrupt vectors may need to be adjusted.
248 .Bd -literal -offset indent
[all …]
|
| H A D | siis.4 | 35 .Bd -ragged -offset indent
44 .Bd -literal -offset indent
50 .Bl -ohang
58 .Bl -tag -width 2n -offset indent
67 A manual bus reset is needed on device hot-plug.
70 Values 1, 2 and 3 are respectively 1.5, 3 and 6Gbps.
78 Each SATA port is represented to CAM as a separate bus with 16 targets.
79 Most of the bus-management details are handled by the SATA-specific
90 Port Multipliers (including FIS-based switching), hardware command queues
92 device hot-plug and Message Signaled Interrupts.
[all …]
|
| H A D | ahci.4 | 1 .\" Copyright (c) 2009-2013 Alexander Motin <mav@FreeBSD.org>
35 .Bd -ragged -offset indent
44 .Bd -literal -offset indent
50 .Bl -ohang
54 .Bl -tag -width 4n -offset indent -compact
64 Non-zero value enables CCC and defines maximum time (in ms), request can wait
84 .Bl -tag -width 4n -offset indent -compact
104 A manual bus reset/rescan may be needed after device hot-plug, unless hardware
108 Values 1, 2 and 3 are respectively 1.5, 3 and 6Gbps.
110 setting to nonzero value forces driver attach to some known AHCI-capable
[all …]
|
| /freebsd/sys/ofed/include/rdma/ |
| H A D | opa_port_info.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
45 #define OPA_PORT_PACKET_FORMAT_16B 8 /* Format 16B */
48 #define OPA_PORT_LTP_CRC_MODE_14 1 /* 14-bit LTP CRC mode (optional) */
49 #define OPA_PORT_LTP_CRC_MODE_16 2 /* 16-bit LTP CRC mode */
50 #define OPA_PORT_LTP_CRC_MODE_48 4 /* 48-bit LTP CRC mode (optional) */
51 #define OPA_PORT_LTP_CRC_MODE_PER_LANE 8 /* 12/16-bit per lane LTP CRC mode */
60 #define OPA_LINKDOWN_REASON_BAD_DLID 6
[all …]
|
| /freebsd/contrib/ofed/libibmad/ |
| H A D | dump.c | 2 * Copyright (c) 2004-2009 Voltaire Inc. All rights reserved.
4 * Copyright (c) 2009-2011 Mellanox Technologies LTD. All rights reserved.
17 * - Redistributions of source code must retain the above
21 * - Redistributions in binary form must reproduce the above
61 case 6: in mad_dump_int()
86 case 6: in mad_dump_uint()
116 case 6: in mad_dump_hex()
152 case 6: in mad_dump_rhex()
186 case 16: in mad_dump_linkwidth()
201 n += snprintf(buf + n, bufsz - n, "1X or "); in dump_linkwidth()
[all …]
|
| /freebsd/contrib/ofed/opensm/opensm/ |
| H A D | osm_helper.c | 2 * Copyright (c) 2004-2009 Voltaire, Inc. All rights reserved.
3 * Copyright (c) 2002-2015 Mellanox Technologies LTD. All rights reserved.
4 * Copyright (c) 1996-2003 Intel Corporation. All rights reserved.
18 * - Redistributions of source code must retain the above
22 * - Redistributions in binary form must reproduce the above
63 /* we use two tables - one for queries and one for responses */
71 "SubnAdmReport", /* 6 */
87 "UNKNOWN" /* 16 */
90 #define OSM_SA_METHOD_STR_UNKNOWN_VAL (ARR_SIZE(ib_sa_method_str) - 1)
125 "RESERVED6", /* 6 */
[all …]
|
| H A D | osm_subnet.c | 2 * Copyright (c) 2004-2009 Voltaire, Inc. All rights reserved.
3 * Copyright (c) 2002-2011 Mellanox Technologies LTD. All rights reserved.
4 * Copyright (c) 1996-2003 Intel Corporation. All rights reserved.
8 * Copyright (c) 2009-2015 ZIH, TU Dresden, Federal Republic of Germany. All rights reserved.
21 * - Redistributions of source code must retain the above
25 * - Redistributions in binary form must reproduce the above
230 n += vsnprintf(buf + n, sizeof(buf) - n, fmt, args); in log_config_value()
231 if (n > sizeof(buf) - 2) in log_config_value()
232 n = sizeof(buf) - 2; in log_config_value()
233 snprintf(buf + n, sizeof(buf) - n, "\n"); in log_config_value()
[all …]
|
| /freebsd/sys/dev/mpr/ |
| H A D | mpr_table.c | 1 /*-
76 //SLM-Add new PCIe info to all of these tables
128 {"1.5Gbps", 0x08},
129 {"3.0Gbps", 0x09},
130 {"6.0Gbps", 0x0a},
131 {"12.0Gbps", 0x0b},
150 {"I-T Nexus Loss Timer", 0x06},
264 "\20" "\4SataHost" "\5SmpInit" "\6StpInit" "\7SspInit" in mpr_describe_devinfo()
266 "\15LsiDev" "\16AtapiDev" "\17SepDev", in mpr_describe_devinfo()
280 mpr_describe_table(mpr_whoinit_names, facts->WhoInit)); in mpr_print_iocfacts()
[all …]
|
| /freebsd/contrib/ofed/libibverbs/examples/ |
| H A D | devinfo.c | 15 * - Redistributions of source code must retain the above
19 * - Redistributions in binary form must reproduce the above
51 return !(gid->raw[8] | gid->raw[9] | gid->raw[10] | gid->raw[11] | in null_gid()
52 gid->raw[12] | gid->raw[13] | gid->raw[14] | gid->raw[15]); in null_gid()
61 (unsigned) (node_guid >> 16) & 0xffff, in guid_str()
96 case 6: return "LINK_ERROR_RECOVERY"; in port_phy_state_str()
131 case 16: return "2"; in width_str()
139 case 1: return "2.5 Gbps"; in speed_str()
140 case 2: return "5.0 Gbps"; in speed_str()
143 case 8: return "10.0 Gbps"; in speed_str()
[all …]
|
| /freebsd/sys/netinet/ |
| H A D | tcp_ratelimit.c | 1 /*-
3 * SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2018-2020
73 * Why do the rates cluster in the 1-100Mbps range more
81 * Chelsio - Supporting 16 configurable rates.
82 * Mlx - c4 supporting 13 fixed rates.
83 * Mlx - c5 & c6 supporting 127 configurable rates.
113 * by the hardware will cause a 390 micro-second gap between
115 * would need 416 micro-seconds gap between each send.
126 * delta between the two rates (416 - 390) divided into the rate
[all …]
|
| /freebsd/sys/dev/mps/ |
| H A D | mps_table.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
118 {"1.5Gbps", 0x08},
119 {"3.0Gbps", 0x09},
120 {"6.0Gbps", 0x0a},
139 {"I-T Nexus Loss Timer", 0x06},
243 "\20" "\4SataHost" "\5SmpInit" "\6StpInit" "\7SspInit" in mps_describe_devinfo()
245 "\15LsiDev" "\16AtapiDev" "\17SepDev", in mps_describe_devinfo()
260 mps_describe_table(mps_whoinit_names, facts->WhoInit)); in mps_print_iocfacts()
266 facts->IOCCapabilities, "\20" "\3ScsiTaskFull" "\4DiagTrace" in mps_print_iocfacts()
[all …]
|
| /freebsd/sys/dev/pms/RefTisa/tisa/api/ |
| H A D | titypes.h | 2 *Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved.
193 #define DIF_ACTION_FLAG_MASK 0x00000007 /* 0 - 2 */
197 #define DIF_UDT_REF_BLOCK_COUNT 0x00000040 /* 6 */
201 #define DIF_CUST_APP_TAG 0x00000C00 /* 10 - 11 */
202 #define DIF_FLAG_RESERVED 0x0000F000 /* 12 - 15 */
203 #define DIF_DATA_BLOCK_SIZE_MASK 0x000F0000 /* 16 - 19 */
204 #define DIF_DATA_BLOCK_SIZE_SHIFT 16
205 #define DIF_TAG_VERIFY_MASK 0x03F00000 /* 20 - 25 */
206 #define DIF_TAG_UPDATE_MASK 0xFC000000 /* 26 - 31 */
228 /* Bit 6-7: reserved
[all …]
|
| /freebsd/sys/dev/isp/ |
| H A D | isp_ioctl.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 1997-2006 by Matthew Jacob
32 #define ISP_IOC (021) /* 'Ctrl-Q' */
36 * Note that this is not a simple integer level- see ispvar.h for definitions.
87 #define ISP_NSTATS 16
94 #define ISP_RSCCHIWAT 6
99 #define ISP_GET_STATS _IOR(ISP_IOC, 6, isp_stats_t)
116 chan : 6,
137 fc_speed : 4, /* Gbps */
[all …]
|
| /freebsd/sys/contrib/ncsw/inc/ |
| H A D | enet_ext.h | 1 /* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
45 #define ENET_NUM_OCTETS_PER_ADDRESS 6 /**< Number of octets (8-bit bytes) in an ethernet addres…
65 @Description Ethernet MAC-PHY Interface
83 auto-negotiation between MAC and phy
85 Note: 1000BaseX auto-negotiation relates
87 SGMII phy can still synchronize with far-end phy
95 e_ENET_HALF_DUPLEX, /**< Half-Duplex mode */
96 e_ENET_FULL_DUPLEX /**< Full-Duplex mode */
106 e_ENET_SPEED_1000 = E_ENET_SPEED_1000, /**< 1000 Mbps = 1 Gbps */
107 e_ENET_SPEED_2500 = E_ENET_SPEED_2500, /**< 2500 Mbps = 2.5 Gbps */
[all …]
|
| /freebsd/sys/dev/oce/ |
| H A D | oce_hw.h | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
34 * freebsd-drivers@emulex.com
130 #define PHY_LINK_SPEED_1GBPS 0x3 /* (1 Gbps) */
131 #define PHY_LINK_SPEED_10GBPS 0x4 /* (10 Gbps) */
143 #define PHY_LINK_SPEED_1GBPS 0x3 /* (1 Gbps) */
144 #define PHY_LINK_SPEED_10GBPS 0x4 /* (10 Gbps) */
173 #define MQ_RING_CONTEXT_SIZE_16 0x5 /* (16 entries) */
212 #define OCE_INTF_VALID_SIG 6 /* register's signature */
222 #define OCE_INTF_SLI_REV4 4 /* driver supports SLI-4 */
[all …]
|
| H A D | oce_if.c | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
34 * freebsd-drivers@emulex.com
48 #define is_tso_pkt(m) (m->m_pkthdr.csum_flags & CSUM_TSO)
225 (PCI_VENDOR_SERVERENGINES << 16) | PCI_PRODUCT_BE2,
226 (PCI_VENDOR_SERVERENGINES << 16) | PCI_PRODUCT_BE3,
227 (PCI_VENDOR_EMULEX << 16) | PCI_PRODUCT_BE
[all...] |
| /freebsd/sys/dev/qlnx/qlnxe/ |
| H A D | mcp_public.h | 2 * Copyright (c) 2017-2018 Cavium, Inc.
47 #define MCP_GLOB_FUNC_MAX 16 /* Global */
54 #define OFFSIZE_SIZE_OFFSET 16
72 #define ETH_SPEED_SMARTLINQ 0x8 /* deprecated - use link_modes field instead */
86 #define ETH_LOOPBACK_MAC (4) /* MAC Loopback - not supported */
88 #define ETH_LOOPBACK_CNIG_AH_ONLY_2301 (6) /* Port to Port */
94 #define EEE_CFG_EEE_ENABLED (1<<0) /* EEE is enabled (configuration). Refer to eee_status->active f…
121 u64 r64; /* 0x00 (Offset 0x00 ) RX 64-byte frame counter*/
129 u64 r1522; /* 0x06 (Offset 0x30 ) RX 1519 to 1522 byte VLAN-tagged frame counter */
154 u64 t64; /* 0x40 (Offset 0xa8 ) TX 64-byte frame counter */
[all …]
|
| /freebsd/sys/dev/igc/ |
| H A D | igc_mac.c | 1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
13 * igc_init_mac_ops_generic - Initialize MAC function pointers
16 * Setups up the function pointers to no-op functions
20 struct igc_mac_info *mac = &hw->mac; in igc_init_mac_ops_generic()
24 mac->ops.init_params = igc_null_ops_generic; in igc_init_mac_ops_generic()
25 mac->ops.config_collision_dist = igc_config_collision_dist_generic; in igc_init_mac_ops_generic()
26 mac->ops.rar_set = igc_rar_set_generic; in igc_init_mac_ops_generic()
30 * igc_null_ops_generic - No-op function, returns 0
40 * igc_null_mac_generic - No-op function, return void
[all …]
|
| /freebsd/crypto/openssl/crypto/sha/asm/ |
| H A D | sha1-sparcv9.pl | 2 # Copyright 2007-2021 The OpenSSL Project Authors. All Rights Reserved.
19 # Performance improvement is not really impressive on pre-T1 CPU: +8%
21 # turned to be 40% faster than 64-bit code generated by Sun C 5.8 and
22 # >2x than 64-bit code generated by gcc 3.4. And there is a gimmick.
23 # X[16] vector is packed to 8 64-bit registers and as result nothing
26 # subject to [inter-thread] cache-thrashing hazard. The goal is to
31 # faster than software. Multi-process benchmark saturates at 11x
32 # single-process result on 8-core processor, or ~9GBps per 2.85GHz
99 sllx @X[($j+6)%8],32,$Xi ! Xupdate($i)
285 .align 16
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm/marvell/ |
| H A D | armada-385-clearfog-gtr.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Rabeeh Khoury <rabeeh@solid-run.com>, based on Russell King clearfog work
9 SERDES mapping -
10 0. SATA1 on CON18, or optionally mini PCIe CON3 - PCIe0
11 1. 6141 switch (2.5Gbps capable)
12 2. SATA0 on CON17, or optionally mini PCIe CON4 - PCIe1
14 4. mini PCIe CON2 - PCIe2
17 USB 2.0 mapping -
18 0. USB 2.0 - 0 USB pins header CON12
19 1. USB 2.0 - 1 mini PCIe CON2
[all …]
|
| /freebsd/sbin/camcontrol/ |
| H A D | camcontrol.8 | 129 .Op Fl 6
145 .Bk -words
402 .Bl -tag -width 14n
419 function-specific arguments.
437 .Bl -tag -width 14n
477 .Bl -tag -width periphlist
500 .Bl -tag -width 4n
514 .Bl -tag -width 4n
534 .Bl -tag -width 14n
541 .Bl -tag -width 012345678
[all …]
|
| /freebsd/crypto/openssl/crypto/md5/asm/ |
| H A D | md5-sparcv9.pl | 2 # Copyright 2012-2021 The OpenSSL Project Authors. All Rights Reserved.
23 # faster than software. Multi-process benchmark saturates at 12x
24 # single-process result on 8-core processor, or ~11GBps per 2.85GHz
36 # 64-bit values
41 # 32-bit values
85 srl $a,32-$rot,$a
101 srl $a,32-$rot,$a
123 srl $a,32-$rot,$a
133 my $j = $i<31 ? (1+5*($i+1))%16 : (5+3*($i+1))%16;
148 srl $a,32-$rot,$a
[all …]
|