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/linux/Documentation/userspace-api/media/v4l/
H A Dsubdev-formats.rst199 For instance, a format where pixels are encoded as 5-bits red, 5-bits
200 green and 5-bit blue values padded on the high bit, transferred as 2
260 - 5
617 - g\ :sub:`5`
662 - g\ :sub:`5`
769 - g\ :sub:`5`
806 - g\ :sub:`5`
913 - g\ :sub:`5`
935 - r\ :sub:`5`
941 - g\ :sub:`5`
[all …]
H A Dpixfmt-packed-hsv.rst14 The *saturation* (s) and the *value* (v) are measured in percentage of the
47 - 5
56 - 5
65 - 5
74 - 5
96 - h\ :sub:`5`
105 - s\ :sub:`5`
112 - v\ :sub:`7`
113 - v\ :sub:`6`
114 - v\ :sub:`5`
[all …]
/linux/lib/crypto/
H A Dblake2s-generic.c20 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
21 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
22 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
23 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
24 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
25 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
26 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
27 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
28 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
29 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 },
[all …]
/linux/drivers/media/platform/verisilicon/
H A Drockchip_vpu2_hw_h264_dec.c28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
36 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
37 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
39 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
40 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
[all …]
/linux/crypto/
H A Dblake2b_generic.c26 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
27 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
28 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
29 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
30 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
31 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
32 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
33 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
34 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
35 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 },
[all …]
/linux/Documentation/hwmon/
H A Ddme1737.rst66 up to 5 PWM outputs pwm[1-3,5-6] for controlling fan speeds both manually and
70 Fan[3-6] and pwm[3,5-6] are optional features and their availability depends on
75 fan[4-6] and pwm[5-6] don't exist.
94 in0: +5VTR (+5V standby) 0V - 6.64V
95 in1: Vccp (processor core) 0V - 3V
96 in2: VCC (internal +3.3V) 0V - 4.38V
97 in3: +5V 0V - 6.64V
98 in4: +12V 0V - 16V
99 in5: VTR (+3.3V standby) 0V - 4.38V
100 in6: Vbat (+3.0V) 0V - 4.38V
[all …]
H A Dltc4245.rst52 in1_input 12v input voltage (mV)
53 in2_input 5v input voltage (mV)
54 in3_input 3v input voltage (mV)
55 in4_input Vee (-12v) input voltage (mV)
57 in1_min_alarm 12v input undervoltage alarm
58 in2_min_alarm 5v input undervoltage alarm
59 in3_min_alarm 3v input undervoltage alarm
60 in4_min_alarm Vee (-12v) input undervoltage alarm
62 curr1_input 12v current (mA)
63 curr2_input 5v current (mA)
[all …]
H A Dcorsair-psu.rst51 curr2_input Current on the 12v psu rail
52 curr2_crit Current max critical value on the 12v psu rail
53 curr3_input Current on the 5v psu rail
54 curr3_crit Current max critical value on the 5v psu rail
55 curr4_input Current on the 3.3v psu rail
56 curr4_crit Current max critical value on the 3.3v psu rail
59 in1_input Voltage of the 12v psu rail
60 in1_crit Voltage max critical value on the 12v psu rail
61 in1_lcrit Voltage min critical value on the 12v psu rail
62 in2_input Voltage of the 5v psu rail
[all …]
H A Dmc13783-adc.rst47 0 Battery Voltage (BATT) 2.50 - 4.65V -2.40V
49 2 Application Supply (BP) 2.50 - 4.65V -2.40V
50 3 Charger Voltage (CHRGRAW) 0 - 10V / /5
51 0 - 20V /10
52 4 Charger Current (CHRGISNSP-CHRGISNSN) -0.25 - 0.25V x4
53 5 General Purpose ADIN5 / Battery Pack Thermistor 0 - 2.30V No
54 6 General Purpose ADIN6 / Backup Voltage (LICELL) 0 - 2.30V / No /
55 1.50 - 3.50V -1.20V
56 7 General Purpose ADIN7 / UID / Die Temperature 0 - 2.30V / No /
57 0 - 2.55V / x0.9 / No
[all …]
/linux/arch/arm/crypto/
H A Dblake2b-neon-core.S53 .byte 3, 4, 5, 6, 7, 0, 1, 2
55 .byte 2, 3, 4, 5, 6, 7, 0, 1
63 // Execute one round of BLAKE2b by updating the state matrix v[0..15] in the
73 // (v[0], v[4], v[8], v[12]), (v[1], v[5], v[9], v[13]),
74 // (v[2], v[6], v[10], v[14]), and (v[3], v[7], v[11], v[15]).
145 // (v[0], v[5], v[10], v[15]), (v[1], v[6], v[11], v[12]),
146 // (v[2], v[7], v[8], v[13]), and (v[3], v[4], v[9], v[14]).
245 .align 5
274 // 'v'. Fortunately, there are exactly enough NEON registers to fit the
285 veor q6, q6, q14 // v[12..13] = IV[4..5] ^ t[0..1]
[all …]
H A Dblake2s-core.S113 // Execute one round of BLAKE2s by updating the state matrix v[0..15]. v[0..9]
115 // spilling v[8..9], then to v[9..15], then to the message block. r10-r12 and
132 // (v[0], v[4], v[8], v[12]) and (v[1], v[5], v[9], v[13]).
133 __ldrd r10, r11, sp, 16 // load v[12] and v[13]
140 // (v[2], v[6], v[10], v[14]) and (v[3], v[7], v[11], v[15]).
141 __ldrd r8, r9, sp, 8 // load v[10] and v[11]
142 __ldrd r10, r11, sp, 24 // load v[14] and v[15]
145 str r10, [sp, #24] // store v[14]
146 // v[10], v[11], and v[15] are used below, so no need to store them yet.
152 // (v[0], v[5], v[10], v[15]) and (v[1], v[6], v[11], v[12]).
[all …]
/linux/drivers/gpu/drm/exynos/
H A Dregs-scaler.h60 * 5 b0 b4 b8 bc 190 194 198 19c
74 * 5 118 11c 1f8 1fc
168 #define SCALER_INT_EN_ILLEGAL_SRC_Y_SPAN (1 << 5)
196 #define SCALER_INT_STATUS_ILLEGAL_SRC_Y_SPAN (1 << 5)
205 #define SCALER_SRC_CFG_GET_BYTE_SWAP(r) SCALER_GET(r, 6, 5)
206 #define SCALER_SRC_CFG_SET_BYTE_SWAP(v) SCALER_SET(v, 6, 5) argument
208 #define SCALER_SRC_CFG_SET_COLOR_FORMAT(v) SCALER_SET(v, 4, 0) argument
213 #define SCALER_ARGB1555 5
232 #define SCALER_SRC_SPAN_SET_C_SPAN(v) SCALER_SET(v, 29, 16) argument
234 #define SCALER_SRC_SPAN_SET_Y_SPAN(v) SCALER_SET(v, 13, 0) argument
[all …]
/linux/drivers/hwmon/
H A Dabituguru3.c63 #define ABIT_UGURU3_SYNCHRONIZE_TIMEOUT 5
108 #define ABIT_UGURU3_REGION_LENGTH 5
191 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
192 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
193 { "MCH 2.5V", 5, 0, 20, 1, 0 },
194 { "ICH 1.05V", 6, 0, 10, 1, 0 },
195 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
196 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
197 { "ATX +5V", 9, 0, 30, 1, 0 },
198 { "+3.3V", 10, 0, 20, 1, 0 },
[all …]
/linux/tools/testing/selftests/rseq/
H A Drseq-arm-bits.h14 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpeqv_storev)(intptr_t *v, intptr_t expect, intptr_t newv, int c… in RSEQ_TEMPLATE_IDENTIFIER()
29 "ldr r0, %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
35 "ldr r0, %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
40 "str %[newv], %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
42 RSEQ_INJECT_ASM(5) in RSEQ_TEMPLATE_IDENTIFIER()
43 "b 5f\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
45 "5:\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
50 [v] "m" (*v), in RSEQ_TEMPLATE_IDENTIFIER()
81 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpnev_storeoffp_load)(intptr_t *v, intptr_t expectnot, in RSEQ_TEMPLATE_IDENTIFIER()
97 "ldr r0, %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
[all …]
H A Drseq-mips-bits.h14 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpeqv_storev)(intptr_t *v, intptr_t expect, intptr_t newv, int c… in RSEQ_TEMPLATE_IDENTIFIER()
29 LONG_L " $4, %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
34 LONG_L " $4, %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
38 LONG_S " %[newv], %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
40 RSEQ_INJECT_ASM(5) in RSEQ_TEMPLATE_IDENTIFIER()
41 "b 5f\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
43 "5:\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
48 [v] "m" (*v), in RSEQ_TEMPLATE_IDENTIFIER()
74 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpnev_storeoffp_load)(intptr_t *v, intptr_t expectnot, in RSEQ_TEMPLATE_IDENTIFIER()
90 LONG_L " $4, %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
[all …]
/linux/drivers/media/platform/sunxi/sun6i-csi/
H A Dsun6i_csi_reg.h18 #define SUN6I_CSI_EN_PTN_CYCLE(v) (((v) << 16) & GENMASK(23, 16)) argument
29 #define SUN6I_CSI_IF_CFG_FIELD_DT_PCLK_SHIFT(v) (((v) << 24) & GENMASK(27, 24)) argument
54 #define SUN6I_CSI_IF_CFG_IF_CSI_BT1120 (5 << 0)
57 #define SUN6I_CSI_CAP_MASK(v) (((v) << 2) & GENMASK(5, 2)) argument
70 #define SUN6I_CSI_CH_CFG_PAD_VAL(v) (((v) << 24) & GENMASK(31, 24)) argument
71 #define SUN6I_CSI_CH_CFG_INPUT_FMT(v) (((v) << 20) & GENMASK(23, 20)) argument
72 #define SUN6I_CSI_CH_CFG_OUTPUT_FMT(v) (((v) << 16) & GENMASK(19, 16)) argument
78 #define SUN6I_CSI_CH_CFG_INPUT_YUV_SEQ(v) (((v) << 8) & GENMASK(9, 8)) argument
91 #define SUN6I_CSI_OUTPUT_FMT_FRAME_RGB888 5
106 #define SUN6I_CSI_OUTPUT_FMT_FRAME_YUV420SP 5
[all …]
/linux/sound/soc/qcom/
H A Dlpass-sc7280.c113 const struct lpass_variant *v = drvdata->variant; in sc7280_lpass_alloc_dma_channel() local
120 v->rdma_channels); in sc7280_lpass_alloc_dma_channel()
122 if (chan >= v->rdma_channels) in sc7280_lpass_alloc_dma_channel()
126 v->wrdma_channel_start + in sc7280_lpass_alloc_dma_channel()
127 v->wrdma_channels, in sc7280_lpass_alloc_dma_channel()
128 v->wrdma_channel_start); in sc7280_lpass_alloc_dma_channel()
130 if (chan >= v->wrdma_channel_start + v->wrdma_channels) in sc7280_lpass_alloc_dma_channel()
137 v->hdmi_rdma_channels); in sc7280_lpass_alloc_dma_channel()
138 if (chan >= v in sc7280_lpass_alloc_dma_channel()
[all...]
/linux/tools/testing/selftests/net/forwarding/
H A Drouter_multicast.sh5 # | H1 (v$h1) |
24 # | H2 (v$h2) | | | H3 (v$h3) | |
44 ip route add 198.51.100.16/28 vrf v$h1 nexthop via 198.51.100.1
45 ip route add 198.51.100.32/28 vrf v$h1 nexthop via 198.51.100.1
47 ip route add 2001:db8:2::/64 vrf v$h1 nexthop via 2001:db8:1::1
48 ip route add 2001:db8:3::/64 vrf v$h1 nexthop via 2001:db8:1::1
57 ip route del 2001:db8:3::/64 vrf v$h1
58 ip route del 2001:db8:2::/64 vrf v$h1
60 ip route del 198.51.100.32/28 vrf v$h1
61 ip route del 198.51.100.16/28 vrf v$h1
[all …]
/linux/drivers/staging/media/sunxi/sun6i-isp/
H A Dsun6i_isp_reg.h21 #define SUN6I_ISP_FE_CFG_SRC0_MODE(v) (((v) << 8) & GENMASK(9, 8)) argument
22 #define SUN6I_ISP_FE_CFG_SRC1_MODE(v) (((v) << 16) & GENMASK(17, 16)) argument
30 #define SUN6I_ISP_FE_CTRL_GAMMA_UPDATE BIT(5)
33 #define SUN6I_ISP_FE_CTRL_OUTPUT_SPEED_CTRL(v) (((v) << 16) & GENMASK(17, 16)) argument
42 #define SUN6I_ISP_FE_INT_EN_SRC1_FIFO BIT(5)
53 #define SUN6I_ISP_FE_INT_STA_SRC1_FIFO BIT(5)
104 #define SUN6I_ISP_MODE_INPUT_FMT(v) ((v) & GENMASK(2, 0)) argument
105 #define SUN6I_ISP_MODE_INPUT_YUV_SEQ(v) (((v) << 3) & GENMASK(4, 3)) argument
106 #define SUN6I_ISP_MODE_OTF_DPC(v) (((v) << 16) & BIT(16)) argument
107 #define SUN6I_ISP_MODE_SHARP(v) (((v) << 17) & BIT(17)) argument
[all …]
/linux/include/uapi/linux/
H A Dvideodev2.h97 V4L2_FIELD_SEQ_TB = 5, /* both fields sequential into one
146 V4L2_BUF_TYPE_VBI_OUTPUT = 5,
181 V4L2_TUNER_RF = 5,
221 V4L2_COLORSPACE_470_SYSTEM_M = 5,
291 V4L2_XFER_FUNC_NONE = 5,
350 V4L2_YCBCR_ENC_SYCC = 5,
416 * Deprecated names for opRGB colorspace (IEC 61966-2-5)
516 * V I D E O I M A G E F O R M A T
551 #define V4L2_PIX_FMT_RGB555 v4l2_fourcc('R', 'G', 'B', 'O') /* 16 RGB-5-5
[all...]
/linux/drivers/comedi/drivers/
H A Ddt2815.c23 * 0 == unipolar 5V (0V -- +5V)
24 * 1 == bipolar 5V (-5V -- +5V)
29 * 0 == program 1 (see manual table 5-4)
30 * 1 == program 2 (see manual table 5-4)
31 * 2 == program 3 (see manual table 5-4)
32 * 3 == program 4 (see manual table 5-4)
33 * [5] - Analog output 0 range configuration
40 * [10] - Analog output 5 range configuration (same options)
119 * 0 == unipolar 5V (0V -- +5V)
120 * 1 == bipolar 5V (-5V -- +5V)
[all …]
/linux/include/linux/platform_data/
H A Dad5761.h13 * @AD5761_VOLTAGE_RANGE_M10V_10V: -10V to 10V
14 * @AD5761_VOLTAGE_RANGE_0V_10V: 0V to 10V
15 * @AD5761_VOLTAGE_RANGE_M5V_5V: -5V to 5V
16 * @AD5761_VOLTAGE_RANGE_0V_5V: 0V to 5V
17 * @AD5761_VOLTAGE_RANGE_M2V5_7V5: -2.5V to 7.5V
18 * @AD5761_VOLTAGE_RANGE_M3V_3V: -3V to 3V
19 * @AD5761_VOLTAGE_RANGE_0V_16V: 0V to 16V
20 * @AD5761_VOLTAGE_RANGE_0V_20V: 0V to 20V
/linux/sound/soc/codecs/
H A Dcs43130.h47 #define CS43130_PLL_SET_5 0x030005 /* PLL Setting 5 */
121 #define CS43130_INT_STATUS_5 0x0F0004 /* Interrupt Status 5 */
126 #define CS43130_INT_MASK_5 0x0F0014 /* Interrupt Mask 5 */
141 #define CS43130_HP_DETECT_INV_SHIFT 5
147 #define CS43130_HP_UNPLUG_INT_SHIFT 5
225 #define CS43130_PDN_DSDIF_SHIFT 5
304 #define CS43130_DSD_SRC_SHIFT 5
379 struct u16_fract v; member
384 { 22579200, 32000, .v = { 10, 441, }, },
385 { 22579200, 44100, .v = { 1, 32, }, },
[all …]
/linux/arch/alpha/kernel/
H A Dentry.S68 stq $5, 40($sp)
86 .cfi_rel_offset $5, 40
110 ldq $5, 40($sp)
135 .cfi_restore $5
265 stq $5, 40($sp)
293 .cfi_rel_offset $5, 5*8
324 ldq $5, 40($sp)
352 .cfi_restore $5
458 lda $5, sys_call_table
463 s8addq $0, $5, $5
[all …]
/linux/drivers/rtc/
H A Drtc-da9052.c22 #define DA9052_GET_TIME_RETRIES 5
59 uint8_t v[2][5]; in da9052_read_alarm() local
63 ret = da9052_group_read(rtc->da9052, DA9052_ALARM_MI_REG, 5, &v[0][0]); in da9052_read_alarm()
71 DA9052_ALARM_MI_REG, 5, &v[idx][0]); in da9052_read_alarm()
77 if (memcmp(&v[0][0], &v[1][0], 5) == 0) { in da9052_read_alarm()
78 rtc_tm->tm_year = (v[0][4] & DA9052_RTC_YEAR) + 100; in da9052_read_alarm()
79 rtc_tm->tm_mon = (v[0][3] & DA9052_RTC_MONTH) - 1; in da9052_read_alarm()
80 rtc_tm->tm_mday = v[0][2] & DA9052_RTC_DAY; in da9052_read_alarm()
81 rtc_tm->tm_hour = v[0][1] & DA9052_RTC_HOUR; in da9052_read_alarm()
82 rtc_tm->tm_min = v[0][0] & DA9052_RTC_MIN; in da9052_read_alarm()
[all …]

12345678910>>...51