xref: /linux/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml (revision abacaf559950eec0d99d37ff6b92049409af5943) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/can/nxp,sja1000.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Memory mapped SJA1000 CAN controller from NXP (formerly Philips)
8
9maintainers:
10  - Wolfgang Grandegger <wg@grandegger.com>
11
12properties:
13  compatible:
14    oneOf:
15      - enum:
16          - nxp,sja1000
17          - technologic,sja1000
18      - items:
19          - const: renesas,r9a06g032-sja1000 # RZ/N1D
20          - const: renesas,rzn1-sja1000 # RZ/N1
21
22  reg:
23    maxItems: 1
24
25  interrupts:
26    maxItems: 1
27
28  clocks:
29    maxItems: 1
30
31  power-domains:
32    maxItems: 1
33
34  reg-io-width:
35    description: I/O register width (in bytes) implemented by this device
36    default: 1
37    enum: [ 1, 2, 4 ]
38
39  nxp,external-clock-frequency:
40    $ref: /schemas/types.yaml#/definitions/uint32
41    default: 16000000
42    description: |
43      Frequency of the external oscillator clock in Hz.
44      The internal clock frequency used by the SJA1000 is half of that value.
45
46  nxp,tx-output-mode:
47    $ref: /schemas/types.yaml#/definitions/uint32
48    enum: [ 0, 1, 2, 3 ]
49    default: 1
50    description: |
51      operation mode of the TX output control logic. Valid values are:
52        <0> : bi-phase output mode
53        <1> : normal output mode (default)
54        <2> : test output mode
55        <3> : clock output mode
56
57  nxp,tx-output-config:
58    $ref: /schemas/types.yaml#/definitions/uint32
59    default: 0x02
60    description: |
61      TX output pin configuration. Valid values are any one of the below
62      or combination of TX0 and TX1:
63        <0x01> : TX0 invert
64        <0x02> : TX0 pull-down (default)
65        <0x04> : TX0 pull-up
66        <0x06> : TX0 push-pull
67        <0x08> : TX1 invert
68        <0x10> : TX1 pull-down
69        <0x20> : TX1 pull-up
70        <0x30> : TX1 push-pull
71
72  nxp,clock-out-frequency:
73    $ref: /schemas/types.yaml#/definitions/uint32
74    description: |
75      clock frequency in Hz on the CLKOUT pin.
76      If not specified or if the specified value is 0, the CLKOUT pin
77      will be disabled.
78
79  nxp,no-comparator-bypass:
80    type: boolean
81    description: Allows to disable the CAN input comparator.
82
83required:
84  - compatible
85  - reg
86  - interrupts
87
88allOf:
89  - $ref: can-controller.yaml#
90  - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml
91  - if:
92      properties:
93        compatible:
94          contains:
95            enum:
96              - technologic,sja1000
97              - renesas,rzn1-sja1000
98    then:
99      required:
100        - reg-io-width
101  - if:
102      properties:
103        compatible:
104          contains:
105            const: renesas,rzn1-sja1000
106    then:
107      required:
108        - clocks
109        - power-domains
110
111unevaluatedProperties: false
112
113examples:
114  - |
115    can@1a000 {
116        compatible = "technologic,sja1000";
117        reg = <0x1a000 0x100>;
118        interrupts = <1>;
119        reg-io-width = <2>;
120        nxp,tx-output-config = <0x06>;
121        nxp,external-clock-frequency = <24000000>;
122    };
123
124  - |
125    #include <dt-bindings/interrupt-controller/arm-gic.h>
126    #include <dt-bindings/clock/r9a06g032-sysctrl.h>
127
128    can@52104000 {
129        compatible = "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000";
130        reg = <0x52104000 0x800>;
131        reg-io-width = <4>;
132        interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
133        clocks = <&sysctrl R9A06G032_HCLK_CAN0>;
134        power-domains = <&sysctrl>;
135    };
136