/linux/drivers/clk/versatile/ |
H A D | clk-impd1.c | 31 .vd_max = 519, 49 .vd_max = 519,
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/linux/Documentation/devicetree/bindings/serial/ |
H A D | renesas,hscif.yaml | 143 clocks = <&cpg CPG_MOD 519>, <&cpg CPG_CORE R8A7795_CLK_S3D1>, 149 resets = <&cpg 519>;
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/linux/drivers/interconnect/qcom/ |
H A D | sdx65.h | 36 #define SDX65_SLAVE_CNOC_DDRSS 519
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H A D | qdu1000.h | 49 #define QDU1000_SLAVE_RBCPR_MX_CFG 519
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H A D | sm8450.h | 82 #define SM8450_SLAVE_RBCPR_CX_CFG 519
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H A D | sc8280xp.h | 93 #define SC8280XP_SLAVE_CAMERA_CFG 519
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/linux/include/linux/ |
H A D | errno.h | 21 #define ENOPARAM 519 /* Parameter not supported */
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/linux/arch/x86/include/asm/ |
H A D | user.h | 46 * bytes[512..519] of the memory layout are updated correspondingly.
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/linux/include/dt-bindings/clock/ |
H A D | exynos5420.h | 197 #define CLK_ACLK_FL1550_CAM 519
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H A D | rockchip,rk3576-cru.h | 537 #define PCLK_CCI_ROOT 519
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/linux/include/dt-bindings/arm/ |
H A D | qcom,ids.h | 253 #define QCOM_ID_SM8550 519
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/linux/include/uapi/linux/ |
H A D | if_arp.h | 64 #define ARPHRD_RAWIP 519 /* Raw IP */
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/linux/drivers/clk/renesas/ |
H A D | r8a779f0-cpg-mssr.c | 136 DEF_MOD("i2c1", 519, R8A779F0_CLK_S0D6_PER),
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H A D | r8a77970-cpg-mssr.c | 138 DEF_MOD("hscif1", 519, R8A77970_CLK_S2D1),
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H A D | r8a77980-cpg-mssr.c | 143 DEF_MOD("hscif1", 519, R8A77980_CLK_S3D1),
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H A D | r8a774c0-cpg-mssr.c | 174 DEF_MOD("hscif1", 519, R8A774C0_CLK_S3D1C),
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H A D | r8a779a0-cpg-mssr.c | 162 DEF_MOD("i2c1", 519, R8A779A0_CLK_S1D4),
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H A D | r8a77990-cpg-mssr.c | 184 DEF_MOD("hscif1", 519, R8A77990_CLK_S3D1C),
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H A D | r8a779g0-cpg-mssr.c | 182 DEF_MOD("i2c1", 519, R8A779G0_CLK_S0D6_PER),
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H A D | r8a779h0-cpg-mssr.c | 185 DEF_MOD("i2c1", 519, R8A779H0_CLK_S0D6_PER),
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H A D | r8a774b1-cpg-mssr.c | 166 DEF_MOD("hscif1", 519, R8A774B1_CLK_S3D1),
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/linux/arch/x86/entry/syscalls/ |
H A D | syscall_64.tbl | 407 519 x32 recvmsg compat_sys_recvmsg
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/linux/tools/perf/arch/x86/entry/syscalls/ |
H A D | syscall_64.tbl | 407 519 x32 recvmsg compat_sys_recvmsg
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/linux/drivers/gpu/drm/nouveau/dispnv04/ |
H A D | arb.c | 95 if ((p1 < m1 && m1 > 0) || clwm > 519) { in nv04_calc_arb()
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/linux/include/dt-bindings/reset/ |
H A D | rockchip,rk3588-cru.h | 594 #define SRST_H_AHB2APB 519
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