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/linux/drivers/clk/versatile/
H A Dclk-impd1.c31 .vd_max = 519,
49 .vd_max = 519,
/linux/Documentation/devicetree/bindings/serial/
H A Drenesas,hscif.yaml143 clocks = <&cpg CPG_MOD 519>, <&cpg CPG_CORE R8A7795_CLK_S3D1>,
149 resets = <&cpg 519>;
/linux/drivers/interconnect/qcom/
H A Dsdx65.h36 #define SDX65_SLAVE_CNOC_DDRSS 519
H A Dqdu1000.h49 #define QDU1000_SLAVE_RBCPR_MX_CFG 519
H A Dsm8450.h82 #define SM8450_SLAVE_RBCPR_CX_CFG 519
H A Dsc8280xp.h93 #define SC8280XP_SLAVE_CAMERA_CFG 519
/linux/include/linux/
H A Derrno.h21 #define ENOPARAM 519 /* Parameter not supported */
/linux/arch/x86/include/asm/
H A Duser.h46 * bytes[512..519] of the memory layout are updated correspondingly.
/linux/include/dt-bindings/clock/
H A Dexynos5420.h197 #define CLK_ACLK_FL1550_CAM 519
H A Drockchip,rk3576-cru.h537 #define PCLK_CCI_ROOT 519
/linux/include/dt-bindings/arm/
H A Dqcom,ids.h253 #define QCOM_ID_SM8550 519
/linux/include/uapi/linux/
H A Dif_arp.h64 #define ARPHRD_RAWIP 519 /* Raw IP */
/linux/drivers/clk/renesas/
H A Dr8a779f0-cpg-mssr.c136 DEF_MOD("i2c1", 519, R8A779F0_CLK_S0D6_PER),
H A Dr8a77970-cpg-mssr.c138 DEF_MOD("hscif1", 519, R8A77970_CLK_S2D1),
H A Dr8a77980-cpg-mssr.c143 DEF_MOD("hscif1", 519, R8A77980_CLK_S3D1),
H A Dr8a774c0-cpg-mssr.c174 DEF_MOD("hscif1", 519, R8A774C0_CLK_S3D1C),
H A Dr8a779a0-cpg-mssr.c162 DEF_MOD("i2c1", 519, R8A779A0_CLK_S1D4),
H A Dr8a77990-cpg-mssr.c184 DEF_MOD("hscif1", 519, R8A77990_CLK_S3D1C),
H A Dr8a779g0-cpg-mssr.c182 DEF_MOD("i2c1", 519, R8A779G0_CLK_S0D6_PER),
H A Dr8a779h0-cpg-mssr.c185 DEF_MOD("i2c1", 519, R8A779H0_CLK_S0D6_PER),
H A Dr8a774b1-cpg-mssr.c166 DEF_MOD("hscif1", 519, R8A774B1_CLK_S3D1),
/linux/arch/x86/entry/syscalls/
H A Dsyscall_64.tbl407 519 x32 recvmsg compat_sys_recvmsg
/linux/tools/perf/arch/x86/entry/syscalls/
H A Dsyscall_64.tbl407 519 x32 recvmsg compat_sys_recvmsg
/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Darb.c95 if ((p1 < m1 && m1 > 0) || clwm > 519) { in nv04_calc_arb()
/linux/include/dt-bindings/reset/
H A Drockchip,rk3588-cru.h594 #define SRST_H_AHB2APB 519

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