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Searched +full:500 +full:c0000 (Results 1 – 16 of 16) sorted by relevance

/linux/Documentation/devicetree/bindings/cache/
H A Dsocionext,uniphier-system-cache.yaml67 cache-controller@500c0000 {
80 l2: cache-controller@500c0000 {
92 l3: cache-controller@500c8000 {
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra186-p3509-0000+p3636-0001.dts21 i2c5 = "/i2c@31c0000";
594 i2c@31c0000 {
834 dpaux@155c0000 {
1149 polling-delay-passive = <500>;
1203 polling-delay-passive = <500>;
1217 polling-delay-passive = <500>;
H A Dtegra186-p2771-0000.dts2483 dpaux@155c0000 {
2659 polling-delay-passive = <500>;
2713 polling-delay-passive = <500>;
2727 polling-delay-passive = <500>;
H A Dtegra234.dtsi2917 dp_aux_ch2_i2c: i2c@31c0000 {
3048 pwm5: pwm@32c0000 {
3749 compatible = "nvidia,tegra234-smmu", "nvidia,smmu-500";
4096 compatible = "nvidia,tegra234-smmu", "nvidia,smmu-500";
4235 compatible = "nvidia,tegra234-smmu", "nvidia,smmu-500";
4553 pcie@140c0000 {
5109 pcie@141c0000 {
5164 pcie-ep@141c0000 {
/linux/arch/arm/boot/dts/socionext/
H A Duniphier-ld4.dtsi55 l2: cache-controller@500c0000 {
H A Duniphier-sld8.dtsi55 l2: cache-controller@500c0000 {
H A Duniphier-pro5.dtsi136 l2: cache-controller@500c0000 {
150 l3: cache-controller@500c8000 {
H A Duniphier-pro4.dtsi63 l2: cache-controller@500c0000 {
H A Duniphier-pxs2.dtsi161 l2: cache-controller@500c0000 {
/linux/arch/arm64/boot/dts/arm/
H A Djuno-base.dtsi304 funnel@220c0000 { /* cluster0 funnel */
413 funnel@230c0000 { /* cluster1 funnel */
912 i2c-sda-hold-time-ns = <500>;
/linux/arch/arm64/boot/dts/sprd/
H A Dums512.dtsi89 CPU5: cpu@500 {
272 anlg_phy_g3_regs: syscon@323c0000 {
/linux/arch/arm64/boot/dts/cix/
H A Dsky1.dtsi79 cpu5: cpu@500 {
391 uart1: serial@40c0000 {
/linux/arch/arm64/boot/dts/qcom/
H A Dmonaco.dtsi957 qupv3_id_0: geniqup@9c0000 {
2206 config_noc: interconnect@14c0000 {
2220 aggre1_noc: interconnect@16c0000 {
4760 tpdm@68c0000 {
5065 compatible = "qcom,qcs8300-smmu-500", "qcom,adreno-smmu",
5066 "qcom,smmu-500", "arm,mmu-500";
7178 compatible = "qcom,qcs8300-smmu-500", "qcom,smmu-500", "arm,mmu-500";
7318 compatible = "qcom,qcs8300-smmu-500", "qcom,smmu-500", "arm,mmu-500";
7703 nspa_noc: interconnect@260c0000 {
H A Dsc8280xp.dtsi172 cpu5: cpu@500 {
896 qup2: geniqup@8c0000 {
1322 qup0: geniqup@9c0000 {
2119 aggre1_noc: interconnect@16c0000 {
3220 lpass_tlmm: pinctrl@33c0000 {
3529 compatible = "qcom,sc8280xp-smmu-500", "qcom,adreno-smmu",
3530 "qcom,smmu-500", "arm,mmu-500";
5848 compatible = "qcom,sc8280xp-smmu-500", "arm,mmu-500";
6321 nspb_noc: interconnect@210c0000 {
H A Dsm8650.dtsi287 cpu5: cpu@500 {
479 entry-latency-us = <500>;
2066 qupv3_id_1: geniqup@8c0000 {
2582 i2c_master_hub_0: geniqup@9c0000 {
3581 pcie_noc: interconnect@16c0000 {
4375 compatible = "qcom,sm8650-smmu-500", "qcom,adreno-smmu",
4376 "qcom,smmu-500", "arm,mmu-500";
7169 compatible = "qcom,sm8650-smmu-500", "qcom,smmu-500", "arm,mmu-500";
7659 nsp_noc: interconnect@320c0000 {
H A Dglymur.dtsi109 cpu5: cpu@500 {
860 qupv3_2: geniqup@8c0000 {
2755 pcie_west_anoc: interconnect@16c0000 {
4035 compatible = "qcom,glymur-smmu-500", "qcom,adreno-smmu",
4036 "qcom,smmu-500", "arm,mmu-500";
7542 compatible = "qcom,glymur-smmu-500",
7543 "qcom,smmu-500",
7544 "arm,mmu-500";
7660 <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>,
8117 nsp_noc: interconnect@320c0000 {