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/linux/drivers/scsi/qla2xxx/
H A Dqla_mbx.c95 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
161 mcp->mb[0] = MBS_LINK_DOWN_ERROR; in qla2x00_mailbox_command()
171 !is_rom_cmd(mcp->mb[0])) || ha->flags.eeh_busy) { in qla2x00_mailbox_command()
174 mcp->mb[0]); in qla2x00_mailbox_command()
188 mcp->mb[0]); in qla2x00_mailbox_command()
198 ha->flags.purge_mbox, ha->flags.eeh_busy, mcp->mb[0]); in qla2x00_mailbox_command()
208 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]); in qla2x00_mailbox_command()
228 iptr = mcp->mb; in qla2x00_mailbox_command()
229 command = mcp->mb[0]; in qla2x00_mailbox_command()
383 mcp->mb[0] = MBS_LINK_DOWN_ERROR; in qla2x00_mailbox_command()
[all …]
/linux/arch/alpha/kernel/
H A Dio.c20 mb(); in ioread8()
22 mb(); in ioread8()
29 mb(); in ioread16()
31 mb(); in ioread16()
38 mb(); in ioread32()
40 mb(); in ioread32()
47 mb(); in ioread64()
49 mb(); in ioread64()
55 mb(); in iowrite8()
61 mb(); in iowrite16()
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H A Dcore_mcpcia.c27 * NOTE: Herein lie back-to-back mb instructions. They are magic.
54 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
66 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
104 mb(); in conf_read()
108 mb(); in conf_read()
113 mb(); in conf_read()
117 mb(); in conf_read()
118 mb(); /* magic */ in conf_read()
123 mb(); in conf_read()
126 mb(); in conf_read()
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H A Dsys_alcor.c42 mb(); in alcor_update_irq_hw()
63 *(vuip)GRU_INT_CLEAR = 1 << (d->irq - 16); mb(); in alcor_mask_and_ack_irq()
64 *(vuip)GRU_INT_CLEAR = 0; mb(); in alcor_mask_and_ack_irq()
73 *(vuip)GRU_INT_CLEAR = 0x80000000; mb(); in alcor_isa_mask_and_ack_irq()
74 *(vuip)GRU_INT_CLEAR = 0; mb(); in alcor_isa_mask_and_ack_irq()
116 *(vuip)GRU_INT_MASK = 0; mb(); /* all disabled */ in alcor_init_irq()
117 *(vuip)GRU_INT_EDGE = 0; mb(); /* all are level */ in alcor_init_irq()
118 *(vuip)GRU_INT_HILO = 0x80000000U; mb(); /* ISA only HI */ in alcor_init_irq()
119 *(vuip)GRU_INT_CLEAR = 0; mb(); /* all clear */ in alcor_init_irq()
149 * 4 Interrupt Line A from slot 1
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/linux/drivers/accel/habanalabs/include/gaudi2/
H A Dgaudi2.h13 #define DRAM_BAR_ID 4
16 #define CFG_BAR_SIZE 0x10000000ull /* 256MB */
21 #define CFG_SIZE 0x8000000ull /* 96MB CFG + 32MB DBG*/
22 #define CFG_REGION_SIZE 0xC000000ull /* 192MB */
24 #define STM_FLASH_BASE_ADDR 0x1000007FF4000000ull /* Not 256MB aligned */
25 #define STM_FLASH_ALIGNED_OFF 0x4000000ull /* 256 MB alignment */
26 #define STM_FLASH_SIZE 0x2000000ull /* 32MB */
29 #define SPI_FLASH_SIZE 0x1000000ull /* 16MB */
38 #define BAR0_RSRVD_SIZE 0x1000000ull /* 16MB */
41 #define SRAM_SIZE 0x3000000ull /* 48MB */
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/linux/arch/microblaze/kernel/
H A Dhead.S51 .align 4
99 ori r3, r0, (0x10000 - 4)
103 addik r11, r11, 4 /* increment counting */
105 addik r3, r3, -4 /* descrement loop */
135 ori r3, r0, (LMB_SIZE - 4)
139 addik r11, r11, 4 /* increment counting */
141 addik r3, r3, -4 /* descrement loop */
163 bri 4
184 bgei r11, GT16 /* size is greater than 16MB */
186 bgei r11, GT8 /* size is greater than 8MB */
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/linux/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/
H A Dtlb.json37 … "BriefDescription": "This event counts operations that cause a TLB access to the L1I in 4KB page."
47 … "BriefDescription": "This event counts operations that cause a TLB access to the L1I in 2MB page."
52 …"BriefDescription": "This event counts operations that cause a TLB access to the L1I in 32MB page."
57 …BriefDescription": "This event counts operations that cause a TLB access to the L1I in 512MB page."
72 … "BriefDescription": "This event counts operations that cause a TLB access to the L1D in 4KB page."
82 … "BriefDescription": "This event counts operations that cause a TLB access to the L1D in 2MB page."
87 …"BriefDescription": "This event counts operations that cause a TLB access to the L1D in 32MB page."
92 …BriefDescription": "This event counts operations that cause a TLB access to the L1D in 512MB page."
107 … "BriefDescription": "This event counts operations that cause a TLB refill of the L1I in 4KB page."
117 … "BriefDescription": "This event counts operations that cause a TLB refill of the L1I in 2MB page."
[all …]
/linux/Documentation/arch/x86/x86_64/
H A Dmm.rst7 Complete virtual memory map with 4-level page tables
20 from TB to GB and then MB/KB.
33 00007ffffffff000 | ~128 TB | 00007fffffffffff | 4 kB | ... guard hole
69 fffffc0000000000 | -4 TB | fffffdffffffffff | 2 TB | ... unused hole
76 ffffffff00000000 | -4 GB | ffffffff7fffffff | 2 GB | ... unused hole
77 …ffffffff80000000 | -2 GB | ffffffff9fffffff | 512 MB | kernel text mapping, mapped to physic…
78 ffffffff80000000 |-2048 MB | | |
79 ffffffffa0000000 |-1536 MB | fffffffffeffffff | 1520 MB | module mapping space
80 ffffffffff000000 | -16 MB | | |
81 …FIXADDR_START | ~-11 MB | ffffffffff5fffff | ~0.5 MB | kernel-internal fixmap range, variable s…
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dv3,v360epc-pci.yaml35 The inbound ranges must be aligned to a 1MB boundary, and may be 1MB, 2MB,
36 4MB, 8MB, 16MB, 32MB, 64MB, 128MB, 256MB, 512MB, 1GB or 2GB in size. The
46 256MB (0x10000000) in size. The prefetchable memory window must be
75 …dma-ranges = <0x02000000 0 0x20000000 0x20000000 0 0x20000000>, /* EBI: 512 MB @ LB 20000000 1:1 */
83 <0x4800 0 0 4 &pic 16>, /* INT D on slot 9 is irq 16 */
88 <0x5000 0 0 4 &pic 13>, /* INT D on slot 10 is irq 13 */
93 <0x5800 0 0 4 &pic 14>, /* INT D on slot 11 is irq 14 */
98 <0x6000 0 0 4 &pic 15>; /* INT D on slot 12 is irq 15 */
/linux/arch/parisc/include/asm/
H A Dassembly.h22 #define REG_SZ 4
62 #define LDREGM ldd,mb
314 fldd,mb -8(\regs), %fr30
315 fldd,mb -8(\regs), %fr29
316 fldd,mb -8(\regs), %fr28
317 fldd,mb -8(\regs), %fr27
318 fldd,mb -8(\regs), %fr26
319 fldd,mb -8(\regs), %fr25
320 fldd,mb -8(\regs), %fr24
321 fldd,mb -8(\regs), %fr23
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/linux/arch/arc/plat-axs10x/
H A Daxs10x.c44 * | snps,dw-apb-intc (MB)| in axs10x_enable_gpio_intc_wire()
55 * DT hardware topology - connect MB intc directly to cpu intc in axs10x_enable_gpio_intc_wire()
78 unsigned int pad:11, y:12, m:4, d:5; in axs10x_print_board_ver()
80 unsigned int d:5, m:4, y:12, pad:11; in axs10x_print_board_ver()
94 char mb[32]; in axs10x_early_init() local
104 scnprintf(mb, 32, "MainBoard v%d", mb_rev); in axs10x_early_init()
105 axs10x_print_board_ver(CREG_MB_VER, mb); in axs10x_early_init()
121 * Each AXI master has a 4GB memory map specified as 16 apertures of 256MB, each
122 * of which maps to a corresponding 256MB aperture in Target slave memory map.
127 * Access from cpu to MB controllers such as GMAC is setup using AXI Tunnel:
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/linux/arch/mips/include/asm/dec/
H A Dkn05.h5 * DECstation/DECsystem 5000/260 (4max+ or KN05), 5000/150 (4min
6 * or KN04-BA), Personal DECstation/DECsystem 5000/50 (4maxine or
7 * KN04-CA) and DECsystem 5900/260 (KN05) R4k CPU card MB ASIC
23 * The oncard MB (Memory Buffer) ASIC provides an additional address
34 #define KN4K_MB_INT (4*IOASIC_SLOT_SIZE) /* MB interrupt register */
35 #define KN4K_MB_EA (5*IOASIC_SLOT_SIZE) /* MB error address? */
36 #define KN4K_MB_EC (6*IOASIC_SLOT_SIZE) /* MB error ??? */
37 #define KN4K_MB_CSR (7*IOASIC_SLOT_SIZE) /* MB control & status */
48 * MB ASIC interrupt bits.
50 #define KN4K_MB_INR_MB 4 /* ??? */
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/linux/tools/testing/selftests/mm/
H A Dcharge_reserved_hugetlb.sh4 # Kselftest framework requirement - SKIP code is 4.
5 ksft_skip=4
87 mb=$(($kb / 1024))
88 echo $mb
91 MB=$(get_machine_hugepage_size)
101 echo "$cgroup_limit" >$cgroup_path/$name/hugetlb.${MB}MB.$fault_limit_file
105 $cgroup_path/$name/hugetlb.${MB}MB.$reservation_limit_file
117 local path="$cgroup_path/$cgroup/hugetlb.${MB}MB.$reservation_usage_file"
130 local path="$cgroup_path/$cgroup/hugetlb.${MB}MB.$reservation_usage_file"
143 local path="$cgroup_path/$cgroup/hugetlb.${MB}MB.$fault_usage_file"
[all …]
H A Dhugetlb_reparenting_test.sh4 # Kselftest framework requirement - SKIP code is 4.
5 ksft_skip=4
44 mb=$(($kb / 1024))
45 echo $mb
48 MB=$(get_machine_hugepage_size)
88 echo "actual = $((${actual%% *} / 1024 / 1024)) MB"
89 echo "expected = $((${expected%% *} / 1024 / 1024)) MB"
104 if [ ! -z ${3:-} ] && [ ! -z ${4:-} ]; then
106 expected_b_hugetlb="$4"
110 assert_with_retry "$CGROUP_ROOT/a/hugetlb.${MB}MB.$usage_file" "$expected_a_hugetlb"
[all …]
/linux/Documentation/arch/xtensa/
H A Dmmu.rst31 in this code. After step 4, we jump to intended (linked) address of this code.
60 4. Only the first triplet in the "ranges" property is considered
62 5. The parent-bus-address value is rounded down to the nearest 256MB boundary
64 6. The IO area covers the entire 256MB segment of parent-bus-address; the
83 | VMALLOC area | VMALLOC_START 0xc0000000 128MB - 64KB
96 | | (4MB * DCACHE_N_COLORS)
104 | Cached KSEG | XCHAL_KSEG_CACHED_VADDR 0xd0000000 128MB
106 | Uncached KSEG | XCHAL_KSEG_BYPASS_VADDR 0xd8000000 128MB
108 | Cached KIO | XCHAL_KIO_CACHED_VADDR 0xe0000000 256MB
110 | Uncached KIO | XCHAL_KIO_BYPASS_VADDR 0xf0000000 256MB
[all …]
/linux/drivers/net/fddi/skfp/
H A Dhwmtm.c70 static void queue_llc_rx(struct s_smc *smc, SMbuf *mb);
71 static void smt_to_llc(struct s_smc *smc, SMbuf *mb);
74 static void queue_txd_mb(struct s_smc *smc, SMbuf *mb);
133 void smt_free_mbuf(struct s_smc *smc, SMbuf *mb);
273 smc->os.hwm.mbuf_pool.mb_start=(SMbuf *)(&smc->os.hwm.mbuf_pool.mb[0]) ; in mac_drv_init()
416 SMbuf *mb ; in init_fddi_driver() local
426 mb = smc->os.hwm.mbuf_pool.mb_start ; in init_fddi_driver()
429 mb->sm_use_count = 1 ; in init_fddi_driver()
430 smt_free_mbuf(smc,mb) ; in init_fddi_driver()
431 mb++ ; in init_fddi_driver()
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/linux/arch/arm/boot/dts/xilinx/
H A Dzynq-cc108.dts58 flash@0 { /* 16 MB */
63 spi-rx-bus-width = <4>;
68 reg = <0x0 0x400000>; /* 4MB */
72 reg = <0x400000 0x400000>; /* 4MB */
76 reg = <0x800000 0x400000>; /* 4MB */
80 reg = <0xc00000 0x100000>; /* 1MB */
84 reg = <0xd00000 0x200000>; /* 2MB */
88 reg = <0xf00000 0x100000>; /* 1MB */
/linux/arch/hexagon/kernel/
H A Dhead.S49 * Done in 4MB chunks.
74 r1 = add(r1, r3); /* + (4M-1) */
75 r26 = lsr(r1, #22); /* / 4M = # of entries */
79 r2.l = #0x0000; /* round back down to 4MB boundary */
81 r2 = lsr(r1, #22) /* 4MB page number */
82 r2 = asl(r2, #2) /* times sizeof(PTE) (4bytes) */
85 r1 = add(r1,r2) /* r1 = 4MB PTE for the first entry */
87 r2.l = #0x0000 /* 4MB increments */
90 memw(r0 ++ #4) = r1
94 /* PAGE_OFFSET >> (4MB shift - 4 bytes per entry shift) */
[all …]
/linux/Documentation/fb/
H A Dmatroxfb.rst45 4 0x12 0x102
60 4 0x104 0x106
96 head, not even talking about second). Running XFree86 4.x accelerated mga
125 memory usable for on-screen display (i.e. max. 8 MB).
162 - 0 -> 2x128Kx32 chips, 2MB onboard, probably sgram
163 - 1 -> 2x128Kx32 chips, 4MB onboard, probably sgram
164 - 2 -> 2x256Kx32 chips, 4MB onboard, probably sgram
165 - 3 -> 2x256Kx32 chips, 8MB onboard, probably sgram
166 - 4 -> 2x512Kx16 chips, 8/16MB onboard, probably sdram only
168 - 6 -> 4x128Kx32 chips, 4MB onboard, probably sgram
[all …]
/linux/drivers/firmware/efi/libstub/
H A Dunaccepted_memory.c53 * A 4k bitmap can track 64GiB of physical address space. in allocate_unaccepted_bitmap()
56 * address space -- It needs 256MiB to handle 4PiB of the address in allocate_unaccepted_bitmap()
110 * Consider case like this (assuming unit_size == 2MB): in process_unaccepted_memory()
112 * | 4k | 2044k | 2048k | in process_unaccepted_memory()
113 * ^ 0x0 ^ 2MB ^ 4MB in process_unaccepted_memory()
115 * Only the first 4k has been accepted. The 0MB->2MB region can not be in process_unaccepted_memory()
116 * represented in the bitmap. The 2MB->4MB region can be represented in in process_unaccepted_memory()
117 * the bitmap. But, the 0MB->4MB region is <2*unit_size and will be in process_unaccepted_memory()
/linux/arch/arm/mach-footbridge/include/mach/
H A Dhardware.h13 * 0xff800000 0x40000000 1MB X-Bus
14 * 0xff000000 0x7c000000 1MB PCI I/O space
15 * 0xfe000000 0x42000000 1MB CSR
16 * 0xfd000000 0x78000000 1MB Outbound write flush (not supported)
17 * 0xfc000000 0x79000000 1MB PCI IACK/special space
18 * 0xfb000000 0x7a000000 16MB PCI Config type 1
19 * 0xfa000000 0x7b000000 16MB PCI Config type 0
20 * 0xf9000000 0x50000000 1MB Cache flush
21 * 0xf0000000 0x80000000 16MB ISA memory
49 #define XBUS_SWITCH_J17_13 ((*XBUS_SWITCH) & (1 << 4))
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/linux/arch/powerpc/boot/dts/fsl/
H A Dp1024rdb.dtsi59 /* 3.5 MB for Linux Kernel Image */
65 /* 11MB for JFFS2 based Root file System */
89 /* 1MB for u-boot Bootloader Image */
96 /* 1MB for DTB Image */
102 /* 4MB for Linux Kernel Image */
108 /* 4MB for Compressed Root file System Image */
114 /* 15MB for JFFS2 based Root file System */
120 /* 7MB for User Writable Area */
150 /* 4MB for Linux Kernel Image */
156 /* 4MB for Compressed RFS Image */
[all …]
H A Dp1020rdb-pc.dtsi59 /* 3.5 MB for Linux Kernel Image */
65 /* 11MB for JFFS2 based Root file System */
89 /* 1MB for u-boot Bootloader Image */
96 /* 1MB for DTB Image */
102 /* 4MB for Linux Kernel Image */
108 /* 4MB for Compressed Root file System Image */
114 /* 7MB for JFFS2 based Root file System */
120 /* 15MB for JFFS2 based Root file System */
172 /* 4MB for Linux Kernel Image */
178 /* 4MB for Compressed RFS Image */
[all …]
/linux/drivers/net/dsa/realtek/
H A Drtl8365mb.c7 * The RTL8365MB-VC is a 4+1 port 10/100/1000M switch controller. It includes 4
35 * The driver uses DSA to integrate the 4 user and 1 extension ports into the
180 #define RTL8365MB_INDIRECT_ACCESS_ADDRESS_OCPADR_5_1_MASK GENMASK(4, 0)
200 #define RTL8365MB_EXT_PORT_MODE_TMII_MAC 4
221 (((_extint) % 2) * 4)
389 RTL8365MB_MAKE_MIB_COUNTER(0, 4, ifInOctets),
390 RTL8365MB_MAKE_MIB_COUNTER(4, 2, dot3StatsFCSErrors),
408 RTL8365MB_MAKE_MIB_COUNTER(40, 4, etherStatsOctets),
417 RTL8365MB_MAKE_MIB_COUNTER(60, 4, ifOutOctets),
432 RTL8365MB_MAKE_MIB_COUNTER(92, 4, inIgmpJoinsSuccess),
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/linux/Documentation/arch/x86/
H A Dmtrr.rst73 reg00: base=0x00000000 ( 0MB), size= 128MB: write-back, count=1
74 reg01: base=0x08000000 ( 128MB), size= 64MB: write-back, count=1
87 reg00: base=0x00000000 ( 0MB), size= 128MB: write-back, count=1
88 reg01: base=0x08000000 ( 128MB), size= 64MB: write-back, count=1
89 reg02: base=0xf8000000 (3968MB), size= 4MB: write-combining, count=1
91 This is for video RAM at base address 0xf8000000 and size 4 megabytes. To
107 That's 4 megabytes, which is 0x400000 bytes (in hexadecimal).
124 reg00: base=0x00000000 ( 0MB), size= 64MB: write-back, count=1
125 reg01: base=0xfb000000 (4016MB), size= 16MB: write-combining, count=1
126 reg02: base=0xfb000000 (4016MB), size= 4kB: uncachable, count=1
[all …]

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