Lines Matching +full:4 +full:mb
7 * The RTL8365MB-VC is a 4+1 port 10/100/1000M switch controller. It includes 4
35 * The driver uses DSA to integrate the 4 user and 1 extension ports into the
180 #define RTL8365MB_INDIRECT_ACCESS_ADDRESS_OCPADR_5_1_MASK GENMASK(4, 0)
200 #define RTL8365MB_EXT_PORT_MODE_TMII_MAC 4
221 (((_extint) % 2) * 4)
389 RTL8365MB_MAKE_MIB_COUNTER(0, 4, ifInOctets),
390 RTL8365MB_MAKE_MIB_COUNTER(4, 2, dot3StatsFCSErrors),
408 RTL8365MB_MAKE_MIB_COUNTER(40, 4, etherStatsOctets),
417 RTL8365MB_MAKE_MIB_COUNTER(60, 4, ifOutOctets),
432 RTL8365MB_MAKE_MIB_COUNTER(92, 4, inIgmpJoinsSuccess),
479 RTL8365MB_PHY_INTERFACE_MODE_RGMII = BIT(4),
834 struct rtl8365mb *mb = priv->chip_data; in rtl8365mb_get_port_extint() local
839 &mb->chip_info->extints[i]; in rtl8365mb_get_port_extint()
857 struct rtl8365mb *mb; in rtl8365mb_get_tag_protocol() local
859 mb = priv->chip_data; in rtl8365mb_get_tag_protocol()
860 cpu = &mb->cpu; in rtl8365mb_get_tag_protocol()
1088 struct rtl8365mb *mb; in rtl8365mb_phylink_mac_link_down() local
1092 mb = priv->chip_data; in rtl8365mb_phylink_mac_link_down()
1093 p = &mb->ports[port]; in rtl8365mb_phylink_mac_link_down()
1118 struct rtl8365mb *mb; in rtl8365mb_phylink_mac_link_up() local
1122 mb = priv->chip_data; in rtl8365mb_phylink_mac_link_up()
1123 p = &mb->ports[port]; in rtl8365mb_phylink_mac_link_up()
1247 * two or lower two registers. In case the MIB counter is 4 words, we in rtl8365mb_mib_counter_read()
1250 if (length == 4) in rtl8365mb_mib_counter_read()
1253 offset = (offset + 1) % 4; in rtl8365mb_mib_counter_read()
1274 struct rtl8365mb *mb; in rtl8365mb_get_ethtool_stats() local
1278 mb = priv->chip_data; in rtl8365mb_get_ethtool_stats()
1280 mutex_lock(&mb->mib_lock); in rtl8365mb_get_ethtool_stats()
1293 mutex_unlock(&mb->mib_lock); in rtl8365mb_get_ethtool_stats()
1322 struct rtl8365mb *mb; in rtl8365mb_get_phy_stats() local
1324 mb = priv->chip_data; in rtl8365mb_get_phy_stats()
1327 mutex_lock(&mb->mib_lock); in rtl8365mb_get_phy_stats()
1330 mutex_unlock(&mb->mib_lock); in rtl8365mb_get_phy_stats()
1357 struct rtl8365mb *mb; in rtl8365mb_get_mac_stats() local
1361 mb = priv->chip_data; in rtl8365mb_get_mac_stats()
1363 mutex_lock(&mb->mib_lock); in rtl8365mb_get_mac_stats()
1376 mutex_unlock(&mb->mib_lock); in rtl8365mb_get_mac_stats()
1423 struct rtl8365mb *mb; in rtl8365mb_get_ctrl_stats() local
1425 mb = priv->chip_data; in rtl8365mb_get_ctrl_stats()
1428 mutex_lock(&mb->mib_lock); in rtl8365mb_get_ctrl_stats()
1431 mutex_unlock(&mb->mib_lock); in rtl8365mb_get_ctrl_stats()
1453 struct rtl8365mb *mb = priv->chip_data; in rtl8365mb_stats_update() local
1458 stats = &mb->ports[port].stats; in rtl8365mb_stats_update()
1460 mutex_lock(&mb->mib_lock); in rtl8365mb_stats_update()
1473 mutex_unlock(&mb->mib_lock); in rtl8365mb_stats_update()
1479 spin_lock(&mb->ports[port].stats_lock); in rtl8365mb_stats_update()
1491 stats->rx_bytes = cnt[RTL8365MB_MIB_ifInOctets] - 4 * stats->rx_packets; in rtl8365mb_stats_update()
1493 cnt[RTL8365MB_MIB_ifOutOctets] - 4 * stats->tx_packets; in rtl8365mb_stats_update()
1510 spin_unlock(&mb->ports[port].stats_lock); in rtl8365mb_stats_update()
1530 struct rtl8365mb *mb; in rtl8365mb_get_stats64() local
1532 mb = priv->chip_data; in rtl8365mb_get_stats64()
1533 p = &mb->ports[port]; in rtl8365mb_get_stats64()
1542 struct rtl8365mb *mb = priv->chip_data; in rtl8365mb_stats_setup() local
1549 mutex_init(&mb->mib_lock); in rtl8365mb_stats_setup()
1552 struct rtl8365mb_port *p = &mb->ports[i]; in rtl8365mb_stats_setup()
1569 struct rtl8365mb *mb = priv->chip_data; in rtl8365mb_stats_teardown() local
1574 struct rtl8365mb_port *p = &mb->ports[i]; in rtl8365mb_stats_teardown()
1697 struct rtl8365mb *mb = priv->chip_data; in rtl8365mb_irq_setup() local
1785 mb->irq = irq; in rtl8365mb_irq_setup()
1796 free_irq(mb->irq, priv); in rtl8365mb_irq_setup()
1797 mb->irq = 0; in rtl8365mb_irq_setup()
1816 struct rtl8365mb *mb = priv->chip_data; in rtl8365mb_irq_teardown() local
1820 if (mb->irq) { in rtl8365mb_irq_teardown()
1821 free_irq(mb->irq, priv); in rtl8365mb_irq_teardown()
1822 mb->irq = 0; in rtl8365mb_irq_teardown()
1838 struct rtl8365mb *mb = priv->chip_data; in rtl8365mb_cpu_config() local
1839 struct rtl8365mb_cpu *cpu = &mb->cpu; in rtl8365mb_cpu_config()
1870 struct rtl8365mb *mb; in rtl8365mb_change_tag_protocol() local
1872 mb = priv->chip_data; in rtl8365mb_change_tag_protocol()
1873 cpu = &mb->cpu; in rtl8365mb_change_tag_protocol()
1884 /* The switch also supports a 4-byte format, similar to rtl4a but with in rtl8365mb_change_tag_protocol()
1898 struct rtl8365mb *mb = priv->chip_data; in rtl8365mb_switch_init() local
1903 ci = mb->chip_info; in rtl8365mb_switch_init()
1947 struct rtl8365mb *mb; in rtl8365mb_setup() local
1951 mb = priv->chip_data; in rtl8365mb_setup()
1952 cpu = &mb->cpu; in rtl8365mb_setup()
1988 struct rtl8365mb_port *p = &mb->ports[i]; in rtl8365mb_setup()
2073 struct rtl8365mb *mb = priv->chip_data; in rtl8365mb_detect() local
2090 mb->chip_info = ci; in rtl8365mb_detect()
2095 if (!mb->chip_info) { in rtl8365mb_detect()
2102 dev_info(priv->dev, "found an %s switch\n", mb->chip_info->name); in rtl8365mb_detect()
2105 mb->priv = priv; in rtl8365mb_detect()
2106 mb->cpu.trap_port = RTL8365MB_MAX_NUM_PORTS; in rtl8365mb_detect()
2107 mb->cpu.insert = RTL8365MB_CPU_INSERT_TO_ALL; in rtl8365mb_detect()
2108 mb->cpu.position = RTL8365MB_CPU_POS_AFTER_SA; in rtl8365mb_detect()
2109 mb->cpu.rx_length = RTL8365MB_CPU_RXLEN_64BYTES; in rtl8365mb_detect()
2110 mb->cpu.format = RTL8365MB_CPU_FORMAT_8BYTES; in rtl8365mb_detect()