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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dti,j721e-cpb-audio.yaml18 In order to support 48KHz and 44.1KHz family of sampling rates the parent
19 clock for AUDIO_REFCLK2 needs to be changed between PLL4 (for 48KHz) and
20 PLL15 (for 44.1KHz). The same PLLs are used for McASP10's AUXCLK clock via
24 48KHz family:
28 44.1KHz family:
33 48KHz family:
85 - description: Parent for CPB_McASP auxclk (for 48KHz)
86 - description: Parent for CPB_McASP auxclk (for 44.1KHz)
88 - description: Parent for CPB_SCKI clock (for 48KHz)
89 - description: Parent for CPB_SCKI clock (for 44.1KHz)
[all …]
H A Dti,j721e-cpb-ivi-audio.yaml23 In order to support 48KHz and 44.1KHz family of sampling rates the parent clock
24 for AUDIO_REFCLK0 needs to be changed between PLL4 (for 48KHz) and PLL15 (for
25 44.1KHz). The same PLLs are used for McASP0's AUXCLK clock via different
30 Clocking setup for 48KHz family:
37 Clocking setup for 44.1KHz family:
76 - description: Parent for CPB_McASP auxclk (for 48KH
[all...]
H A Dgtm601.txt5 "option,gtm601" = 8kHz mono
6 "broadmobi,bm818" = 48KHz stereo
H A Drealtek,rt1015p.yaml14 only supports S24, 48kHz, 64FS.
H A Dcs35l33.txt32 60ms,100ms,175ms respectively for 48KHz sample rate.
/freebsd/contrib/file/magic/scripts/
H A Dcreate_filemagic_flac6 ## >>17 belong&0xfffff0 0x2ee000 \b, 192 kHz
15 ## (16384 kHz = 32 kHz * 512 = 32 * 2^9)
17 ## (22579.2 kHz = 44.1kHz * 512 = 44.1 * 2^9)
20 ## (24576 kHz = 48 kHz * 512 = 48 * 2^9)
53 ## use bc with sed to convert and format Hz to kHz
58 printf -v line ">>17\tbelong&%#-15x\t%#08x\t%s, %s kHz\n" \
/freebsd/share/man/man4/
H A Dsnd_emu10kx.478 PCM support is limited to 48kHz/16 bit stereo (192kHz/24 bit part
83 to 48kHz/16 bit stereo (192kHz/24 bit part of this chipset is not supported).
138 you will get one more DSP device that is rate-locked to 48kHz/16bit/mono.
139 This is actually 48kHz/16bit/32 channels on SB Live! cards and
140 48kHz/16bit/64channels on Audigy cards, but the current implementation of
H A Dsnd_hdspe.468 (32kHz-48kHz), 4 channels at double speed (64kHz-96kHz), and 2 channels at
69 quad speed (128kHz-192kHz).
H A Dsnd_hdsp.469 (32kHz-48kHz) and 4 channels at double speed (64kHz-96kHz).
70 Only the HDSP 9632 can operate at quad speed (128kHz-192kHz), ADAT is
/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Dr8a779g0-white-hawk-ard-audio-da7212.dtso55 * 44.1kHz groups sound is available by default.
56 * You need to update audio_clkin settings to switch to 48kHz groups sound.
88 /* 44.1kHz groups [(C) clock] */
92 /* 48 kHz groups [(C) clock] */
163 clock-frequency = <5644800>; /* 44.1kHz groups [(C) clock] */
164 // clock-frequency = <6144000>; /* 48 kHz groups [(C) clock] */
/freebsd/contrib/file/magic/Magdir/
H A Danimation344 >>>>10 byte&0xF0 48 \b, mesh
413 >>>5 byte&0xF0 48 \b, mesh (missing profile header)
547 >2 byte&0xF0 0x30 \b, 48 kbps
560 >2 byte&0x0C 0x00 \b, 44.1 kHz
561 >2 byte&0x0C 0x04 \b, 48 kHz
562 >2 byte&0x0C 0x08 \b, 32 kHz
581 >2 byte&0xF0 0x20 \b, 48 kbps
595 >2 byte&0x0C 0x00 \b, 44.1 kHz
596 >2 byte&0x0C 0x04 \b, 48 kHz
597 >2 byte&0x0C 0x08 \b, 32 kHz
[all …]
H A Ddolby13 >4 byte&0xc0 = 0x00 48 kHz,
14 >4 byte&0xc0 = 0x40 44.1 kHz,
15 >4 byte&0xc0 = 0x80 32 kHz,
16 # is this one used for 96 kHz?
53 >4 byte&0x3e = 0x04 \b, 48 kbit/s
H A Daudio304 >22 byte =0 replay 5.485 KHz
305 >22 byte =1 replay 8.084 KHz
306 >22 byte =2 replay 10.971 KHz
307 >22 byte =3 replay 16.168 KHz
308 >22 byte =4 replay 21.942 KHz
309 >22 byte =5 replay 32.336 KHz
310 >22 byte =6 replay 43.885 KHz
311 >22 byte =7 replay 47.261 KHz
340 >48 search/0x1000 auth
389 >23 byte 1 33kHz
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ull.dtsi17 /* kHz uV */
25 /* KHz uV */
66 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
H A Dimx6dl-b1x5pv2.dtsi21 /* kHz uV */
26 /* ARM kHz SOC-PU uV */
34 /* kHz uV */
39 /* ARM kHz SOC-PU uV */
334 tmp75: temperature-sensor@48 {
/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-lpc2k.txt13 absence of this property the default value is used (100 kHz).
28 lm75@48 {
/freebsd/sys/contrib/device-tree/src/mips/ingenic/
H A Dcu1000-neo.dts48 * Use the 32.768 kHz oscillator as the parent of the RTC for a higher
56 /* 1500 kHz for the system timer and clocksource */
109 ads7830: adc@48 {
H A Dcu1830-neo.dts48 * Use the 32.768 kHz oscillator as the parent of the RTC for a higher
56 /* 1500 kHz for the system timer and clocksource */
108 ads7830: adc@48 {
H A Dgcw0.dts123 brightness-levels = <0 16 32 48 64 80 96 112 128
246 i2c-gpio,delay-us = <2>; /* 250 kHz */
445 * 27 MHz (required by TV encoder) and 48 MHz (required by USB host).
447 * Use the 32 kHz oscillator as the parent of the RTC for a higher
478 * 750 kHz for the system timer and clocksource, 12 MHz for the OST,
H A Drs90.dts44 brightness-levels = <0 16 32 48 64 80 112 144 192 255>;
297 /* Use 32kHz oscillator as the parent of the RTC clock */
304 * 750 kHz for the system timer and clocksource, and use RTC as the
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dst,nomadik.txt15 i.e. the driver output for the slow 32kHz chrystal, if the
89 48: IPBMCCLK
/freebsd/tools/tools/ath/athprom/
H A Deeprom-48 | EEP MAP $eepMap | Enable 32 khz $exist32KHzCrystal |
52 | 48 | $pwr48_0 | $pwr48_1 | $pwr48_2 | $pwr48_3 |
59 | 48 | $pwr48_4 | $pwr48_5 | $pwr48_6 | $pwr48_7 |
81 | EEP MAP $eepMap | Enable 32 khz $exist32KHzCrystal |
146 | EEP MAP $eepMap | Enable 32 khz $exist32KHzCrystal |
189 | 48 | $pwr48_0 | $pwr48_1 |
H A Deeprom-58 | EEP MAP $eepMap | Enable 32 khz $exist32KHzCrystal |
65 | 48 | $pwr48_0 | $pwr48_1 | $pwr48_2 | $pwr48_3 |
72 | 48 | $pwr48_4 | $pwr48_5 | $pwr48_6 | $pwr48_7 |
94 | EEP MAP $eepMap | Enable 32 khz $exist32KHzCrystal |
172 | EEP MAP $eepMap | Enable 32 khz $exist32KHzCrystal |
228 | 48 | $pwr48_0 | $pwr48_1 |
/freebsd/sys/dev/usb/template/
H A Dusb_template_audio.c223 /* 48kHz */
291 /* 48kHz */
/freebsd/sys/contrib/device-tree/Bindings/
H A Dtrivial-devices.yaml308 # 48-Lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch

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