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/linux/drivers/net/ethernet/hisilicon/hns/
H A Dhns_dsaf_ppe.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2014-2015 Hisilicon Limited.
33 PPE_QID_MODE1, /* switch:128VM non switch:6Port/4VM/4TC */
34 PPE_QID_MODE2, /* switch:32VM/4TC non switch:6Port/16VM */
35 PPE_QID_MODE3, /* switch:4TC/8RSS non switch:2Port/64VM */
36 PPE_QID_MODE4, /* switch:8VM/16RSS non switch:2Port/16VM/4TC */
37 PPE_QID_MODE5, /* switch:16VM/8TC non switch:6Port/16RSS */
38 PPE_QID_MODE6, /* switch:32VM/4RSS non switch:6Port/2VM/8TC */
39 PPE_QID_MODE7, /* switch:32RSS non switch:2Port/8VM/8TC */
40 PPE_QID_MODE8, /* switch:6VM/4TC/4RSS non switch:2Port/16VM/4RSS */
[all …]
/linux/sound/soc/codecs/
H A Dlm49453.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * lm49453.c - LM49453 ALSA Soc Audio driver
23 #include <sound/soc-dapm.h>
35 { 4, 0x00 },
227 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHPL1_REG, 0, 1, 0),
228 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHPL1_REG, 1, 1, 0),
229 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHPL1_REG, 2, 1, 0),
230 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACHPL1_REG, 3, 1, 0),
231 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACHPL1_REG, 4, 1, 0),
232 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACHPL1_REG, 5, 1, 0),
[all …]
H A Disabelle.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * isabelle.c - Low power high fidelity audio codec driver
22 #include <sound/soc-dapm.h>
36 { 4, 0x00 },
147 SOC_ENUM_SINGLE(ISABELLE_AUDIO_HPF_CFG_REG, 4,
194 ISABELLE_AMIC_CFG_REG, 4,
233 SOC_DAPM_SINGLE("DAC1L Playback Switch", ISABELLE_HSDRV_CFG1_REG, 7, 1, 0),
234 SOC_DAPM_SINGLE("APGA1 Playback Switch", ISABELLE_HSDRV_CFG1_REG, 6, 1, 0),
238 SOC_DAPM_SINGLE("DAC1R Playback Switch", ISABELLE_HSDRV_CFG1_REG, 5, 1, 0),
239 SOC_DAPM_SINGLE("APGA2 Playback Switch", ISABELLE_HSDRV_CFG1_REG, 4, 1, 0),
[all …]
H A Dadau1373.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
24 #include "adau-utils.h"
123 #define ADAU1373_DAI_INVERT_LRCLK BIT(4)
151 #define ADAU1373_EP_CTRL_MICBIAS1_OFFSET 4
232 { ADAU1373_DIN_MIX_CTRL(4), 0x00 },
237 { ADAU1373_DOUT_MIX_CTRL(4), 0x00 },
323 0, 7, TLV_DB_SCALE_ITEM(-7900, 400, 1),
324 8, 15, TLV_DB_SCALE_ITEM(-4700, 300, 0),
325 16, 23, TLV_DB_SCALE_ITEM(-2300, 200, 0),
[all …]
H A Dwm8974.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8974.c -- WM8974 ALSA Soc Audio driver
5 * Copyright 2006-2009 Wolfson Microelectronics PLC.
34 { 4, 0x0050 }, { 5, 0x0000 }, { 6, 0x0140 }, { 7, 0x0000 },
55 static const char *wm8974_companding[] = {"Off", "NC", "u-law", "A-law" };
67 SOC_ENUM_SINGLE(WM8974_COMP, 1, 4, wm8974_companding), /* adc */
68 SOC_ENUM_SINGLE(WM8974_COMP, 3, 4, wm8974_companding), /* dac */
69 SOC_ENUM_SINGLE(WM8974_DAC, 4, 4, wm8974_deemp),
72 SOC_ENUM_SINGLE(WM8974_EQ1, 5, 4, wm8974_eq1),
74 SOC_ENUM_SINGLE(WM8974_EQ2, 5, 4, wm8974_eq2),
[all …]
H A Dwm9713.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm9713.c -- ALSA Soc WM9713 codec support
5 * Copyright 2006-10 Wolfson Microelectronics PLC.
8 * Features:-
70 SOC_ENUM_SINGLE(AC97_LINE, 3, 4, wm9713_mic_mixer), /* record mic mixer 0 */
71 SOC_ENUM_SINGLE(AC97_VIDEO, 14, 4, wm9713_rec_mux), /* record mux hp 1 */
72 SOC_ENUM_SINGLE(AC97_VIDEO, 9, 4, wm9713_rec_mux), /* record mux mono 2 */
74 SOC_ENUM_SINGLE(AC97_VIDEO, 0, 8, wm9713_rec_src), /* record mux right 4*/
76 SOC_ENUM_SINGLE(AC97_PCI_SVID, 14, 4, wm9713_alc_select), /* alc source select 6*/
77 SOC_ENUM_SINGLE(AC97_REC_GAIN, 14, 4, wm9713_mono_pga), /* mono input select 7 */
[all …]
H A Dwm8978.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8978.c -- WM8978 ALSA SoC Audio Codec driver
5 * Copyright (C) 2009-2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
7 * Copyright 2006-2009 Wolfson Microelectronics PLC.
34 { 4, 0x0050 },
106 static const char *wm8978_companding[] = {"Off", "NC", "u-law", "A-law"};
133 static const DECLARE_TLV_DB_SCALE(digital_tlv, -12750, 50, 1);
134 static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
135 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1200, 75, 0);
136 static const DECLARE_TLV_DB_SCALE(spk_tlv, -5700, 100, 0);
[all …]
H A Dwm8510.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8510.c -- WM8510 ALSA Soc Audio driver
38 { 4, 0x0050 },
95 switch (reg) { in wm8510_volatile()
113 static const char *wm8510_companding[] = { "Off", "NC", "u-law", "A-law" };
118 SOC_ENUM_SINGLE(WM8510_COMP, 1, 4, wm8510_companding), /* adc */
119 SOC_ENUM_SINGLE(WM8510_COMP, 3, 4, wm8510_companding), /* dac */
120 SOC_ENUM_SINGLE(WM8510_DAC, 4, 4, wm8510_deemp),
126 SOC_SINGLE("Digital Loopback Switch", WM8510_COMP, 0, 1, 0),
131 SOC_ENUM("Playback De-emphasis", wm8510_enum[2]),
[all …]
H A Dwm8971.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm8971.c -- WM8971 ALSA SoC Audio driver
47 { 4, 0x0000 },
94 static const char *wm8971_treble[] = { "8kHz", "4kHz" };
115 SOC_ENUM_SINGLE(WM8971_ALC1, 7, 4, wm8971_alc_func),
116 SOC_ENUM_SINGLE(WM8971_NGATE, 1, 2, wm8971_ng_type), /* 4 */
117 SOC_ENUM_SINGLE(WM8971_ADCDAC, 1, 4, wm8971_deemp),
118 SOC_ENUM_SINGLE(WM8971_ADCTL1, 4, 4, wm8971_mono_mux),
122 SOC_ENUM_SINGLE(WM8971_LADCIN, 6, 4, wm8971_lpga_sel),
123 SOC_ENUM_SINGLE(WM8971_RADCIN, 6, 4, wm8971_rpga_sel),
[all …]
H A Dak4535.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ak4535.c -- AK4535 ALSA Soc Audio driver
42 { 4, 0x02 },
57 switch (reg) { in ak4535_volatile()
65 static const char *ak4535_mono_gain[] = {"+6dB", "-17dB"};
66 static const char *ak4535_mono_out[] = {"(L + R)/2", "Hi-Z"};
75 SOC_ENUM_SINGLE(AK4535_DAC, 0, 4, ak4535_deemp),
80 SOC_SINGLE("ALC2 Switch", AK4535_SIG1, 1, 1, 0),
86 SOC_SINGLE("Mic Boost (+20dB) Switch", AK4535_MIC, 0, 1, 0),
87 SOC_ENUM("Mic Select", ak4535_enum[4]),
[all …]
H A Dwm8940.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8940.c -- WM8940 ALSA Soc Audio driver
48 switch (reg) { in wm8940_volatile_register()
58 switch (reg) { in wm8940_readable_register()
126 { 0x16, 0x0000 }, /* Notch Filter 4 Control 1 */
127 { 0x17, 0x0000 }, /* Notch Filter 4 Control 2 */
140 { 0x2a, 0x0030 }, /* ALC Control 4 */
155 static const char *wm8940_companding[] = { "Off", "NC", "u-law", "A-law" };
173 static DECLARE_TLV_DB_SCALE(wm8940_spk_vol_tlv, -5700, 100, 1);
174 static DECLARE_TLV_DB_SCALE(wm8940_att_tlv, -1000, 1000, 0);
[all …]
H A Dwm8750.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8750.c -- WM8750 ALSA SoC audio driver
40 { 4, 0x0000 },
93 static const char *wm8750_treble[] = {"8kHz", "4kHz"};
120 SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
124 SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
125 SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
126 SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
128 SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
129 SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
[all …]
H A Dwm9712.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm9712.c -- ALSA Soc WM9712 codec support
5 * Copyright 2006-12 Wolfson Microelectronics PLC.
76 switch (reg) { in wm9712_volatile_reg()
115 static const DECLARE_TLV_DB_SCALE(main_tlv, -3450, 150, 0);
119 SOC_ENUM_SINGLE(AC97_PCI_SVID, 14, 4, wm9712_alc_select),
120 SOC_ENUM_SINGLE(AC97_VIDEO, 12, 4, wm9712_alc_mux),
121 SOC_ENUM_SINGLE(AC97_AUX, 9, 4, wm9712_out3_src),
123 SOC_ENUM_SINGLE(AC97_REC_SEL, 12, 4, wm9712_rec_adc),
126 SOC_ENUM_SINGLE(AC97_MIC, 5, 4, wm9712_mic),
[all …]
H A Dwm8753.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm8753.c -- WM8753 ALSA Soc Audio driver
5 * Copyright 2003-11 Wolfson Microelectronics PLC.
12 * Dual DAI:-
23 * Fast DAI switching:-
25 * The driver can now fast switch between the DAI configurations via a
157 static const char *wm8753_treble[] = {"8kHz", "4kHz"};
166 static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
171 static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
178 static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
[all …]
H A Dtlv320aic3x.c1 // SPDX-License-Identifier: GPL-2.0-only
16 * ---------------------------------------
17 * MONO_LOUT -> N/A | MONO_LOUT -> N/A
18 * | IN1L -> LINE1L
19 * | IN1R -> LINE1R
20 * | IN2L -> LINE2L
21 * | IN2R -> LINE2R
22 * | MIC3L/R -> N/A
25 * ---------------------------------------
51 #define AIC3X_NUM_SUPPLIES 4
[all …]
H A Dwm9090.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2009-12 Wolfson Microelectronics
25 { 1, 0x0006 }, /* R1 - Power Management (1) */
26 { 2, 0x6000 }, /* R2 - Power Management (2) */
27 { 3, 0x0000 }, /* R3 - Power Management (3) */
28 { 6, 0x01C0 }, /* R6 - Clocking 1 */
29 { 22, 0x0003 }, /* R22 - IN1 Line Control */
30 { 23, 0x0003 }, /* R23 - IN2 Line Control */
31 { 24, 0x0083 }, /* R24 - IN1 Line Input A Volume */
32 { 25, 0x0083 }, /* R25 - IN1 Line Input B Volume */
[all …]
H A Dwm8770.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8770.c -- WM8770 ALSA SoC Audio driver
41 { 4, 0x7f },
72 switch (reg) { in wm8770_volatile_reg()
105 regcache_mark_dirty(wm8770->regmap); \
114 static const DECLARE_TLV_DB_SCALE(adc_tlv, -1200, 100, 0);
115 static const DECLARE_TLV_DB_SCALE(dac_dig_tlv, -12750, 50, 1);
116 static const DECLARE_TLV_DB_SCALE(dac_alg_tlv, -12700, 100, 1);
128 SOC_ENUM_DOUBLE(WM8770_DACPHASE, 4, 5, 2, dac_phase_text[2]),
136 SOC_SINGLE("DAC Playback Switch", WM8770_DACMUTE, 4, 1, 1),
[all …]
H A Dda7210.c1 // SPDX-License-Identifier: GPL-2.0+
102 #define DA7210_VOICE_F0_MASK (0x7 << 4)
103 #define DA7210_VOICE_F0_25 (1 << 4)
107 #define DA7210_DAC_L_SRC_DAI_L (4 << 0)
109 #define DA7210_DAC_R_SRC_DAI_R (5 << 4)
127 #define DA7210_DAI_OUT_R_SRC (7 << 4)
147 #define DA7210_MCLK_RANGE_10_20_MHZ (1 << 4)
259 * min : 0x11 (-54.0 dB)
261 * reserved : 0x00 - 0x0F
267 /* -54 dB to +15 dB */
[all …]
H A Dwm_hubs.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm_hubs.c -- WM8993/4 common code
5 * Copyright 2009-12 Wolfson Microelectronics plc
27 const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
30 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0);
32 static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1);
33 static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0);
34 static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
35 static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
36 static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0);
[all …]
/linux/drivers/soc/fsl/qe/
H A Ducc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * QE UCC API Set - UCC specific routines implementations.
33 if (ucc_num > UCC_MAX_NUM - 1) in ucc_set_qe_mux_mii_mng()
34 return -EINVAL; in ucc_set_qe_mux_mii_mng()
37 qe_clrsetbits_be32(&qe_immr->qmx.cmxgcr, QE_CMXGCR_MII_ENET_MNG, in ucc_set_qe_mux_mii_mng()
50 * 'ucc_num' is the UCC number, from 0 - 7.
61 switch (ucc_num) { in ucc_set_type()
62 case 0: guemr = &qe_immr->ucc1.slow.guemr; in ucc_set_type()
64 case 1: guemr = &qe_immr->ucc2.slow.guemr; in ucc_set_type()
66 case 2: guemr = &qe_immr->ucc3.slow.guemr; in ucc_set_type()
[all …]
/linux/sound/soc/sunxi/
H A Dsun50i-codec-analog.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
10 * Based on sun8i-codec-analog.c
22 #include <sound/soc-dapm.h>
25 #include "sun8i-adda-pr-regmap.h"
36 #define SUN50I_ADDA_OL_MIX_CTRL_PHONE 4
45 #define SUN50I_ADDA_OR_MIX_CTRL_PHONE 4
52 #define SUN50I_ADDA_EARPIECE_CTRL0_EAR_RAMP_TIME 4
64 #define SUN50I_ADDA_LINEOUT_CTRL0_RSRC_SEL 4
70 #define SUN50I_ADDA_MIC1_CTRL_MIC1G 4
[all …]
/linux/Documentation/sound/cards/
H A Dcmipci.rst2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
13 DACs, both streams are handled independently unlike the 4/6ch multi-
17 card#0) for front and 4/6ch playbacks, while the second PCM device
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
30 The rear output can be heard only when "Four Channel Mode" switch is
35 When "Four Channel Mode" switch is off, the output from rear speakers
38 before your turn off this switch.
[all …]
/linux/arch/x86/entry/
H A Dentry_32.S1 /* SPDX-License-Identifier: GPL-2.0 */
5 * entry_32.S contains the system-call and low-level fault and trap handling routines.
13 * 0(%esp) - %ebx
14 * 4(%esp) - %ecx
15 * 8(%esp) - %edx
16 * C(%esp) - %esi
17 * 10(%esp) - %edi
18 * 14(%esp) - %ebp
19 * 18(%esp) - %eax
20 * 1C(%esp) - %ds
[all …]
/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmediatek,mt7530.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
[all …]
/linux/arch/mips/lantiq/xway/
H A Dclk.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG
42 switch (ltq_cgu_r32(CGU_SYS) & 0xc) { in ltq_danube_cpu_hz()
45 case 4: in ltq_danube_cpu_hz()
59 switch (clksys) { in ltq_danube_pp32_hz()
107 cpu_sel = (ltq_cgu_r32(CGU_SYS_XRX) >> 4) & 0xf; in ltq_vr9_cpu_hz()
109 switch (cpu_sel) { in ltq_vr9_cpu_hz()
129 case 4: in ltq_vr9_cpu_hz()
150 switch (ocp_sel) { in ltq_vr9_fpi_hz()
163 case 4: in ltq_vr9_fpi_hz()
[all …]

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