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/linux/arch/arm/mach-omap2/
H A Dclockdomains3xxx_data.c25 * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
54 * 3430ES1 PM_WKDEP_GFX: adds IVA2, removes CORE
55 * 3430ES2 PM_WKDEP_SGX: adds IVA2, removes CORE
70 /* 3430: PM_WKDEP_PER: CORE, IVA2, MPU, WKUP */
88 /* 3430ES2: PM_WKDEP_USBHOST: CORE, IVA2, MPU, WKUP */
106 /* 3430 PM_WKDEP_MPU: CORE, IVA2, DSS, PER */
124 /* 3430 PM_WKDEP_IVA2: CORE, MPU, WKUP, DSS, PER */
135 /* 3430 PM_WKDEP_CAM: IVA2, MPU, WKUP */
143 /* 3430 PM_WKDEP_DSS: IVA2, MPU, WKUP */
157 /* 3430: PM_WKDEP_NEON: MPU */
[all …]
H A Dprm2xxx_3xxx.h129 * The 3430 register and bit names are generally used,
190 * 3430: RM_RSTST_IVA2, RM_RSTST_MPU, RM_RSTST_GFX, RM_RSTST_DSS,
200 * 3430: RM_RSTST_CORE, RM_RSTST_EMU
210 * 3430: RM_RSTST_CORE, RM_RSTST_EMU
223 * 3430: PM_WKDEP_IVA2, PM_WKDEP_GFX, PM_WKDEP_DSS, PM_WKDEP_CAM,
235 * 3430: PM_PWSTCTRL_IVA2, PM_PWSTCTRL_CORE, PM_PWSTCTRL_GFX,
H A Dprm.h53 * 3430: PM_PWSTST_IVA2, PM_PWSTST_MPU, PM_PWSTST_CORE, PM_PWSTST_GFX,
65 * 3430: PM_PWSTST_IVA2, PM_PWSTST_MPU, PM_PWSTST_CORE, PM_PWSTST_GFX,
78 * 3430: PM_PWSTCTRL_IVA2, PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE,
H A Dpowerdomains2xxx_3xxx_data.c20 * the "DSP power domain." On the 3430, the DSP is a 'C64 DSP like the
39 * The GFX powerdomain is not present on 3430ES2, but currently we do not
H A Dclock.h26 #define RATE_IN_3430ES1 (1 << 2) /* 3430ES1 rates only */
27 #define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */
H A Dpowerdomains3xxx_data.c87 * 3430s up to ES3.0 and 3630ES1.0. Hence this feature
89 * Refer: 3430 errata ID i459 and 3630 errata ID i579
92 * which applies to 3430 <= ES3.1, but since the SAR feature
119 * to 3430 <= ES3.1
189 /* XXX This is accurate for 3430 SGX, but what about GFX? */
H A Dprcm-common.h20 * CCR_MOD on 3430; and GFX_MOD only exists < 3430ES2.
36 /* IVA2 module is < base on 3430 */
207 /* 3430 register bits shared between CM & PRM registers */
H A Dcm2xxx_3xxx.h98 /* CM register bits shared between 24XX and 3430 */
H A Dclockdomains2xxx_3xxx_data.c27 * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
H A Dclockdomains2420_data.c27 * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
H A Dclockdomains2430_data.c27 * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
H A Dprm3xxx.c382 * The ST_IO_CHAIN bit does not exist in 3430 before es3.1. The only
401 * return value. These registers are only available in 3430 es3.1 and later.
H A Domap_hwmod_3xxx_data.c2362 /* 3430ES1-only hwmod links */
2369 /* 3430ES2+-only hwmod links */
2379 /* <= 3430ES3-only hwmod links */
2386 /* 3430ES3+-only hwmod links */
H A Diomap.h151 /* 3430 IVA - currently unmapped */
H A Dsoc.h233 IS_OMAP_TYPE(3430, 0x3430)
/linux/Documentation/admin-guide/media/
H A Domap3isp.rst26 - 3430
67 Autoidle does have issues with some ISP blocks on the 3430, at least.
74 OMAP 3430 TRM:
/linux/arch/arm/boot/dts/ti/omap/
H A Domap36xx-omap3430es2plus-clocks.dtsi15 ssi_ssr_gate_fck_3430es2: clock-ssi-ssr-gate-fck-3430es2@0 {
31 ssi_ssr_div_fck_3430es2: clock-ssi-ssr-div-fck-3430es2@8 {
62 hsotgusb_ick_3430es2: clock-hsotgusb-ick-3430es2@4 {
70 ssi_ick: clock-ssi-ick-3430es2@0 {
H A Domap36xx-am35xx-omap3430es2plus-clocks.dtsi192 dss1_alwon_fck: clock-dss1-alwon-fck-3430es2@0 {
/linux/Documentation/translations/zh_CN/video4linux/
H A Domap3isp.txt48 3430
84 Autoidle（自动空闲）功能至少在 3430 的 ISP 模块中确实存在一些问题。
257 OMAP 3430 TRM:
/linux/Documentation/w1/masters/
H A Domap-hdq.rst7 HDQ/1-wire controller on the TI OMAP 2430/3430 platforms.
15 The HDQ/1-Wire module of TI OMAP2430/3430 platforms implement the hardware
/linux/drivers/clk/ti/
H A Ddpll3xxx.c92 /* From 3430 TRM ES2 4.7.6.2 */
244 * XXX This code is not needed for 3430/AM35xx; can it be optimized
269 * XXX This code is not needed for 3430/AM35xx; can it be optimized
391 /* 3430 ES2 TRM: 4.7.6.9 DPLL Programming Sequence */ in omap3_noncore_dpll_program()
1018 * on 3430ES1 prevents us from changing DPLL multipliers or dividers in omap3_dpll4_set_rate()
1022 pr_err("clock: DPLL4 cannot change rate due to silicon 'Limitation 2.5' on 3430ES1.\n"); in omap3_dpll4_set_rate()
1045 pr_err("clock: DPLL4 cannot change rate due to silicon 'Limitation 2.5' on 3430ES1.\n"); in omap3_dpll4_set_rate_and_parent()
/linux/Documentation/devicetree/bindings/arm/ti/
H A Domap.yaml60 - description: Gumstix Overo TI OMAP 3430/3630 boards + expansion boards
/linux/include/linux/power/
H A Dsmartreflex.h129 * 3430 specific values. Maybe these should be passed from board file or
/linux/drivers/media/platform/ti/omap3isp/
H A Dispcsiphy.c98 * control (SCM) register space and part of the CORE power domain on both 3430
/linux/drivers/irqchip/
H A Dirq-omap-intc.c126 * cf. errata ID i540 for 3430 (all revisions up to 3.1.x) in omap3_intc_prepare_idle()

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