Home
last modified time | relevance | path

Searched +full:32 +full:- +full:bit (Results 1 – 25 of 1104) sorted by relevance

12345678910>>...45

/linux/drivers/net/fddi/skfp/h/
H A Dskfbi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
15 * FDDI-Fx (x := {I(SA), P(CI)})
19 /*--------------------------------------------------------------------------*/
40 #define B0_RAP 0x0000 /* 8 bit register address port */
41 /* 0x0001 - 0x0003: reserved */
42 #define B0_CTRL 0x0004 /* 8 bit control register */
43 #define B0_DAS 0x0005 /* 8 Bit control register (DAS) */
44 #define B0_LED 0x0006 /* 8 Bit LED register */
45 #define B0_TST_CTRL 0x0007 /* 8 bit test control register */
46 #define B0_ISRC 0x0008 /* 32 bit Interrupt source register */
[all …]
/linux/drivers/net/ethernet/marvell/
H A Dskge.h1 /* SPDX-License-Identifier: GPL-2.0 */
131 /* B0_CTST 16 bit Control/Status register */
133 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
134 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
135 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
138 CS_BUS_SLOT_SZ = 1<<8, /* Slot Size 0/1 = 32/64 bit slot */
142 CS_STOP_MAST = 1<<4, /* Command Bit to stop the master */
148 /* B0_LED 8 Bit LED register */
149 /* Bit 7.. 2: reserved */
153 /* B0_POWER_CTRL 8 Bit Power Control reg (YUKON only) */
[all …]
H A Dsky2.h1 /* SPDX-License-Identifier: GPL-2.0 */
30 /* Yukon-2 */
32 PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */
33 PCI_Y2_DLL_DIS = 1<<30, /* Disable PCI DLL (YUKON-2) */
34 PCI_SW_PWR_ON_RST= 1<<30, /* SW Power on Reset (Yukon-EX) */
35 PCI_Y2_PHY2_COMA = 1<<29, /* Set PHY 2 to Coma Mode (YUKON-2) */
36 PCI_Y2_PHY1_COMA = 1<<28, /* Set PHY 1 to Coma Mode (YUKON-2) */
37 PCI_Y2_PHY2_POWD = 1<<27, /* Set PHY 2 to Power Down (YUKON-2) */
38 PCI_Y2_PHY1_POWD = 1<<26, /* Set PHY 1 to Power Down (YUKON-2) */
41 PCI_PHY_LNK_TIM_MSK= 3L<<8,/* Bit 9.. 8: GPHY Link Trigger Timer */
[all …]
/linux/include/linux/
H A Dnfs4.h1 /* SPDX-License-Identifier: GPL-2.0 */
111 OP_SAVEFH = 32,
204 NF4BLK = 3, /* Special File - block device */
205 NF4CHR = 4, /* Special File - character device */
207 NF4SOCK = 6, /* Special File - socket */
208 NF4FIFO = 7, /* Special File - fifo */
311 FATTR4_MIMETYPE = 32,
393 * Symbol name and value are from draft-ietf-nfsv4-uncacheable-files
402 * attribute bits within 32-bit word boundaries.
406 #define FATTR4_WORD0_SUPPORTED_ATTRS BIT(FATTR4_SUPPORTED_ATTRS)
[all …]
H A Dcrc32.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 * crc32_le() - Compute least-significant-bit-first IEEE CRC-32
15 * This implements the CRC variant that is often known as the IEEE CRC-32, or
16 * simply CRC-32, and is widely used in Ethernet and other applications:
18 * - Polynomial: x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 +
20 * - Bit order: Least-significant-bit-first
21 * - Polynomial in integer form: 0xedb88320
26 * For new applications, prefer to use CRC-32C instead. See crc32c().
40 * crc32_be() - Compute most-significant-bit-first IEEE CRC-32
47 * *most-significant-bit-first* variant of the CRC. I.e., within each byte, the
[all …]
H A Dlitex.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 2019-2020 Antmicro <www.antmicro.com>
29 * For example, in the configuration with 8-bit CSR Bus, a 32-bit aligned,
30 * 32-bit wide logical CSR will be laid out as four 32-bit physical
33 * For Linux support, upstream LiteX enforces a 32-bit wide CSR bus, which
34 * means that only larger-than-32-bit CSRs will be split across multiple
35 * subregisters (e.g., a 64-bit CSR will be spread across two consecutive
36 * 32-bit subregisters).
38 * For details see: https://github.com/enjoy-digital/litex/wiki/CSR-Bus
58 _write_litex_subregister(val >> 32, reg); in litex_write64()
[all …]
/linux/drivers/usb/typec/tipd/
H A Dtps6598x.h1 /* SPDX-License-Identifier: GPL-2.0+ */
18 #define TPS_STATUS_PLUG_PRESENT BIT(0)
19 #define TPS_STATUS_PLUG_UPSIDE_DOWN BIT(4)
21 #define TPS_STATUS_PORTROLE BIT(5)
23 #define TPS_STATUS_DATAROLE BIT(6)
25 #define TPS_STATUS_VCONN BIT(7)
27 #define TPS_STATUS_OVERCURRENT BIT(16)
28 #define TPS_STATUS_GOTO_MIN_ACTIVE BIT(26)
29 #define TPS_STATUS_BIST BIT(27)
30 #define TPS_STATUS_HIGH_VOLTAGE_WARNING BIT(28)
[all …]
/linux/drivers/net/ethernet/cavium/liquidio/
H A Dcn66xx_regs.h7 * Copyright (c) 2003-2016 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
89 /* 1 register (32-bit) to enable Input queues */
92 /* 1 register (32-bit) to enable Output queues */
95 /* 1 register (32-bit) to determine whether Output queues are in reset. */
98 /* 1 register (32-bit) to determine whether Input queues are in reset. */
103 /* 1 register (32-bit) - instr. size of each input queue. */
106 /* 32 registers for Input Queue Instr Count - SLI_PKT_IN_DONE0_CNTS */
109 /* 32 registers for Input Queue Start Addr - SLI_PKT0_INSTR_BADDR */
112 /* 32 registers for Input Doorbell - SLI_PKT0_INSTR_BAOFF_DBELL */
[all …]
/linux/arch/alpha/kernel/
H A Dsys_sable.c1 // SPDX-License-Identifier: GPL-2.0
9 * Code supporting the Sable, Sable-Gamma, and Lynx systems.
39 /* Note mask bit is true for DISABLED irqs. */
42 void (*update_irq_hw)(unsigned long bit, unsigned long mask);
43 void (*ack_irq_hw)(unsigned long bit);
58 * 0-7 (char at 536)
59 * 8-15 (char at 53a)
60 * 16-23 (char at 53c)
64 * Bit Meaning Kernel IRQ
65 *------------------------------------------
[all …]
/linux/lib/
H A Diomap_copy.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * __iowrite32_copy - copy data to MMIO space, in 32-bit units
11 * @to: destination, in MMIO space (must be 32-bit aligned)
12 * @from: source (must be 32-bit aligned)
13 * @count: number of 32-bit quantities to copy
15 * Copy data from kernel space to MMIO space, in units of 32 bits at a
33 * __ioread32_copy - copy data from MMIO space, in 32-bit units
34 * @to: destination (must be 32-bit aligned)
35 * @from: source, in MMIO space (must be 32-bit aligned)
36 * @count: number of 32-bit quantities to copy
[all …]
/linux/drivers/staging/media/ipu3/
H A Dipu3-abi.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 #include "include/uapi/intel-ipu3.h"
15 #define IMGU_DVS_BLOCK_H 32
31 #define IMGU_ABI_AF_MAX_CELLS_PER_SET 32
32 #define IMGU_ABI_AWB_FR_MAX_CELLS_PER_SET 32
46 #define IMGU_PM_CTRL_START BIT(0)
47 #define IMGU_PM_CTRL_CFG_DONE BIT(1)
48 #define IMGU_PM_CTRL_RACE_TO_HALT BIT(2)
49 #define IMGU_PM_CTRL_NACK_ALL BIT(3)
50 #define IMGU_PM_CTRL_CSS_PWRDN BIT(4)
[all …]
/linux/include/uapi/linux/
H A Dswab.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
71 __u32 h = val >> 32; in __fswab64()
72 __u32 l = val & ((1ULL << 32) - 1); in __fswab64()
73 return (((__u64)__fswab32(l)) << 32) | ((__u64)(__fswab32(h))); in __fswab64()
98 * __swab16 - return a byteswapped 16-bit value
111 * __swab32 - return a byteswapped 32-bit value
124 * __swab64 - return a byteswapped 64-bit value
140 #else /* __BITS_PER_LONG == 32 */ in __swab()
146 * __swahw32 - return a word-swapped 32-bit value
157 * __swahb32 - return a high and low byte-swapped 32-bit value
[all …]
/linux/fs/ext4/
H A Dinode-test.c1 // SPDX-License-Identifier: GPL-2.0
28 #define LOWER_MSB_1 (-(UPPER_MSB_0) - 1L) /* avoid overflow */
33 #define UPPER_MSB_1 (-1L)
38 #define MAX_NANOSECONDS ((1L << 30) - 1)
43 "1901-12-13 Lower bound of 32bit < 0 timestamp, no extra bits"
45 "1969-12-31 Upper bound of 32bit < 0 timestamp, no extra bits"
47 "1970-01-01 Lower bound of 32bit >=0 timestamp, no extra bits"
49 "2038-01-19 Upper bound of 32bit >=0 timestamp, no extra bits"
51 "2038-01-19 Lower bound of 32bit <0 timestamp, lo extra sec bit on"
53 "2106-02-07 Upper bound of 32bit <0 timestamp, lo extra sec bit on"
[all …]
/linux/lib/tests/
H A Dffs_kunit.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * KUnit tests for ffs()-family functions
13 int expected_ffs; /* ffs() result (1-based) */
14 int expected_fls; /* fls() result (1-based) */
20 int expected_fls64; /* fls64() result (1-based) */
21 unsigned int expected_ffs64_0based; /* __ffs64() result (0-based) */
26 * Basic edge cases - core functionality validation
29 /* Zero case - special handling */
32 /* Single bit patterns - powers of 2 */
33 {0x00000001, 1, 1, "bit 0 set"},
[all …]
/linux/tools/testing/selftests/powerpc/vphn/
H A Dtest-vphn.c1 // SPDX-License-Identifier: GPL-2.0
41 "vphn: 1 x 16-bit value",
56 "vphn: 2 x 16-bit values",
72 "vphn: 3 x 16-bit values",
89 "vphn: 4 x 16-bi
[all...]
/linux/arch/loongarch/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
23 select ARCH_HAS_KERNEL_FPU_SUPPORT if 64BIT && CPU_HAS_FPU
27 select ARCH_HAS_PTE_SPECIAL if 64BIT
65 select ARCH_SUPPORTS_HUGETLBFS if 64BIT
70 select ARCH_HAS_PTE_PROTNONE if 64BIT
84 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP if 64BIT
92 select GENERIC_ATOMIC64 if 32BIT
99 select GENERIC_GETTIMEOFDAY if 64BIT
116 select HAVE_ALIGNED_STRUCT_PAGE if 64BIT
118 select HAVE_ARCH_BITREVERSE if 64BIT && BITREVERSE
[all …]
/linux/drivers/eisa/
H A Deisa.ids6 # Marc Zyngier <maz@wild-wind.fr.eu.org>
10 ABP0510 "Advansys ABP-510 ISA SCSI Host Adapter"
11 ABP0540 "Advansys ABP-540/542 ISA SCSI Host Adapter"
12 ABP7401 "AdvanSys ABP-740/742 EISA Single Channel SCSI Host Adapter"
13 ABP7501 "AdvanSys ABP-750/752 EISA Dual Channel SCSI Host Adapter"
14 ACC1200 "ACCTON EtherCombo-32 Ethernet Adapter"
15 ACC120A "ACCTON EtherCombo-32 Ethernet Adapter"
25 ACE7010 "ACME Multi-Function Board"
39 ACR1711 "AcerFrame 1000 486/33 SYSTEM-2"
41 ACR3211 "AcerFrame 3000MP 486 SYSTEM-1"
[all …]
/linux/arch/mips/include/asm/
H A Dmips-gic.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 # error Please include asm/mips-cps.h rather than asm/mips-gic.h
29 /* For read-only shared registers */
34 /* For read-write shared registers */
39 /* For read-only local registers */
44 /* For read-write local registers */
49 /* For read-only shared per-interrupt registers */
58 BUILD_BUG_ON(sz != 32); \
62 /* For read-write shared per-interrupt registers */
69 BUILD_BUG_ON(sz != 32); \
[all …]
/linux/arch/mips/include/asm/octeon/
H A Dcvmx-fau.h7 * Copyright (c) 2003-2008 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
57 * bit will be set. Otherwise the value of the register before
67 * bit will be set. Otherwise the value of the register before
77 * bit will be set. Otherwise the value of the register before
87 * bit will be set. Otherwise the value of the register before
97 * the error bit will be set. Otherwise the value of the
124 * - Step by 2 for 16 bit access.
125 * - Step by 4 for 32 bit access.
[all …]
/linux/Documentation/scsi/
H A Daic7xxx.rst1 .. SPDX-License-Identifier: GPL-2.0
5 Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v7.0
26 aic7770 10 EISA/VL 10MHz 16Bit 4 1
27 aic7850 10 PCI/32 10MHz 8Bit 3
28 aic7855 10 PCI/32 10MHz 8Bit 3
29 aic7856 10 PCI/32 10MHz 8Bit 3
30 aic7859 10 PCI/32 20MHz 8Bit 3
31 aic7860 10 PCI/32 20MHz 8Bit 3
32 aic7870 10 PCI/32 10MHz 16Bit 16
33 aic7880 10 PCI/32 20MHz 16Bit 16
[all …]
/linux/arch/mips/kernel/
H A Dunaligned.c18 * only the performance is affected. Much worse is that such code is non-
30 * option in your user programs - I discourage the use of the software
31 * emulation strongly - use the following code in your userland stuff:
92 #include <asm/unaligned-emul.h>
97 #include "access-helper.h"
121 orig31 = regs->regs[31]; in emulate_load_store_insn()
133 * can assume therefore that the code is MIPS-aware and in emulate_load_store_insn()
177 regs->regs[insn.mxu_lx_format.rd] = value; in emulate_load_store_insn()
186 regs->regs[insn.dsp_format.rd] = value; in emulate_load_store_insn()
195 regs->regs[insn.dsp_format.rd] = value; in emulate_load_store_insn()
[all …]
/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphy_qmath.c1 // SPDX-License-Identifier: ISC
9 * Description: This function make 16 bit unsigned multiplication.
10 * To fit the output into 16 bits the 32 bit multiplication result is right
19 * Description: This function make 16 bit multiplication and return the result
22 * is done to remove the extra sign bit formed due to the multiplication.
23 * When both the 16bit inputs are 0x8000 then the output is saturated to
38 * Description: This function add two 32 bit numbers and return the 32bit
39 * result. If the result overflow 32 bits, the output will be saturated to
40 * 32bits.
55 * Description: This function add two 16 bit numbers and return the 16bit
[all …]
/linux/lib/crc/s390/
H A Dcrc32be-vx.c1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Hardware-accelerated CRC-32 variants for Linux on z Systems
6 * computing of CRC-32 checksums.
8 * This CRC-32 implementation algorithm processes the most-significant
9 * bit first (BE).
17 #include "crc32-vx.h"
19 /* Vector register range containing CRC-32 constants */
28 * The CRC-32 constant block contains reduction constants to fold and
31 * For the CRC-32 variants, the constants are precomputed according to
52 * CRC-32 (IEEE 802.3 Ethernet, ...) polynomials:
[all …]
/linux/Documentation/bpf/
H A Dclassic_vs_extended.rst12 - Number of registers increase from 2 to 10:
15 new layout extends this to be 10 internal registers and a read-only frame
16 pointer. Since 64-bit CPUs are passing arguments to functions via registers
17 the number of args from eBPF program to in-kernel function is restricted
18 to 5 and one register is used to accept return value from an in-kernel
20 sparcv9/mips64 have 7 - 8 registers for arguments; x86_64 has 6 callee saved
25 64-bit architectures.
27 On 32-bit architectures JIT may map programs that use only 32-bit arithmetic
30 R0 - R5 are scratch registers and eBPF program needs spill/fill them if
33 call predefined in-kernel functions, though.
[all …]
/linux/Documentation/bpf/standardization/
H A Dinstruction-set.rst27 BCP 14 `<https://www.rfc-editor.org/info/rfc2119>`_
28 `<https://www.rfc-editor.org/info/rfc8174>`_
38 -----
40 a type's signedness (`S`) and bit width (`N`), respectively.
51 .. table:: Meaning of bit-width notation
54 N Bit width
58 32 32 bits
63 For example, `u32` is a type whose valid values are all the 32-bit unsigned
64 numbers and `s16` is a type whose valid values are all the 16-bit signed
68 ---------
[all …]

12345678910>>...45