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/linux/lib/crypto/x86/
H A Dsha1-ssse3-and-avx.S61 /* we keep window of 64 w[i]+K pre-calculated values in a circular buffer */
145 RR F2,A,B,C,D,E,30
249 * RR does two rounds of SHA-1 back to back with W[] pre-calc
250 * t1 = F(b, c, d); e += w(i)
251 * e += t1; b <<= 30; d += w(i+1);
263 rol $30, \b
272 ror $7, \a # (a <<r 5) >>r 7) => a <<r 30)
311 .set W, W0 define
319 .set W_minus_32, W
330 .set W_minus_04, W
[all …]
H A Dsha1-avx2-asm.S222 * calculating last 32 w[i] values in 8 XMM registers
223 * pre-calculate K+w[i] values and store to mem
227 * due to w[i]->w[i-3] dependency
234 /* w[i-14] */
236 vpsrldq $4, WY_minus_04, WY_TMP /* w[i-3] */
250 vpsrld $30, WY_TMP2, WY_TMP2
264 * w[i] = (w[i-3] ^ w[i-8] ^ w[i-14] ^ w[i-16]) rol 1
266 * w[i] = (w[i-6] ^ w[i-16] ^ w[i-28] ^ w[i-32]) rol 2
268 * since w[i]=>w[i-3] dependency is broken
278 /* W is W_minus_32 before xor */
[all …]
/linux/lib/crypto/powerpc/
H A Dsha1-powerpc-asm.S33 /* We use registers 16 - 31 for the W values */
34 #define W(t) (((t)%16)+16) macro
37 LWZ(W(t),(t)*4,r4)
46 add r14,r0,W(t); \
47 LWZ(W((t)+4),((t)+4)*4,r4); \
48 rotlwi RB(t),RB(t),30; \
55 rotlwi RB(t),RB(t),30; \
58 xor r5,W((t)+4-3),W((t)+4-8); \
60 xor W((t)+4),W((t)+4-16),W((t)+4-14); \
61 add r0,r0,W(t); \
[all …]
H A Dsha1-spe-asm.S107 LOAD_DATA(w0, off) /* 1: W */ \
114 rotrwi b,b,2; /* 1: B = B rotl 30 */ \
115 add e,e,w0; /* 1: E = E + W */ \
116 LOAD_DATA(w1, off+4) /* 2: W */ \
124 add d,d,w1; /* 2: E = E + W */ \
125 rotrwi a,a,2; /* 2: B = B rotl 30 */ \
127 evmergelo w1,w1,w0; /* mix W[0]/W[1] */ \
132 evmergelohi rT0,w7,w6; /* W[-3] */ \
134 evxor w0,w0,rT0; /* W = W[-16] xor W[-3] */ \
136 evxor w0,w0,w4; /* W = W xor W[-8] */ \
[all …]
/linux/arch/powerpc/kvm/
H A Dbook3s_paired_singles.c60 #define OP_59_FNMSUBS 30
77 #define OP_63_FNMSUB 30
109 #define OP_4A_PS_NMSUB 30
263 int rs, ulong addr, bool w, int i) in kvmppc_emulate_psq_load() argument
271 if (w) { in kvmppc_emulate_psq_load()
281 } else if ((r == EMULATE_DO_MMIO) && w) { in kvmppc_emulate_psq_load()
299 tmp[1], addr, w ? 4 : 8); in kvmppc_emulate_psq_load()
306 int rs, ulong addr, bool w, int i) in kvmppc_emulate_psq_store() argument
311 int len = w ? sizeof(u32) : sizeof(u64); in kvmppc_emulate_psq_store()
320 } else if ((r == EMULATE_DO_MMIO) && w) { in kvmppc_emulate_psq_store()
[all …]
/linux/arch/sh/lib/
H A Dmemcpy-sh4.S55 mov.l r3,@-r0 ! 30 LS
72 mov.l r3,@-r0 ! 30 LS
128 mov.l r3,@-r0 ! 30 LS
330 mov.l r1,@-r0 ! 30 LS
338 mov.l r1, @-r0 ! 30 LS
341 mov.l r2, @-r0 ! 30 LS
364 mov.l r1,@-r0 ! 30 LS
372 mov.l r1, @-r0 ! 30 LS
375 mov.l r2, @-r0 ! 30 LS
432 mov.l r1,@-r0 ! 30 LS
[all …]
H A Dcopy_page.S249 EX( mov.w r0,@r4 )
271 EX( mov.w r0,@(28,r4) )
273 add #30,r4
279 EX( mov.w r0,@(30,r4) )
299 swap.w r10,r0
301 EX( mov.w r0,@(2,r4) )
314 EX( mov.w r0,@r4 )
316 EX( mov.w r0,@(2,r4) )
318 EX( mov.w r0,@(2,r4) )
320 EX( mov.w r0,@r4 )
[all …]
/linux/drivers/media/platform/samsung/s5p-mfc/
H A Dregs-mfc-v7.h44 #define MFC_CTX_BUF_SIZE_V7 (30 * SZ_1K) /* 30KB */
51 #define S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V7(w, h) \ argument
52 (SZ_1M + ((w) * 144) + (8192 * (h)) + 49216)
54 #define S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V7(w, h) \ argument
55 (((w) * 48) + 8192 + ((((w) + 1) / 2) * 128) + 144 + \
56 ((((((w) * 16) * ((h) * 16)) * 3) / 2) * 4))
/linux/drivers/staging/media/sunxi/cedrus/
H A Dcedrus_regs.h68 #define VE_SECONDARY_OUT_FMT_TILED_32_NV12 (0x00 << 30)
69 #define VE_SECONDARY_OUT_FMT_EXT (0x01 << 30)
70 #define VE_SECONDARY_OUT_FMT_YU12 (0x02 << 30)
71 #define VE_SECONDARY_OUT_FMT_YV12 (0x03 << 30)
95 #define VE_DEC_MPEG_MP12HDR_SLICE_TYPE(t) SHIFT_AND_MASK_BITS(t, 30, 28)
123 #define VE_DEC_MPEG_PICCODEDSIZE_WIDTH(w) \ argument
124 SHIFT_AND_MASK_BITS(DIV_ROUND_UP(w, 16), 15, 8)
130 #define VE_DEC_MPEG_PICBOUNDSIZE_WIDTH(w) SHIFT_AND_MASK_BITS(w, 27, 16) argument
135 #define VE_DEC_MPEG_MBADDR_X(w) SHIFT_AND_MASK_BITS(w, 15, 8) argument
224 #define VE_DEC_MPEG_VLD_ADDR_FIRST_PIC_DATA BIT(30)
[all …]
/linux/lib/crypto/arm/
H A Dsha1-armv7-neon.S88 W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ argument
90 pre1(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
94 pre2(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
97 ror b, #(32 - 30); \
98 pre3(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
102 W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ argument
104 pre1(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
108 pre2(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
110 ror b, #(32 - 30); \
111 pre3(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
[all …]
/linux/drivers/memory/
H A Drenesas-rpc-if-regs.h13 #define RPCIF_CMNCR 0x0000 /* R/W */
28 #define RPCIF_SSLDR 0x0004 /* R/W */
33 #define RPCIF_DRCR 0x000C /* R/W */
40 #define RPCIF_DRCMR 0x0010 /* R/W */
44 #define RPCIF_DREAR 0x0014 /* R/W */
48 #define RPCIF_DROPR 0x0018 /* R/W */
50 #define RPCIF_DRENR 0x001C /* R/W */
51 #define RPCIF_DRENR_CDB(o) (((u32)((o) & 0x3)) << 30)
62 #define RPCIF_SMCR 0x0020 /* R/W */
68 #define RPCIF_SMCMR 0x0024 /* R/W */
[all …]
H A Dmvebu-devbus.c21 #define ARMADA_DEV_WIDTH_SHIFT 30
35 #define ORION_RESERVED (0x2 << 30)
111 struct devbus_write_params *w) in devbus_get_timing_params() argument
168 &w->sync_enable); in devbus_get_timing_params()
178 &w->ale_wr); in devbus_get_timing_params()
183 &w->wr_low); in devbus_get_timing_params()
188 &w->wr_high); in devbus_get_timing_params()
198 struct devbus_write_params *w) in devbus_orion_set_timing_params() argument
212 (w->ale_wr & ORION_ALE_WR_MASK) << ORION_ALE_WR_SHIFT | in devbus_orion_set_timing_params()
213 (w->wr_low & ORION_WR_LOW_MASK) << ORION_WR_LOW_SHIFT | in devbus_orion_set_timing_params()
[all …]
/linux/tools/testing/selftests/net/netfilter/
H A Dconntrack_vrf.sh35 PFXL=30
108 ip netns exec "$ns1" ping -W 1 -c 1 -I veth0 "$IP0" > /dev/null
127 # add masq rule that gets evaluated w. outif set to vrf device.
157 ip saddr 172.30.30.0/30 counter masquerade random
181 # add masq rule that gets evaluated w. outif set to veth device.
192 meta oif veth0 ip saddr 172.30.30.0/30 counter masquerade random
/linux/drivers/gpu/drm/i915/display/
H A Dintel_sprite_regs.h14 #define DVS_PIPE_GAMMA_ENABLE REG_BIT(30)
57 #define DVS_WIDTH(w) REG_FIELD_PREP(DVS_WIDTH_MASK, (w)) argument
96 #define DVS_FILTER_MASK REG_GENMASK(30, 29)
103 #define DVS_SRC_WIDTH(w) REG_FIELD_PREP(DVS_SRC_WIDTH_MASK, (w)) argument
120 #define SPRITE_PIPE_GAMMA_ENABLE REG_BIT(30)
167 #define SPRITE_WIDTH(w) REG_FIELD_PREP(SPRITE_WIDTH_MASK, (w)) argument
206 #define SPRITE_FILTER_MASK REG_GENMASK(30, 29)
213 #define SPRITE_SRC_WIDTH(w) REG_FIELD_PREP(SPRITE_SRC_WIDTH_MASK, (w)) argument
239 #define SP_PIPE_GAMMA_ENABLE REG_BIT(30)
286 #define SP_WIDTH(w) REG_FIELD_PREP(SP_WIDTH_MASK, (w)) argument
[all …]
H A Dintel_cursor_regs.h15 #define CURSOR_PIPE_GAMMA_ENABLE REG_BIT(30)
25 #define MCURSOR_ARB_SLOTS_MASK REG_GENMASK(30, 28) /* icl+ */
49 #define CURSOR_POS_Y_MASK REG_GENMASK(30, 16)
63 #define CURSOR_WIDTH(w) REG_FIELD_PREP(CURSOR_WIDTH_MASK, (w)) argument
82 #define CUR_WM_IGNORE_LINES REG_BIT(30)
/linux/arch/loongarch/kernel/
H A Dfpu.S60 EX fst.d $f30, \base, (30 * FPU_REG_WIDTH)
95 EX fld.d $f30, \base, (30 * FPU_REG_WIDTH)
141 EX st.w \tmp0, \base, 0
152 EX ld.w \tmp0, \base, 0
188 EX vst $vr30, \base, (30 * LSX_REG_WIDTH)
225 EX vld $vr30, \base, (30 * LSX_REG_WIDTH)
262 EX xvst $xr30, \base, (30 * LASX_REG_WIDTH)
299 EX xvld $xr30, \base, (30 * LASX_REG_WIDTH)
406 li.w t1, CSR_EUEN_FPEN
411 li.w t1, -1 # SNaN
[all …]
/linux/arch/mips/include/asm/
H A Dasmmacro.h22 /* preprocessor replaces the fp in ".set fp=64" with $30 otherwise */
272 ld.b $w\wd, \off(\base)
281 ld.h $w\wd, \off(\base)
290 ld.w $w\wd, \off(\base)
299 ld.d $w\wd, \off(\base)
308 st.b $w\wd, \off(\base)
317 st.h $w\wd, \off(\base)
326 st.w $w\wd, \off(\base)
335 st.d $w\wd, \off(\base)
344 copy_s.w $1, $w\ws[\n]
[all …]
/linux/arch/arm64/include/asm/
H A Dfpsimdmacros.h27 stp q30, q31, [\state, #16 * 30]!
29 str w\tmpnr, [\state, #16 * 2]
31 str w\tmpnr, [\state, #16 * 2 + 4]
63 ldp q30, q31, [\state, #16 * 30]!
64 ldr w\tmpnr, [\state, #16 * 2]
66 ldr w\tmpnr, [\state, #16 * 2 + 4]
73 .if (\nr) < 0 || (\nr) > 30
318 str w\nxtmp, [\xpfpsr]
320 str w\nxtmp, [\xpfpsr, #4]
331 ldr w\nxtmp, [\xpfpsr]
[all …]
/linux/arch/m68k/lib/
H A Duaccess.c24 "3: "MOVES".w (%1)+,%3\n" in __generic_copy_from_user()
25 " move.w %3,(%2)+\n" in __generic_copy_from_user()
36 "30: addq.l #2,%0\n" in __generic_copy_from_user()
46 " .long 3b,30b\n" in __generic_copy_from_user()
70 " move.w (%1)+,%3\n" in __generic_copy_to_user()
71 "5: "MOVES".w %3,(%2)+\n" in __generic_copy_to_user()
116 "4: "MOVES".w %2,(%1)+\n" in __clear_user()
/linux/arch/loongarch/kvm/
H A Dswitch.S17 .irp n,1,2,3,22,23,24,25,26,27,28,29,30,31
23 .irp n,1,2,3,22,23,24,25,26,27,28,29,30,31
33 .irp n,1,2,3,4,5,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
39 .irp n,1,2,3,4,5,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
52 bstrins.w t0, zero, CSR_ECFG_VS_SHIFT_END, CSR_ECFG_VS_SHIFT
69 bstrpick.w t1, t1, CSR_GSTAT_GID_SHIFT_END, CSR_GSTAT_GID_SHIFT
71 bstrins.w t0, t1, CSR_GTLBC_TGID_SHIFT_END, CSR_GTLBC_TGID_SHIFT
157 bstrins.w t0, zero, CSR_GTLBC_TGID_SHIFT_END, CSR_GTLBC_TGID_SHIFT
/linux/arch/loongarch/lib/
H A Dcopy_user.S125 30: ld.d t0, a1, 0
170 42: ld.w t0, a1, 0
171 43: st.w t0, a0, 0
176 44: ld.w t0, a1, 0
178 46: st.w t0, a0, 0
184 48: ld.w t0, a1, 0
186 50: st.w t0, a0, 0
192 52: ld.w t0, a1, 0
193 53: ld.w t1, a1, 3
194 54: st.w t0, a0, 0
[all …]
/linux/include/sound/
H A Dhda_verbs.h199 #define AC_GPIO_UNSOLICITED (1<<30)
293 /* driver-specific amp-caps: using bits 24-30 */
294 #define AC_AMPCAP_MIN_MUTE (1 << 30) /* min-volume = mute */
307 #define AC_PWRST_CLKSTOP (1<<30)
332 #define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */
333 #define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */
336 #define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */
337 #define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */
340 #define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */
341 #define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */
[all …]
/linux/drivers/accel/habanalabs/gaudi/
H A DgaudiP.h37 #define MAX_POWER_DEFAULT_PCI 200000 /* 200W */
38 #define MAX_POWER_DEFAULT_PMC 350000 /* 350W */
40 #define DC_POWER_DEFAULT_PCI 60000 /* 60W */
41 #define DC_POWER_DEFAULT_PMC 60000 /* 60W */
43 #define DC_POWER_DEFAULT_PMC_SEC 97000 /* 97W */
45 #define GAUDI_CPU_TIMEOUT_USEC 30000000 /* 30s */
190 #define HW_CAP_TPC6 BIT(30)
258 * struct gaudi_hw_sob_group - H/W SOB group info.
275 * @hw_sob_group: H/W SOB groups.
302 * @hw_queues_lock: protects the H/W queues from concurrent access.
[all …]
/linux/include/linux/mmc/
H A Dmmc.h71 #define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */
135 #define R1_ADDRESS_ERROR (1 << 30) /* erx, c */
225 /* (CMD28,29,30) */
256 #define EXT_CSD_CMDQ_MODE_EN 15 /* R/W */
257 #define EXT_CSD_FLUSH_CACHE 32 /* W */
258 #define EXT_CSD_CACHE_CTRL 33 /* R/W */
259 #define EXT_CSD_POWER_OFF_NOTIFICATION 34 /* R/W */
261 #define EXT_CSD_EXP_EVENTS_CTRL 56 /* R/W, 2 bytes */
263 #define EXT_CSD_GP_SIZE_MULT 143 /* R/W */
264 #define EXT_CSD_PARTITION_SETTING_COMPLETED 155 /* R/W */
[all …]
/linux/lib/crypto/
H A Dsm3.c66 #define I(i) (W[i] = get_unaligned_be32(data + i * 4))
67 #define W1(i) (W[i & 0x0f])
68 #define W2(i) (W[i & 0x0f] = \
69 P1(W[i & 0x0f] \
70 ^ W[(i-9) & 0x0f] \
71 ^ rol32(W[(i-3) & 0x0f], 15)) \
72 ^ rol32(W[(i-13) & 0x0f], 7) \
73 ^ W[(i-6) & 0x0f])
75 static void sm3_transform(struct sm3_state *sctx, u8 const *data, u32 W[16]) in sm3_transform()
115 R2(c, d, a, b, g, h, e, f, K[26], W1(26), W2(30)); in sm3_transform()
[all …]

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