xref: /linux/arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts (revision 0cac5ce06e524755b3dac1e0a060b05992076d93) 
1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/linux-event-codes.h>
5#include <dt-bindings/input/gpio-keys.h>
6#include <dt-bindings/mfd/max77620.h>
7
8#include "tegra186.dtsi"
9
10/ {
11	model = "NVIDIA Jetson TX2 NX Developer Kit";
12	compatible = "nvidia,p3509-0000+p3636-0001", "nvidia,tegra186";
13
14	aliases {
15		ethernet0 = "/ethernet@2490000";
16		i2c0 = "/bpmp/i2c";
17		i2c1 = "/i2c@3160000";
18		i2c2 = "/i2c@c240000";
19		i2c3 = "/i2c@3180000";
20		i2c4 = "/i2c@3190000";
21		i2c5 = "/i2c@31c0000";
22		i2c6 = "/i2c@c250000";
23		i2c7 = "/i2c@31e0000";
24		mmc0 = "/mmc@3460000";
25		serial0 = &uarta;
26	};
27
28	chosen {
29		bootargs = "earlycon console=ttyS0,115200n8";
30		stdout-path = "serial0:115200n8";
31	};
32
33	memory@80000000 {
34		device_type = "memory";
35		reg = <0x0 0x80000000 0x0 0x70000000>;
36	};
37
38	ethernet@2490000 {
39		status = "okay";
40
41		phy-reset-gpios = <&gpio_aon TEGRA186_AON_GPIO(AA, 6) GPIO_ACTIVE_LOW>;
42		phy-handle = <&phy>;
43		phy-mode = "rgmii-id";
44
45		mdio {
46			#address-cells = <1>;
47			#size-cells = <0>;
48
49			phy: ethernet-phy@0 {
50				compatible = "ethernet-phy-ieee802.3-c22";
51				reg = <0x0>;
52				interrupt-parent = <&gpio_aon>;
53				interrupts = <TEGRA186_AON_GPIO(AA, 7) IRQ_TYPE_LEVEL_LOW>;
54				#phy-cells = <0>;
55			};
56		};
57	};
58
59	aconnect@2900000 {
60		status = "okay";
61
62		ahub@2900800 {
63			status = "okay";
64
65			i2s@2901000 {
66				status = "okay";
67
68				ports {
69					#address-cells = <1>;
70					#size-cells = <0>;
71
72					port@0 {
73						reg = <0>;
74
75						i2s1_cif_ep: endpoint {
76							remote-endpoint = <&xbar_i2s1_ep>;
77						};
78					};
79
80					i2s1_port: port@1 {
81						reg = <1>;
82
83						i2s1_dap_ep: endpoint {
84							dai-format = "i2s";
85							/* Placeholder for external Codec */
86						};
87					};
88				};
89			};
90
91			i2s@2901200 {
92				status = "okay";
93
94				ports {
95					#address-cells = <1>;
96					#size-cells = <0>;
97
98					port@0 {
99						reg = <0>;
100
101						i2s3_cif_ep: endpoint {
102							remote-endpoint = <&xbar_i2s3_ep>;
103						};
104					};
105
106					i2s3_port: port@1 {
107						reg = <1>;
108
109						i2s3_dap_ep: endpoint {
110							dai-format = "i2s";
111							/* Placeholder for external Codec */
112						};
113					};
114				};
115			};
116
117			dmic@2904000 {
118				status = "okay";
119
120				ports {
121					#address-cells = <1>;
122					#size-cells = <0>;
123
124					port@0 {
125						reg = <0>;
126
127						dmic1_cif_ep: endpoint {
128							remote-endpoint = <&xbar_dmic1_ep>;
129						};
130					};
131
132					dmic1_port: port@1 {
133						reg = <1>;
134
135						dmic1_dap_ep: endpoint {
136							/* Place holder for external Codec */
137						};
138					};
139				};
140			};
141
142			dmic@2904100 {
143				status = "okay";
144
145				ports {
146					#address-cells = <1>;
147					#size-cells = <0>;
148
149					port@0 {
150						reg = <0>;
151
152						dmic2_cif_ep: endpoint {
153							remote-endpoint = <&xbar_dmic2_ep>;
154						};
155					};
156
157					dmic2_port: port@1 {
158						reg = <1>;
159
160						dmic2_dap_ep: endpoint {
161							/* Place holder for external Codec */
162						};
163					};
164				};
165			};
166
167			admaif@290f000 {
168				status = "okay";
169
170				ports {
171					#address-cells = <1>;
172					#size-cells = <0>;
173
174					admaif0_port: port@0 {
175						reg = <0x0>;
176
177						admaif0_ep: endpoint {
178							remote-endpoint = <&xbar_admaif0_ep>;
179						};
180					};
181
182					admaif1_port: port@1 {
183						reg = <0x1>;
184
185						admaif1_ep: endpoint {
186							remote-endpoint = <&xbar_admaif1_ep>;
187						};
188					};
189
190					admaif2_port: port@2 {
191						reg = <0x2>;
192
193						admaif2_ep: endpoint {
194							remote-endpoint = <&xbar_admaif2_ep>;
195						};
196					};
197
198					admaif3_port: port@3 {
199						reg = <0x3>;
200
201						admaif3_ep: endpoint {
202							remote-endpoint = <&xbar_admaif3_ep>;
203						};
204					};
205
206					admaif4_port: port@4 {
207						reg = <0x4>;
208
209						admaif4_ep: endpoint {
210							remote-endpoint = <&xbar_admaif4_ep>;
211						};
212					};
213
214					admaif5_port: port@5 {
215						reg = <0x5>;
216
217						admaif5_ep: endpoint {
218							remote-endpoint = <&xbar_admaif5_ep>;
219						};
220					};
221
222					admaif6_port: port@6 {
223						reg = <0x6>;
224
225						admaif6_ep: endpoint {
226							remote-endpoint = <&xbar_admaif6_ep>;
227						};
228					};
229
230					admaif7_port: port@7 {
231						reg = <0x7>;
232
233						admaif7_ep: endpoint {
234							remote-endpoint = <&xbar_admaif7_ep>;
235						};
236					};
237
238					admaif8_port: port@8 {
239						reg = <0x8>;
240
241						admaif8_ep: endpoint {
242							remote-endpoint = <&xbar_admaif8_ep>;
243						};
244					};
245
246					admaif9_port: port@9 {
247						reg = <0x9>;
248
249						admaif9_ep: endpoint {
250							remote-endpoint = <&xbar_admaif9_ep>;
251						};
252					};
253
254					admaif10_port: port@a {
255						reg = <0xa>;
256
257						admaif10_ep: endpoint {
258							remote-endpoint = <&xbar_admaif10_ep>;
259						};
260					};
261
262					admaif11_port: port@b {
263						reg = <0xb>;
264
265						admaif11_ep: endpoint {
266							remote-endpoint = <&xbar_admaif11_ep>;
267						};
268					};
269
270					admaif12_port: port@c {
271						reg = <0xc>;
272
273						admaif12_ep: endpoint {
274							remote-endpoint = <&xbar_admaif12_ep>;
275						};
276					};
277
278					admaif13_port: port@d {
279						reg = <0xd>;
280
281						admaif13_ep: endpoint {
282							remote-endpoint = <&xbar_admaif13_ep>;
283						};
284					};
285
286					admaif14_port: port@e {
287						reg = <0xe>;
288
289						admaif14_ep: endpoint {
290							remote-endpoint = <&xbar_admaif14_ep>;
291						};
292					};
293
294					admaif15_port: port@f {
295						reg = <0xf>;
296
297						admaif15_ep: endpoint {
298							remote-endpoint = <&xbar_admaif15_ep>;
299						};
300					};
301
302					admaif16_port: port@10 {
303						reg = <0x10>;
304
305						admaif16_ep: endpoint {
306							remote-endpoint = <&xbar_admaif16_ep>;
307						};
308					};
309
310					admaif17_port: port@11 {
311						reg = <0x11>;
312
313						admaif17_ep: endpoint {
314							remote-endpoint = <&xbar_admaif17_ep>;
315						};
316					};
317
318					admaif18_port: port@12 {
319						reg = <0x12>;
320
321						admaif18_ep: endpoint {
322							remote-endpoint = <&xbar_admaif18_ep>;
323						};
324					};
325
326					admaif19_port: port@13 {
327						reg = <0x13>;
328
329						admaif19_ep: endpoint {
330							remote-endpoint = <&xbar_admaif19_ep>;
331						};
332					};
333				};
334			};
335
336			ports {
337				#address-cells = <1>;
338				#size-cells = <0>;
339
340				port@0 {
341					reg = <0x0>;
342
343					xbar_admaif0_ep: endpoint {
344						remote-endpoint = <&admaif0_ep>;
345					};
346				};
347
348				port@1 {
349					reg = <0x1>;
350
351					xbar_admaif1_ep: endpoint {
352						remote-endpoint = <&admaif1_ep>;
353					};
354				};
355
356				port@2 {
357					reg = <0x2>;
358
359					xbar_admaif2_ep: endpoint {
360						remote-endpoint = <&admaif2_ep>;
361					};
362				};
363
364				port@3 {
365					reg = <0x3>;
366
367					xbar_admaif3_ep: endpoint {
368						remote-endpoint = <&admaif3_ep>;
369					};
370				};
371
372				port@4 {
373					reg = <0x4>;
374
375					xbar_admaif4_ep: endpoint {
376						remote-endpoint = <&admaif4_ep>;
377					};
378				};
379
380				port@5 {
381					reg = <0x5>;
382
383					xbar_admaif5_ep: endpoint {
384						remote-endpoint = <&admaif5_ep>;
385					};
386				};
387
388				port@6 {
389					reg = <0x6>;
390
391					xbar_admaif6_ep: endpoint {
392						remote-endpoint = <&admaif6_ep>;
393					};
394				};
395
396				port@7 {
397					reg = <0x7>;
398
399					xbar_admaif7_ep: endpoint {
400						remote-endpoint = <&admaif7_ep>;
401					};
402				};
403
404				port@8 {
405					reg = <0x8>;
406
407					xbar_admaif8_ep: endpoint {
408						remote-endpoint = <&admaif8_ep>;
409					};
410				};
411
412				port@9 {
413					reg = <0x9>;
414
415					xbar_admaif9_ep: endpoint {
416						remote-endpoint = <&admaif9_ep>;
417					};
418				};
419
420				port@a {
421					reg = <0xa>;
422
423					xbar_admaif10_ep: endpoint {
424						remote-endpoint = <&admaif10_ep>;
425					};
426				};
427
428				port@b {
429					reg = <0xb>;
430
431					xbar_admaif11_ep: endpoint {
432						remote-endpoint = <&admaif11_ep>;
433					};
434				};
435
436				port@c {
437					reg = <0xc>;
438
439					xbar_admaif12_ep: endpoint {
440						remote-endpoint = <&admaif12_ep>;
441					};
442				};
443
444				port@d {
445					reg = <0xd>;
446
447					xbar_admaif13_ep: endpoint {
448						remote-endpoint = <&admaif13_ep>;
449					};
450				};
451
452				port@e {
453					reg = <0xe>;
454
455					xbar_admaif14_ep: endpoint {
456						remote-endpoint = <&admaif14_ep>;
457					};
458				};
459
460				port@f {
461					reg = <0xf>;
462
463					xbar_admaif15_ep: endpoint {
464						remote-endpoint = <&admaif15_ep>;
465					};
466				};
467
468				port@10 {
469					reg = <0x10>;
470
471					xbar_admaif16_ep: endpoint {
472						remote-endpoint = <&admaif16_ep>;
473					};
474				};
475
476				port@11 {
477					reg = <0x11>;
478
479					xbar_admaif17_ep: endpoint {
480						remote-endpoint = <&admaif17_ep>;
481					};
482				};
483
484				port@12 {
485					reg = <0x12>;
486
487					xbar_admaif18_ep: endpoint {
488						remote-endpoint = <&admaif18_ep>;
489					};
490				};
491
492				port@13 {
493					reg = <0x13>;
494
495					xbar_admaif19_ep: endpoint {
496						remote-endpoint = <&admaif19_ep>;
497					};
498				};
499
500				xbar_i2s1_port: port@14 {
501					reg = <0x14>;
502
503					xbar_i2s1_ep: endpoint {
504						remote-endpoint = <&i2s1_cif_ep>;
505					};
506				};
507
508				xbar_i2s3_port: port@16 {
509					reg = <0x16>;
510
511					xbar_i2s3_ep: endpoint {
512						remote-endpoint = <&i2s3_cif_ep>;
513					};
514				};
515
516				xbar_dmic1_port: port@1a {
517					reg = <0x1a>;
518
519					xbar_dmic1_ep: endpoint {
520						remote-endpoint = <&dmic1_cif_ep>;
521					};
522				};
523
524				xbar_dmic2_port: port@1b {
525					reg = <0x1b>;
526
527					xbar_dmic2_ep: endpoint {
528						remote-endpoint = <&dmic2_cif_ep>;
529					};
530				};
531			};
532		};
533
534		dma-controller@2930000 {
535			status = "okay";
536		};
537
538		interrupt-controller@2a40000 {
539			status = "okay";
540		};
541	};
542
543	memory-controller@2c00000 {
544		status = "okay";
545	};
546
547	timer@3010000 {
548		status = "okay";
549	};
550
551	serial@3100000 {
552		/delete-property/ dmas;
553		/delete-property/ dma-names;
554		status = "okay";
555	};
556
557	i2c@3160000 {
558		status = "okay";
559	};
560
561	i2c@3180000 {
562		status = "okay";
563
564		power-monitor@40 {
565			compatible = "ti,ina3221";
566			reg = <0x40>;
567			#address-cells = <1>;
568			#size-cells = <0>;
569
570			input@0 {
571				reg = <0>;
572				label = "VDD_IN";
573				shunt-resistor-micro-ohms = <5>;
574			};
575
576			input@1 {
577				reg = <1>;
578				label = "VDD_CPU_GPU";
579				shunt-resistor-micro-ohms = <5>;
580			};
581
582			input@2 {
583				reg = <2>;
584				label = "VDD_SOC";
585				shunt-resistor-micro-ohms = <5>;
586			};
587		};
588	};
589
590	ddc: i2c@3190000 {
591		status = "okay";
592	};
593
594	i2c@31c0000 {
595		status = "okay";
596	};
597
598	i2c@31e0000 {
599		status = "okay";
600	};
601
602	/* SDMMC4 (eMMC) */
603	mmc@3460000 {
604		status = "okay";
605		bus-width = <8>;
606		non-removable;
607
608		vqmmc-supply = <&vdd_1v8_ap>;
609		vmmc-supply = <&vdd_3v3_sys>;
610	};
611
612	hda@3510000 {
613		nvidia,model = "NVIDIA Jetson TX2 NX HDA";
614		status = "okay";
615	};
616
617	padctl@3520000 {
618		status = "okay";
619
620		avdd-pll-erefeut-supply = <&vdd_1v8_pll>;
621		avdd-usb-supply = <&vdd_3v3_sys>;
622		vclamp-usb-supply = <&vdd_1v8>;
623		vddio-hsic-supply = <&gnd>;
624
625		pads {
626			usb2 {
627				status = "okay";
628
629				lanes {
630					micro_b: usb2-0 {
631						nvidia,function = "xusb";
632						status = "okay";
633					};
634
635					usb2-1 {
636						nvidia,function = "xusb";
637						status = "okay";
638					};
639
640					usb2-2 {
641						nvidia,function = "xusb";
642						status = "okay";
643					};
644				};
645			};
646
647			usb3 {
648				status = "okay";
649
650				lanes {
651					usb3-1 {
652						nvidia,function = "xusb";
653						status = "okay";
654					};
655				};
656			};
657		};
658
659		ports {
660			usb2-0 {
661				status = "okay";
662				mode = "otg";
663				vbus-supply = <&vdd_5v0_sys>;
664				usb-role-switch;
665
666				connector {
667					compatible = "gpio-usb-b-connector",
668						     "usb-b-connector";
669					label = "micro-USB";
670					type = "micro";
671					vbus-gpios = <&gpio
672						      TEGRA186_MAIN_GPIO(L, 4)
673						      GPIO_ACTIVE_LOW>;
674				};
675			};
676
677			usb2-1 {
678				status = "okay";
679				mode = "host";
680
681				vbus-supply = <&vdd_5v0_sys>;
682			};
683
684			usb2-2 {
685				status = "okay";
686				mode = "host";
687
688				vbus-supply = <&vdd_5v0_sys>;
689			};
690
691			usb3-1 {
692				nvidia,usb2-companion = <1>;
693				vbus-supply = <&vdd_5v0_sys>;
694				status = "okay";
695			};
696		};
697	};
698
699	usb@3530000 {
700		status = "okay";
701
702		phys = <&{/padctl@3520000/pads/usb2/lanes/usb2-0}>,
703		       <&{/padctl@3520000/pads/usb2/lanes/usb2-1}>,
704		       <&{/padctl@3520000/pads/usb2/lanes/usb2-2}>,
705		       <&{/padctl@3520000/pads/usb3/lanes/usb3-1}>;
706		phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-1";
707	};
708
709	usb@3550000 {
710		status = "okay";
711
712		phys = <&micro_b>;
713		phy-names = "usb2-0";
714	};
715
716	cec@3960000 {
717		status = "okay";
718
719		hdmi-phandle = <&sor1>;
720	};
721
722	hsp@3c00000 {
723		status = "okay";
724	};
725
726	i2c@c240000 {
727		status = "okay";
728	};
729
730	i2c@c250000 {
731		status = "okay";
732
733		/* module ID EEPROM */
734		eeprom@50 {
735			compatible = "atmel,24c02";
736			reg = <0x50>;
737
738			label = "module";
739			vcc-supply = <&vdd_1v8>;
740			address-width = <8>;
741			pagesize = <8>;
742			size = <256>;
743			read-only;
744		};
745
746		/* carrier board ID EEPROM */
747		eeprom@57 {
748			compatible = "atmel,24c02";
749			reg = <0x57>;
750
751			label = "system";
752			vcc-supply = <&vdd_1v8>;
753			address-width = <8>;
754			pagesize = <8>;
755			size = <256>;
756			read-only;
757		};
758	};
759
760	rtc@c2a0000 {
761		status = "okay";
762	};
763
764	pwm@c340000 {
765		status = "okay";
766	};
767
768	pmc@c360000 {
769		nvidia,invert-interrupt;
770	};
771
772	pcie@10003000 {
773		status = "okay";
774
775		dvdd-pex-supply = <&vdd_pex>;
776		hvdd-pex-pll-supply = <&vdd_1v8>;
777		hvdd-pex-supply = <&vdd_1v8>;
778		vddio-pexctl-aud-supply = <&vdd_1v8>;
779
780		pci@1,0 {
781			nvidia,num-lanes = <2>;
782			status = "okay";
783		};
784
785		pci@2,0 {
786			nvidia,num-lanes = <1>;
787			status = "disabled";
788		};
789
790		pci@3,0 {
791			nvidia,num-lanes = <1>;
792			status = "okay";
793		};
794	};
795
796	host1x@13e00000 {
797		status = "okay";
798
799		dpaux@15040000 {
800			status = "okay";
801		};
802
803		display-hub@15200000 {
804			status = "okay";
805		};
806
807		dsi@15300000 {
808			status = "disabled";
809		};
810
811		/* DP */
812		sor@15540000 {
813			status = "okay";
814
815			avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>;
816			vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>;
817
818			nvidia,dpaux = <&dpaux>;
819		};
820
821		/* HDMI */
822		sor@15580000 {
823			status = "okay";
824
825			avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>;
826			vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>;
827			hdmi-supply = <&vdd_hdmi>;
828
829			nvidia,ddc-i2c-bus = <&ddc>;
830			nvidia,hpd-gpio = <&gpio TEGRA186_MAIN_GPIO(P, 1)
831						 GPIO_ACTIVE_LOW>;
832		};
833
834		dpaux@155c0000 {
835			status = "okay";
836		};
837	};
838
839	gpu@17000000 {
840		status = "okay";
841	};
842
843	bpmp {
844		i2c {
845			status = "okay";
846
847			pmic: pmic@3c {
848				compatible = "maxim,max77620";
849				reg = <0x3c>;
850
851				interrupt-parent = <&pmc>;
852				interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
853				#interrupt-cells = <2>;
854				interrupt-controller;
855
856				#gpio-cells = <2>;
857				gpio-controller;
858
859				pinctrl-names = "default";
860				pinctrl-0 = <&max77620_default>;
861
862				fps {
863					fps0 {
864						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
865						maxim,shutdown-fps-time-period-us = <640>;
866					};
867
868					fps1 {
869						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
870						maxim,shutdown-fps-time-period-us = <640>;
871					};
872
873					fps2 {
874						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
875						maxim,shutdown-fps-time-period-us = <640>;
876					};
877				};
878
879				max77620_default: pinmux {
880					gpio0 {
881						pins = "gpio0";
882						function = "gpio";
883					};
884
885					gpio1 {
886						pins = "gpio1";
887						function = "fps-out";
888						maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
889					};
890
891					gpio2 {
892						pins = "gpio2";
893						function = "fps-out";
894						maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
895					};
896
897					gpio3 {
898						pins = "gpio3";
899						function = "fps-out";
900						maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
901					};
902
903					gpio4 {
904						pins = "gpio4";
905						function = "32k-out1";
906						drive-push-pull = <1>;
907					};
908
909					gpio5 {
910						pins = "gpio5";
911						function = "gpio";
912						drive-push-pull = <0>;
913					};
914
915					gpio6 {
916						pins = "gpio6";
917						function = "gpio";
918						drive-push-pull = <1>;
919					};
920
921					gpio7 {
922						pins = "gpio7";
923						function = "gpio";
924						drive-push-pull = <1>;
925					};
926				};
927
928				regulators {
929					in-sd0-supply = <&vdd_5v0_sys>;
930					in-sd1-supply = <&vdd_5v0_sys>;
931					in-sd2-supply = <&vdd_5v0_sys>;
932					in-sd3-supply = <&vdd_5v0_sys>;
933
934					in-ldo0-1-supply = <&vdd_5v0_sys>;
935					in-ldo2-supply = <&vdd_5v0_sys>;
936					in-ldo3-5-supply = <&vdd_5v0_sys>;
937					in-ldo4-6-supply = <&vdd_1v8>;
938					in-ldo7-8-supply = <&avdd_dsi_csi>;
939
940					sd0 {
941						regulator-name = "VDD_DDR_1V1_PMIC";
942						regulator-min-microvolt = <1100000>;
943						regulator-max-microvolt = <1100000>;
944						regulator-always-on;
945						regulator-boot-on;
946					};
947
948					avdd_dsi_csi: sd1 {
949						regulator-name = "AVDD_DSI_CSI_1V2";
950						regulator-min-microvolt = <1200000>;
951						regulator-max-microvolt = <1200000>;
952					};
953
954					vdd_1v8: sd2 {
955						regulator-name = "VDD_1V8";
956						regulator-min-microvolt = <1800000>;
957						regulator-max-microvolt = <1800000>;
958					};
959
960					vdd_3v3_sys: sd3 {
961						regulator-name = "VDD_3V3_SYS";
962						regulator-min-microvolt = <3300000>;
963						regulator-max-microvolt = <3300000>;
964					};
965
966					vdd_1v8_pll: ldo0 {
967						regulator-name = "VDD_1V8_AP_PLL";
968						regulator-min-microvolt = <1800000>;
969						regulator-max-microvolt = <1800000>;
970					};
971
972					ldo2 {
973						regulator-name = "VDDIO_3V3_AOHV";
974						regulator-min-microvolt = <3300000>;
975						regulator-max-microvolt = <3300000>;
976						regulator-always-on;
977						regulator-boot-on;
978					};
979
980					vddio_sdmmc1: ldo3 {
981						regulator-name = "VDDIO_SDMMC1_AP";
982						regulator-min-microvolt = <1800000>;
983						regulator-max-microvolt = <3300000>;
984					};
985
986					ldo4 {
987						regulator-name = "VDD_RTC";
988						regulator-min-microvolt = <1000000>;
989						regulator-max-microvolt = <1000000>;
990					};
991
992					vddio_sdmmc3: ldo5 {
993						regulator-name = "VDDIO_SDMMC3_AP";
994						regulator-min-microvolt = <2800000>;
995						regulator-max-microvolt = <2800000>;
996					};
997
998					vdd_hdmi_1v05: ldo7 {
999						regulator-name = "VDD_HDMI_1V05";
1000						regulator-min-microvolt = <1050000>;
1001						regulator-max-microvolt = <1050000>;
1002					};
1003
1004					vdd_pex: ldo8 {
1005						regulator-name = "VDD_PEX_1V05";
1006						regulator-min-microvolt = <1050000>;
1007						regulator-max-microvolt = <1050000>;
1008					};
1009				};
1010			};
1011		};
1012	};
1013
1014	cpus {
1015		cpu@0 {
1016			enable-method = "psci";
1017		};
1018
1019		cpu@1 {
1020			enable-method = "psci";
1021		};
1022
1023		cpu@2 {
1024			enable-method = "psci";
1025		};
1026
1027		cpu@3 {
1028			enable-method = "psci";
1029		};
1030
1031		cpu@4 {
1032			enable-method = "psci";
1033		};
1034
1035		cpu@5 {
1036			enable-method = "psci";
1037		};
1038	};
1039
1040	gpio-keys {
1041		compatible = "gpio-keys";
1042
1043		key-power {
1044			label = "Power";
1045			gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 0)
1046					   GPIO_ACTIVE_LOW>;
1047			linux,input-type = <EV_KEY>;
1048			linux,code = <KEY_POWER>;
1049			debounce-interval = <10>;
1050			wakeup-event-action = <EV_ACT_ASSERTED>;
1051			wakeup-source;
1052		};
1053
1054		key-volume-down {
1055			label = "Volume Down";
1056			gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 2)
1057					   GPIO_ACTIVE_LOW>;
1058			linux,input-type = <EV_KEY>;
1059			linux,code = <KEY_VOLUMEDOWN>;
1060			debounce-interval = <10>;
1061		};
1062
1063		key-volume-up {
1064			label = "Volume Up";
1065			gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 1)
1066					   GPIO_ACTIVE_LOW>;
1067			linux,input-type = <EV_KEY>;
1068			linux,code = <KEY_VOLUMEUP>;
1069			debounce-interval = <10>;
1070		};
1071	};
1072
1073	psci {
1074		compatible = "arm,psci-1.0";
1075		status = "okay";
1076		method = "smc";
1077	};
1078
1079	fan: pwm-fan {
1080		compatible = "pwm-fan";
1081		pwms = <&pwm4 0 45334>;
1082
1083		cooling-levels = <0 64 128 255>;
1084		#cooling-cells = <2>;
1085	};
1086
1087	gnd: regulator-gnd {
1088		compatible = "regulator-fixed";
1089		regulator-name = "GND";
1090		regulator-min-microvolt = <0>;
1091		regulator-max-microvolt = <0>;
1092		regulator-always-on;
1093		regulator-boot-on;
1094	};
1095
1096	vdd_5v0_sys: regulator-vdd-5v0-sys {
1097		compatible = "regulator-fixed";
1098		regulator-name = "VDD_5V0_SYS";
1099		regulator-min-microvolt = <5000000>;
1100		regulator-max-microvolt = <5000000>;
1101		regulator-always-on;
1102		regulator-boot-on;
1103	};
1104
1105	vdd_1v8_ap: regulator-vdd-1v8-ap {
1106		compatible = "regulator-fixed";
1107		regulator-name = "VDD_1V8_AP";
1108		regulator-min-microvolt = <1800000>;
1109		regulator-max-microvolt = <1800000>;
1110
1111		gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1112		enable-active-high;
1113
1114		vin-supply = <&vdd_1v8>;
1115	};
1116
1117	vdd_hdmi: regulator-vdd-hdmi {
1118		compatible = "regulator-fixed";
1119		regulator-name = "VDD_5V0_HDMI_CON";
1120		regulator-min-microvolt = <5000000>;
1121		regulator-max-microvolt = <5000000>;
1122
1123		vin-supply = <&vdd_5v0_sys>;
1124	};
1125
1126	sound {
1127		compatible = "nvidia,tegra186-audio-graph-card";
1128		status = "okay";
1129
1130		dais = /* FE */
1131		       <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
1132		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>,
1133		       <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>,
1134		       <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
1135		       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>,
1136		       /* Router */
1137		       <&xbar_i2s1_port>, <&xbar_i2s3_port>,
1138		       <&xbar_dmic1_port>, <&xbar_dmic2_port>,
1139		       /* I/O */
1140		       <&i2s1_port>, <&i2s3_port>,
1141		       <&dmic1_port>, <&dmic2_port>;
1142
1143		label = "NVIDIA Jetson TX2 NX APE";
1144	};
1145
1146	thermal-zones {
1147		cpu-thermal {
1148			polling-delay = <0>;
1149			polling-delay-passive = <500>;
1150			status = "okay";
1151
1152			trips {
1153				cpu_trip_critical: critical {
1154					temperature = <96500>;
1155					hysteresis = <0>;
1156					type = "critical";
1157				};
1158
1159				cpu_trip_hot: hot {
1160					temperature = <79000>;
1161					hysteresis = <2000>;
1162					type = "hot";
1163				};
1164
1165				cpu_trip_active: active {
1166					temperature = <62000>;
1167					hysteresis = <2000>;
1168					type = "active";
1169				};
1170
1171				cpu_trip_passive: passive {
1172					temperature = <45000>;
1173					hysteresis = <2000>;
1174					type = "passive";
1175				};
1176			};
1177
1178			cooling-maps {
1179				cpu-critical {
1180					cooling-device = <&fan 3 3>;
1181					trip = <&cpu_trip_critical>;
1182				};
1183
1184				cpu-hot {
1185					cooling-device = <&fan 2 2>;
1186					trip = <&cpu_trip_hot>;
1187				};
1188
1189				cpu-active {
1190					cooling-device = <&fan 1 1>;
1191					trip = <&cpu_trip_active>;
1192				};
1193
1194				cpu-passive {
1195					cooling-device = <&fan 0 0>;
1196					trip = <&cpu_trip_passive>;
1197				};
1198			};
1199		};
1200
1201		aux-thermal {
1202			polling-delay = <0>;
1203			polling-delay-passive = <500>;
1204			status = "okay";
1205
1206			trips {
1207				aux_alert0: critical {
1208					temperature = <90000>;
1209					hysteresis = <0>;
1210					type = "critical";
1211				};
1212			};
1213		};
1214
1215		gpu-thermal {
1216			polling-delay = <0>;
1217			polling-delay-passive = <500>;
1218			status = "okay";
1219
1220			trips {
1221				gpu_alert0: critical {
1222					temperature = <99000>;
1223					hysteresis = <0>;
1224					type = "critical";
1225				};
1226			};
1227		};
1228	};
1229};
1230