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/linux/tools/testing/selftests/powerpc/lib/
H A Dreg.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
7 #include <ppc-asm.h>
11 /* Non volatile GPR - unsigned long buf[18] */
13 ld 14, 0*8(3)
14 ld 15, 1*8(3)
15 ld 16, 2*8(3)
16 ld 17, 3*8(3)
17 ld 18, 4*8(3)
18 ld 19, 5*8(3)
19 ld 20, 6*8(3)
[all …]
/linux/arch/arm64/include/asm/
H A Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
17 #include <asm/gpr-num.h>
23 * [20-19] : Op0
24 * [18-16] : Op1
25 * [15-12] : CRn
26 * [11-8] : CRm
27 * [7-5] : Op2
84 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
87 * Op0 = 0, CRn = 4
[all …]
/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
66 /* Save area for non-coprocessor optional and custom (TIE) state: */
68 #define XCHAL_NCP_SA_ALIGN 4
71 #define XCHAL_TOTAL_SA_SIZE 160 /* with 16-byte align padding */
84 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
92 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
94 * regnum = reg index in regfile, or special/TIE-user reg number
101 * To filter out certain registers, e.g. to expand only the non-global
116 XCHAL_SA_REG(s,1,2,1,1, threadptr, 4, 4, 4,0x03E7, ur,231, 32,0,0,0) \
[all …]
/linux/arch/arc/include/asm/
H A Duaccess.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
6 * -__clear_user( ) called multiple times during elf load was byte loop
10 * -Hand crafted constant propagation for "constant" copy sizes
11 * -stock kernel shrunk by 33K at -O3
14 * -Added option to (UN)inline copy_(to|from)_user to reduce code sz
15 * -kernel shrunk by 200K even at -O3 (gcc 4.2.1)
16 * -Enabled when doing -Os
34 case 4: __arc_get_user_one(*(k), u, "ld", __ret); break; \
41 * Returns 0 on success, -EFAULT if not.
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include "rockchip-pinconf.dtsi"
15 /omit-if-no-ref/
16 acodec_pins: acodec-pins {
36 /omit-if-no-ref/
37 audiopwm_lout: audiopwm-lout {
40 <1 RK_PA0 4 &pcfg_pull_none>;
43 /omit-if-no-ref/
44 audiopwm_loutn: audiopwm-loutn {
[all …]
H A Drk3562-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include "rockchip-pinconf.dtsi"
15 /omit-if-no-ref/
16 camm0_clk0_out: camm0-clk0-out {
19 <3 RK_PB2 2 &pcfg_pull_none>;
22 /omit-if-no-ref/
23 camm0_clk1_out: camm0-clk1-out {
26 <3 RK_PB3 2 &pcfg_pull_none>;
29 /omit-if-no-ref/
[all …]
H A Drk3528-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include "rockchip-pinconf.dtsi"
15 /omit-if-no-ref/
16 arm_pins: arm-pins {
19 <4 RK_PC4 3 &pcfg_pull_none>;
24 /omit-if-no-ref/
25 clkm0_32k_out: clkm0-32k-out {
28 <3 RK_PC3 3 &pcfg_pull_none>;
31 /omit-if-no-ref/
[all …]
H A Drk3588-base-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include "rockchip-pinconf.dtsi"
15 /omit-if-no-ref/
16 auddsm_pins: auddsm-pins {
19 <3 RK_PA1 4 &pcfg_pull_none>,
21 <3 RK_PA2 4 &pcfg_pull_none>,
23 <3 RK_PA3 4 &pcfg_pull_none>,
25 <3 RK_PA4 4 &pcfg_pull_none>;
30 /omit-if-no-ref/
[all …]
/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2014 Tensilica Inc.
66 /* Save area for non-coprocessor optional and custom (TIE) state: */
68 #define XCHAL_NCP_SA_ALIGN 4
71 #define XCHAL_TOTAL_SA_SIZE 240 /* with 16-byte align padding */
84 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
92 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
94 * regnum = reg index in regfile, or special/TIE-user reg number
101 * To filter out certain registers, e.g. to expand only the non-global
116 XCHAL_SA_REG(s,1,2,1,1, threadptr, 4, 4, 4,0x03E7, ur,231, 32,0,0,0) \
[all …]
/linux/arch/xtensa/variants/csp/include/variant/
H A Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
63 /* Save area for non-coprocessor optional and custom (TIE) state: */
65 #define XCHAL_NCP_SA_ALIGN 4
68 #define XCHAL_TOTAL_SA_SIZE 48 /* with 16-byte align padding */
69 #define XCHAL_TOTAL_SA_ALIGN 4 /* actual minimum alignment */
81 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
89 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
91 * regnum = reg index in regfile, or special/TIE-user reg number
98 * To filter out certain registers, e.g. to expand only the non-global
[all …]
/linux/tools/testing/selftests/cgroup/
H A Dtest_cpuset_prs.sh2 # SPDX-License-Identifier: GPL-2.0
13 exit 4 # ksft_skip
16 [[ $(id -u) -eq 0 ]] || skip_test "Test must be run as root!"
23 CGROUP2=$(mount -t cgroup2 | head -1 | awk -e '{print $3}')
24 [[ -n "$CGROUP2" ]] || skip_test "Cgroup v2 mount point not found!"
28 NR_CPUS=$(lscpu | grep "^CPU(s):" | sed -e "s/.*:[[:space:]]*//")
29 [[ $NR_CPUS -lt 8 ]] && skip_test "Test needs at least 8 cpus available!"
32 if [[ -c /dev/console && -w /dev/console ]]
44 while [[ "$1" = -* ]]
47 -v) ((VERBOSE++))
[all …]
/linux/include/dt-bindings/pinctrl/
H A Dpads-imx8dxl.h1 /* SPDX-License-Identifier: GPL-2.0+ */
13 #define IMX8DXL_COMP_CTL_GPIO_1V8_3V3_PCIESEP 3
14 #define IMX8DXL_USB_SS3_TC0 4
149 … IMX8DXL_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 IMX8DXL_PCIE_CTRL0_PERST_B 4
152 … IMX8DXL_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 IMX8DXL_PCIE_CTRL0_CLKREQ_B 4
155 … IMX8DXL_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 IMX8DXL_PCIE_CTRL0_WAKE_B 4
160 … IMX8DXL_USB_SS3_TC0_LSIO_GPIO4_IO03 IMX8DXL_USB_SS3_TC0 4
164 … IMX8DXL_USB_SS3_TC1_LSIO_GPIO4_IO04 IMX8DXL_USB_SS3_TC1 4
169 … IMX8DXL_USB_SS3_TC2_LSIO_GPIO4_IO05 IMX8DXL_USB_SS3_TC2 4
173 … IMX8DXL_USB_SS3_TC3_LSIO_GPIO4_IO06 IMX8DXL_USB_SS3_TC3 4
[all …]
H A Dpads-imx8qxp.h1 /* SPDX-License-Identifier: GPL-2.0+ */
14 #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_PCIESEP 3
15 #define IMX8QXP_USB_SS3_TC0 4
190 … IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 IMX8QXP_PCIE_CTRL0_PERST_B 4
192 … IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 IMX8QXP_PCIE_CTRL0_CLKREQ_B 4
194 … IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 IMX8QXP_PCIE_CTRL0_WAKE_B 4
198 … IMX8QXP_USB_SS3_TC0_LSIO_GPIO4_IO03 IMX8QXP_USB_SS3_TC0 4
201 … IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04 IMX8QXP_USB_SS3_TC1 4
205 … IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05 IMX8QXP_USB_SS3_TC2 4
208 … IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06 IMX8QXP_USB_SS3_TC3 4
[all …]
/linux/sound/soc/codecs/
H A Dsma1303.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * sma1303.h -- sma1303 ALSA SoC Audio driver
27 #define SMA1303_I2C_RETRY_COUNT 3
122 #define SMA1303_I2S_MODE_MASK (7<<4)
123 #define SMA1303_STANDARD_I2S (0<<4)
124 #define SMA1303_LJ (1<<4)
125 #define SMA1303_RJ_16BIT (4<<4)
126 #define SMA1303_RJ_18BIT (5<<4)
127 #define SMA1303_RJ_20BIT (6<<4)
128 #define SMA1303_RJ_24BIT (7<<4)
[all …]
H A Dmax98926.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * max98926.h -- MAX98926 ALSA SoC Audio driver
4 * Copyright 2013-2015 Maxim Integrated Products
77 #define MAX98926_PDM_VOLTAGE_MASK (1<<3)
78 #define MAX98926_PDM_VOLTAGE_SHIFT 3
87 #define MAX98926_PDM_SOURCE_1_MASK (1<<4)
88 #define MAX98926_PDM_SOURCE_1_SHIFT 4
93 #define MAX98926_THERMWARN_STATUS_MASK (1<<3)
94 #define MAX98926_THERMWARN_STATUS_SHIFT 3
104 #define MAX98926_WATCHFAIL_STATUS_MASK (1<<4)
[all …]
/linux/arch/powerpc/boot/
H A Dstring.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
13 addi r5,r3,-1
14 addi r4,r4,-1
26 addi r6,r3,-1
27 addi r4,r4,-1
36 addi r5,r3,-1
37 addi r4,r4,-1
41 addi r5,r5,-1
50 addi r3,r3,-1
61 addi r5,r3,-1
[all …]
/linux/lib/zstd/compress/
H A Dclevels.h1 /* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
6 * This source code is licensed under both the BSD-style license (found in the
9 * You may select, at your option, one of the above-listed licenses.
18 /*-===== Pre-defined compression levels =====-*/
24 static const ZSTD_compressionParameters ZSTD_defaultCParameters[4][ZSTD_MAX_CLEVEL+1] = {
25 { /* "default" - for any srcSize > 256 KB */
30 { 21, 16, 17, 1, 5, 0, ZSTD_dfast }, /* level 3 */
31 { 21, 18, 18, 1, 5, 0, ZSTD_dfast }, /* level 4 */
32 { 21, 18, 19, 3, 5, 2, ZSTD_greedy }, /* level 5 */
33 { 21, 18, 19, 3, 5, 4, ZSTD_lazy }, /* level 6 */
[all …]
/linux/Documentation/userspace-api/media/v4l/
H A Dpixfmt-rgb.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _pixfmt-rgb:
23 (including capture queues of mem-to-mem devices) fill the alpha component in
26 but can set the alpha bit to a user-configurable value, the
27 :ref:`V4L2_CID_ALPHA_COMPONENT <v4l2-alpha-component>` control is used to
32 :ref:`Output <output>` devices (including output queues of mem-to-mem devices
45 - In all the tables that follow, bit 7 is the most significant bit in a byte.
46 - 'r', 'g' and 'b' denote bits of the red, green and blue components
55 based on the order of the RGB components as seen in a 8-, 16- or 32-bit word,
57 noted by the presence of bit 31 in the 4CC value), and on the number of bits
[all …]
/linux/arch/xtensa/variants/de212/include/variant/
H A Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
40 /* Save area for non-coprocessor optional and custom (TIE) state: */
42 #define XCHAL_NCP_SA_ALIGN 4
45 #define XCHAL_TOTAL_SA_SIZE 32 /* with 16-byte align padding */
46 #define XCHAL_TOTAL_SA_ALIGN 4 /* actual minimum alignment */
58 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
66 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
68 * regnum = reg index in regfile, or special/TIE-user reg number
75 * To filter out certain registers, e.g. to expand only the non-global
[all …]
/linux/tools/testing/selftests/powerpc/copyloops/
H A Dcopyuser_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/asm-compat.h>
9 #include <asm/feature-fixups.h>
17 #define sLd sld /* Shift towards low-numbered address. */
18 #define sHd srd /* Shift towards high-numbered address. */
20 #define sLd srd /* Shift towards low-numbere
[all...]
/linux/arch/powerpc/lib/
H A Dcopyuser_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/asm-compat.h>
9 #include <asm/feature-fixups.h>
17 #define sLd sld /* Shift towards low-numbered address. */
18 #define sHd srd /* Shift towards high-numbered address. */
20 #define sLd srd /* Shift towards low-numbered address. */
21 #define sHd sld /* Shift towards high-numbered address. */
39 100: EX_TABLE(100b, .Lld_exc - r3_offset)
43 100: EX_TABLE(100b, .Lst_exc - r3_offset)
56 /* first check for a 4kB copy on a 4kB boundary */
[all …]
/linux/drivers/media/test-drivers/vicodec/
H A Dcodec-v4l2-fwht.c1 // SPDX-License-Identifier: LGPL-2.1
11 #include "codec-v4l2-fwht.h"
14 { V4L2_PIX_FMT_YUV420, 1, 3, 2, 1, 1, 2, 2, 3, 3, V4L2_FWHT_FL_PIXENC_YUV},
15 { V4L2_PIX_FMT_YVU420, 1, 3, 2, 1, 1, 2, 2, 3, 3, V4L2_FWHT_FL_PIXENC_YUV},
16 { V4L2_PIX_FMT_YUV422P, 1, 2, 1, 1, 1, 2, 1, 3, 3, V4L2_FWHT_FL_PIXENC_YUV},
17 { V4L2_PIX_FMT_NV12, 1, 3, 2, 1, 2, 2, 2, 3, 2, V4L2_FWHT_FL_PIXENC_YUV},
18 { V4L2_PIX_FMT_NV21, 1, 3, 2, 1, 2, 2, 2, 3, 2, V4L2_FWHT_FL_PIXENC_YUV},
19 { V4L2_PIX_FMT_NV16, 1, 2, 1, 1, 2, 2, 1, 3, 2, V4L2_FWHT_FL_PIXENC_YUV},
20 { V4L2_PIX_FMT_NV61, 1, 2, 1, 1, 2, 2, 1, 3, 2, V4L2_FWHT_FL_PIXENC_YUV},
21 { V4L2_PIX_FMT_NV24, 1, 3, 1, 1, 2, 1, 1, 3, 2, V4L2_FWHT_FL_PIXENC_YUV},
[all …]
/linux/arch/csky/lib/
H A Dusercopy.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
15 " mov %3, %1 \n" in raw_copy_from_user()
16 " or %3, %2 \n" in raw_copy_from_user()
17 " andi %3, 3 \n" in raw_copy_from_user()
18 " cmpnei %3, 0 \n" in raw_copy_from_user()
22 " bt 3f \n" in raw_copy_from_user()
23 "2: ldw %3, (%2, 0) \n" in raw_copy_from_user()
24 "10: ldw %4, (%2, 4) \n" in raw_copy_from_user()
25 " stw %3, (%1, 0) \n" in raw_copy_from_user()
[all …]
/linux/arch/m68k/lib/
H A Dchecksum.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
19 * length-counter instead of the length counter
22 * data-registers to hold input values and one tries to
43 * is aligned on either a 2-byte or 4-byte boundary. in csum_partial()
45 __asm__("movel %2,%3\n\t" in csum_partial()
46 "btst #1,%3\n\t" /* Check alignment */ in csum_partial()
48 "subql #2,%1\n\t" /* buff%4==2: treat first word */ in csum_partial()
51 "jra 4f\n" in csum_partial()
54 "clrl %3\n\t" in csum_partial()
[all …]
/linux/tools/perf/pmu-events/arch/x86/arrowlake/
H A Dpipeline.json4 "Counter": "0,1,2,3,4,5,6,7",
14 "Counter": "0,1,2,3,4,5,6,7,8,9",
18 "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations.",
25 "Counter": "0,1,2,3,4,5,6,7",
35 "Counter": "0,1,2,3,4,5,6,7",
45 "Counter": "0,1,2,3,
33 { global() object
43 { global() object
[all...]

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