Lines Matching +full:3 +full:- +full:4
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * max98926.h -- MAX98926 ALSA SoC Audio driver
4 * Copyright 2013-2015 Maxim Integrated Products
77 #define MAX98926_PDM_VOLTAGE_MASK (1<<3)
78 #define MAX98926_PDM_VOLTAGE_SHIFT 3
87 #define MAX98926_PDM_SOURCE_1_MASK (1<<4)
88 #define MAX98926_PDM_SOURCE_1_SHIFT 4
93 #define MAX98926_THERMWARN_STATUS_MASK (1<<3)
94 #define MAX98926_THERMWARN_STATUS_SHIFT 3
104 #define MAX98926_WATCHFAIL_STATUS_MASK (1<<4)
105 #define MAX98926_WATCHFAIL_STATUS_SHIFT 4
107 #define MAX98926_ALCINFH_STATUS_MASK (1<<3)
108 #define MAX98926_ALCINFH_STATUS_SHIFT 3
127 #define MAX98926_SLOTCNFLT_STATUS_MASK (1<<4)
128 #define MAX98926_SLOTCNFLT_STATUS_SHIFT 4
130 #define MAX98926_VBSTOVFL_STATUS_MASK (1<<3)
131 #define MAX98926_VBSTOVFL_STATUS_SHIFT 3
144 #define MAX98926_THERMWARN_END_STATE_MASK (1<<3)
145 #define MAX98926_THERMWARN_END_STATE_SHIFT 3
161 #define MAX98926_WATCHFAIL_STATE_MASK (1<<4)
162 #define MAX98926_WATCHFAIL_STATE_SHIFT 4
164 #define MAX98926_ALCINFH_STATE_MASK (1<<3)
165 #define MAX98926_ALCINFH_STATE_SHIFT 3
184 #define MAX98926_SLOTCNFLT_STATE_MASK (1<<4)
185 #define MAX98926_SLOTCNFLT_STATE_SHIFT 4
187 #define MAX98926_VBSTOVFL_STATE_MASK (1<<3)
188 #define MAX98926_VBSTOVFL_STATE_SHIFT 3
201 #define MAX98926_THERMWARN_END_FLAG_MASK (1<<3)
202 #define MAX98926_THERMWARN_END_FLAG_SHIFT 3
218 #define MAX98926_WATCHFAIL_FLAG_MASK (1<<4)
219 #define MAX98926_WATCHFAIL_FLAG_SHIFT 4
221 #define MAX98926_ALCINFH_FLAG_MASK (1<<3)
222 #define MAX98926_ALCINFH_FLAG_SHIFT 3
241 #define MAX98926_SLOTCNFLT_FLAG_MASK (1<<4)
242 #define MAX98926_SLOTCNFLT_FLAG_SHIFT 4
244 #define MAX98926_VBSTOVFL_FLAG_MASK (1<<3)
245 #define MAX98926_VBSTOVFL_FLAG_SHIFT 3
258 #define MAX98926_THERMWARN_END_EN_MASK (1<<3)
259 #define MAX98926_THERMWARN_END_EN_SHIFT 3
275 #define MAX98926_WATCHFAIL_EN_MASK (1<<4)
276 #define MAX98926_WATCHFAIL_EN_SHIFT 4
278 #define MAX98926_ALCINFH_EN_MASK (1<<3)
279 #define MAX98926_ALCINFH_EN_SHIFT 3
298 #define MAX98926_SLOTCNFLT_EN_MASK (1<<4)
299 #define MAX98926_SLOTCNFLT_EN_SHIFT 4
301 #define MAX98926_VBSTOVFL_EN_MASK (1<<3)
302 #define MAX98926_VBSTOVFL_EN_SHIFT 3
315 #define MAX98926_THERMWARN_END_CLR_MASK (1<<3)
316 #define MAX98926_THERMWARN_END_CLR_SHIFT 3
332 #define MAX98926_WATCHFAIL_CLR_MASK (1<<4)
333 #define MAX98926_WATCHFAIL_CLR_SHIFT 4
335 #define MAX98926_ALCINFH_CLR_MASK (1<<3)
336 #define MAX98926_ALCINFH_CLR_SHIFT 3
355 #define MAX98926_SLOTCNFLT_CLR_MASK (1<<4)
356 #define MAX98926_SLOTCNFLT_CLR_SHIFT 4
358 #define MAX98926_VBSTOVFL_CLR_MASK (1<<3)
359 #define MAX98926_VBSTOVFL_CLR_SHIFT 3
375 #define MAX98926_ER_THERMWARN_MAP_MASK (0x07<<4)
376 #define MAX98926_ER_THERMWARN_MAP_SHIFT 4
377 #define MAX98926_ER_THERMWARN_MAP_WIDTH 3
383 #define MAX98926_ER_ALCMUT_MAP_MASK (0x07<<4)
384 #define MAX98926_ER_ALCMUT_MAP_SHIFT 4
385 #define MAX98926_ER_ALCMUT_MAP_WIDTH 3
386 #define MAX98926_ER_ALCP_EN_MASK (1<<3)
387 #define MAX98926_ER_ALCP_EN_SHIFT 3
391 #define MAX98926_ER_ALCP_MAP_WIDTH 3
397 #define MAX98926_ER_ALCINFH_MAP_MASK (0x07<<4)
398 #define MAX98926_ER_ALCINFH_MAP_SHIFT 4
399 #define MAX98926_ER_ALCINFH_MAP_WIDTH 3
400 #define MAX98926_ER_ALCACT_EN_MASK (1<<3)
401 #define MAX98926_ER_ALCACT_EN_SHIFT 3
405 #define MAX98926_ER_ALCACT_MAP_WIDTH 3
411 #define MAX98926_ER_SPKCURNT_MAP_MASK (0x07<<4)
412 #define MAX98926_ER_SPKCURNT_MAP_SHIFT 4
413 #define MAX98926_ER_SPKCURNT_MAP_WIDTH 3
422 #define MAX98926_ER_IMONOVFL_MAP_MASK (0x07<<4)
423 #define MAX98926_ER_IMONOVFL_MAP_SHIFT 4
424 #define MAX98926_ER_IMONOVFL_MAP_WIDTH 3
425 #define MAX98926_ER_VMONOVFL_EN_MASK (1<<3)
426 #define MAX98926_ER_VMONOVFL_EN_SHIFT 3
430 #define MAX98926_ER_VMONOVFL_MAP_WIDTH 3
436 #define MAX98926_ER_VBSTOVFL_MAP_MASK (0x07<<4)
437 #define MAX98926_ER_VBSTOVFL_MAP_SHIFT 4
438 #define MAX98926_ER_VBSTOVFL_MAP_WIDTH 3
439 #define MAX98926_ER_VBATOVFL_EN_MASK (1<<3)
440 #define MAX98926_ER_VBATOVFL_EN_SHIFT 3
444 #define MAX98926_ER_VBATOVFL_MAP_WIDTH 3
450 #define MAX98926_ER_INVALSLOT_MAP_MASK (0x07<<4)
451 #define MAX98926_ER_INVALSLOT_MAP_SHIFT 4
452 #define MAX98926_ER_INVALSLOT_MAP_WIDTH 3
453 #define MAX98926_ER_SLOTCNFLT_EN_MASK (1<<3)
454 #define MAX98926_ER_SLOTCNFLT_EN_SHIFT 3
458 #define MAX98926_ER_SLOTCNFLT_MAP_WIDTH 3
461 #define MAX98926_ER_SLOTOVRN_EN_MASK (1<<3)
462 #define MAX98926_ER_SLOTOVRN_EN_SHIFT 3
466 #define MAX98926_ER_SLOTOVRN_MAP_WIDTH 3
474 #define MAX98926_MDLL_MULT_WIDTH 4
480 #define MAX98926_DAI_SR_MASK (0x0F<<4)
481 #define MAX98926_DAI_SR_SHIFT 4
482 #define MAX98926_DAI_SR_WIDTH 4
483 #define MAX98926_DAI_MAS_MASK (1<<3)
484 #define MAX98926_DAI_MAS_SHIFT 3
488 #define MAX98926_DAI_BSEL_WIDTH 3
522 #define MAX98926_DAI_EXTBCLK_HIZ_MASK (1<<4)
523 #define MAX98926_DAI_EXTBCLK_HIZ_SHIFT 4
525 #define MAX98926_DAI_WCI_MASK (1<<3)
526 #define MAX98926_DAI_WCI_SHIFT 3
540 #define MAX98926_DAI_CHANSZ_32 (3 << MAX98926_DAI_CHANSZ_SHIFT)
549 #define MAX98926_DAI_INR_SOURCE_MASK (0x07<<3)
550 #define MAX98926_DAI_INR_SOURCE_SHIFT 3
551 #define MAX98926_DAI_INR_SOURCE_WIDTH 3
554 #define MAX98926_DAI_INL_SOURCE_WIDTH 3
567 #define MAX98926_DAI_VMON_SLOT_03_04 (3 << MAX98926_DAI_VMON_SLOT_SHIFT)
568 #define MAX98926_DAI_VMON_SLOT_04_05 (4 << MAX98926_DAI_VMON_SLOT_SHIFT)
607 #define MAX98926_DAI_IMON_SLOT_03_04 (3 << MAX98926_DAI_IMON_SLOT_SHIFT)
608 #define MAX98926_DAI_IMON_SLOT_04_05 (4 << MAX98926_DAI_IMON_SLOT_SHIFT)
689 #define MAX98926_DAC_DITHER_EN_MASK (1<<4)
690 #define MAX98926_DAC_DITHER_EN_SHIFT 4
692 #define MAX98926_DAC_FILTER_MODE_MASK (1<<3)
693 #define MAX98926_DAC_FILTER_MODE_SHIFT 3
697 #define MAX98926_DAC_HPF_WIDTH 3
701 #define MAX98926_DAC_HPF_EN_200 (3 << MAX98926_DAC_HPF_SHIFT)
702 #define MAX98926_DAC_HPF_EN_400 (4 << MAX98926_DAC_HPF_SHIFT)
716 #define MAX98926_DAC_IN_SEL_DIV2_SUMMED_DAI (3 << MAX98926_DAC_IN_SEL_SHIFT)
743 #define MAX98926_ALC_ATK_STEP_MASK (0x0F<<4)
744 #define MAX98926_ALC_ATK_STEP_SHIFT 4
745 #define MAX98926_ALC_ATK_STEP_WIDTH 4
748 #define MAX98926_ALC_ATK_RATE_WIDTH 3
751 #define MAX98926_ALC_MAX_ATTEN_MASK (0x0F<<4)
752 #define MAX98926_ALC_MAX_ATTEN_SHIFT 4
753 #define MAX98926_ALC_MAX_ATTEN_WIDTH 4
756 #define MAX98926_ALC_RLS_RATE_WIDTH 3
767 #define MAX98926_ALC_MUTE_DLY_MASK (0x07<<4)
768 #define MAX98926_ALC_MUTE_DLY_SHIFT 4
769 #define MAX98926_ALC_MUTE_DLY_WIDTH 3
772 #define MAX98926_ALC_RLS_DBT_WIDTH 3
778 #define MAX98926_BST_PHASE_MASK (0x03<<4)
779 #define MAX98926_BST_PHASE_SHIFT 4
795 #define MAX98926_SPK_EN_MASK (1<<4)
796 #define MAX98926_SPK_EN_SHIFT 4
798 #define MAX98926_ADC_VBST_EN_MASK (1<<3)
799 #define MAX98926_ADC_VBST_EN_SHIFT 3
812 #define MAX98926_BST_VOUT_MASK (0x0F<<4)
813 #define MAX98926_BST_VOUT_SHIFT 4
814 #define MAX98926_BST_VOUT_WIDTH 4
828 #define MAX98926_BST_ILIM_MASK (0xF<<4)
829 #define MAX98926_BST_ILIM_SHIFT 4
830 #define MAX98926_BST_ILIM_WIDTH 4