Searched +full:2 +full:x_enable (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause25 minItems: 232 minItems: 236 - const: 2x_enable91 clock-names = "sdio", "enable", "2x_enable";
12 #address-cells = <2>;13 #size-cells = <2>;17 #address-cells = <2>;18 #size-cells = <2>;76 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;123 #address-cells = <2>;124 #size-cells = <2>;147 clock-names = "sdio", "enable", "2x_enable";170 #address-cells = <2>;171 #size-cells = <2>;[all …]
91 u32 phy_delay[MMC_TIMING_MMC_HS400 + 2];209 /* select 2x clock source */ in sdhci_sprd_calc_div()210 if (base_clk <= clk * 2) in sdhci_sprd_calc_div()213 div = (u32) (base_clk / (clk * 2)); in sdhci_sprd_calc_div()215 if ((base_clk / div) > (clk * 2)) in sdhci_sprd_calc_div()218 if (div % 2) in sdhci_sprd_calc_div()219 div = (div + 1) / 2; in sdhci_sprd_calc_div()221 div = div / 2; in sdhci_sprd_calc_div()238 div = ((div & 0x300) >> 2) | ((div & 0xFF) << 8); in _sdhci_sprd_set_clock()622 middle_range = range_end - (range_length - 1) / 2; in sdhci_sprd_get_best_clk_sample()[all …]