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/linux/arch/arm/boot/dts/st/
H A Dste-hrefv60plus.dtsi16 /* Poll every 2nd second when cooling */
72 gpio@8012e000 {
104 gpio@8000e000 {
166 gpio@8011e000 {
351 * Display Interface 2 uses GPIO 66 for RST (reset).
H A Dste-snowball.dts70 linux,code = <2>;
74 button@2 {
100 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
118 gpio@8012e000 {
135 gpio@8000e000 {
164 gpio@8011e000 {
216 reg-io-width = <2>;
378 st,drdy-int-pin = <2>;
/linux/arch/arm64/boot/dts/realtek/
H A Drtd1619-mjolnir.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
15 memory@2e000 {
17 reg = <0x2e000 0x7ffd2000>; /* boot ROM to 2 GiB */
36 /* M.2 slot (CON4) */
/linux/tools/testing/selftests/net/
H A Dxfrm_policy.sh32 local me=$2
45 local me=$2
91 # 10.0.1.0/24 (node 2 in dst tree of the bin)
92 # 10.0.2.0/24 (node in src tree of dst node 2)
93 # 10.2.0.0/24 (node in src tree of dst node 2)
96 # that dst node 1 and dst node 2 have to be merged including
112 …ANDOM%255))/$p dst 10.254.1.$((RANDOM%255))/$p dir fwd priority $((200+k)) action block 2>/dev/null
119 local lnet=$2
139 local me=$2
203 ip=$2
[all …]
/linux/Documentation/devicetree/bindings/mips/cavium/
H A Dcib.txt18 - #interrupt-cells: Must be <2>. The first cell is the bit within the
24 interrupt-controller@107000000e000 {
35 * 2) Triggering (1 - edge rising
36 * 2 - edge falling
40 #interrupt-cells = <2>;
/linux/Documentation/devicetree/bindings/nvmem/
H A Dnxp,lpc1857-eeprom.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
17 maxItems: 2
52 eeprom@4000e000 {
/linux/Documentation/devicetree/bindings/soc/nuvoton/
H A Dnuvoton,gfxi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
36 gfxi: gfxi@e000 {
/linux/Documentation/devicetree/bindings/rtc/
H A Dnvidia,tegra20-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
57 timer@7000e000 {
60 interrupts = <0 2 0x04>;
/linux/Documentation/devicetree/bindings/mtd/
H A Dmediatek,nand-ecc-engine.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
53 #address-cells = <2>;
54 #size-cells = <2>;
56 bch: ecc@1100e000 {
/linux/arch/arm/boot/dts/rockchip/
H A Drk3188.dtsi38 cpu2: cpu@2 {
131 vop1: vop@1010e000 {
148 timer3: timer@2000e000 {
174 rockchip,playback-channels = <2>;
175 rockchip,capture-channels = <2>;
180 spdif: sound@1011e000 {
233 #gpio-cells = <2>;
236 #interrupt-cells = <2>;
246 #gpio-cells = <2>;
249 #interrupt-cells = <2>;
[all …]
H A Drk3066a.dtsi111 vop1: vop@1010e000 {
187 rockchip,capture-channels = <2>;
202 rockchip,playback-channels = <2>;
203 rockchip,capture-channels = <2>;
218 rockchip,playback-channels = <2>;
219 rockchip,capture-channels = <2>;
242 timer2: timer@2000e000 {
305 #gpio-cells = <2>;
308 #interrupt-cells = <2>;
318 #gpio-cells = <2>;
[all …]
H A Drk3xxx.dtsi70 cache-level = <2>;
81 interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
95 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
111 reg-shift = <2>;
122 reg-shift = <2>;
134 qos_vpu: qos@1012e000 {
336 #pwm-cells = <2>;
344 #pwm-cells = <2>;
360 #pwm-cells = <2>;
368 #pwm-cells = <2>;
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx93-phycore-rpmsg.dtso12 #address-cells = <2>;
13 #size-cells = <2>;
15 rsc_table: rsc-table@2021e000 {
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra210-p2530.dtsi9 rtc1 = "/rtc@7000e000";
60 cpu@2 {
/linux/Documentation/devicetree/bindings/pwm/
H A Dmediatek,pwm-disp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
42 const: 2
74 pwm0: pwm@1401e000 {
77 #pwm-cells = <2>;
/linux/arch/powerpc/boot/dts/fsl/
H A Dpq3-esdhc-0.dtsi20 * Foundation, either version 2 of that License or (at your option) any
35 sdhc@2e000 {
H A Dbsc9131rdb.dtsi20 * Foundation, either version 2 of that License or (at your option) any
74 interrupts = <2 1 0 0>;
79 sdhc@2e000 {
86 interrupts = <68 2 0 0 69 2 0 0>;
88 fsl,tmr-prsc = <2>;
H A Dp1020rdb-pc_camp_core1.dts96 sdhci@2e000 {
H A Dbsc9131si-post.dtsi20 * Foundation, either version 2 of that License or (at your option) any
36 #address-cells = <2>;
39 interrupts = <16 2 0 0 20 2 0 0>;
58 interrupts = <16 2 0 0>;
64 interrupts = <16 2 0 0>;
69 interrupts = <17 2 0 0>;
74 interrupts = <17 2 0 0>;
79 interrupts = <18 2 0 0>;
83 interrupts = <18 2 0 0 >;
101 interrupts = <16 2 0 0>;
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Drenesas,rzn1-usbf.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
59 usb@4001e000 {
/linux/Documentation/devicetree/bindings/serial/
H A Dbrcm,bcm7271-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
51 maxItems: 2
83 serial@840e000 {
/linux/arch/arm/boot/dts/ti/omap/
H A Domap2430.dtsi107 #gpio-cells = <2>;
109 #interrupt-cells = <2>;
113 gpio2: gpio@4900e000 {
119 #gpio-cells = <2>;
121 #interrupt-cells = <2>;
131 #gpio-cells = <2>;
133 #interrupt-cells = <2>;
143 #gpio-cells = <2>;
145 #interrupt-cells = <2>;
154 #gpio-cells = <2>;
[all …]
/linux/Documentation/devicetree/bindings/display/tilcdc/
H A Dtilcdc.txt21 This property deals with the LCDC revision 2 (found on AM335x)
53 fb: fb@4830e000 {
/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx23.dtsi117 #gpio-cells = <2>;
119 #interrupt-cells = <2>;
127 #gpio-cells = <2>;
129 #interrupt-cells = <2>;
132 gpio2: gpio@2 {
134 reg = <2>;
137 #gpio-cells = <2>;
139 #interrupt-cells = <2>;
166 auart0_2pins_a: auart0-2pins@0 {
177 auart1_2pins_a: auart1-2pins@0 {
[all …]
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-colibri-eval-v3.dts14 rtc1 = "/i2c@7000d000/pmic@2d";
15 rtc2 = "/rtc@7000e000";
121 /* EHCI instance 2: USB3_DP/N -> USBH_P/N */
136 enable-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
197 gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;

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