/linux/arch/m68k/math-emu/ |
H A D | fp_util.S | 12 * 2. Redistributions in binary form must reproduce the above copyright 50 * only the lower half) most function have to return the %a0 68 jpl 2f 70 2: clr.l %d0 95 | %a0 = destination (ptr to struct fp_ext) 98 printf PCONV,"l2e: %p -> %p(",2,%d0,%a0 107 move.l %d1,(%a0)+ | set sign / exp 108 move.l %d0,(%a0)+ | set mantissa 109 clr.l (%a0) 110 subq.l #8,%a0 | restore %a0 [all …]
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H A D | fp_movem.S | 12 * 2. Redistributions in binary form must reproduce the above copyright 55 jra 2f 58 2: move.l %d0,%d1 60 jra 2f 62 2: lsr.b #1,%d0 | register list and keep it in %d1 64 jne 2b 70 jra 2f 72 2: btst #13,%d2 75 jra 2f 77 2: [all …]
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H A D | fp_decode.h | 12 * 2. Redistributions in binary form must reproduce the above copyright 53 * a0 - will point to source/dest operand for any indirect mode 73 bfextu %d2{#8,#2},%d0 146 jra 2\@f 149 move.l %a0,%d0 150 2\@: 151 debug lea "'l'.w,%a0" 154 debug lea "'w'.w,%a0" 156 3\@: printf PDECODE,":%c",1,%a0 169 bfextu %d2{#26,#2},%d0 [all …]
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/linux/arch/riscv/kernel/tests/kprobes/ |
H A D | test-kprobes-asm.S | 13 add a0, a1, x0 18 li a0, 0 23 jal x0, 2f 26 1: li a0, KPROBE_TEST_MAGIC_UPPER 31 2: jal 1b 34 add a0, a0, a2 39 la a0, 1f 44 jalr a0 47 add a0, a0, t0 49 1: li a0, KPROBE_TEST_MAGIC_LOWER [all …]
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/linux/arch/riscv/kernel/ |
H A D | fpu.S | 8 * as published by the Free Software Foundation, version 2. 24 add a0, a0, a2 28 fsd f0, TASK_THREAD_F0_F0(a0) 29 fsd f1, TASK_THREAD_F1_F0(a0) 30 fsd f2, TASK_THREAD_F2_F0(a0) 31 fsd f3, TASK_THREAD_F3_F0(a0) 32 fsd f4, TASK_THREAD_F4_F0(a0) 33 fsd f5, TASK_THREAD_F5_F0(a0) 34 fsd f6, TASK_THREAD_F6_F0(a0) 35 fsd f7, TASK_THREAD_F7_F0(a0) [all …]
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H A D | copy-unaligned.S | 14 beqz a4, 2f 19 REG_L a6, 2*SZREG(a1) 25 REG_S a4, 0(a0) 26 REG_S a5, SZREG(a0) 27 REG_S a6, 2*SZREG(a0) 28 REG_S a7, 3*SZREG(a0) 29 REG_S t0, 4*SZREG(a0) 30 REG_S t1, 5*SZREG(a0) 31 REG_S t2, 6*SZREG(a0) 32 REG_S t3, 7*SZREG(a0) [all …]
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/linux/arch/mips/kvm/ |
H A D | msa.S | 20 st_d 0, VCPU_FPR0, a0 21 st_d 1, VCPU_FPR1, a0 22 st_d 2, VCPU_FPR2, a0 23 st_d 3, VCPU_FPR3, a0 24 st_d 4, VCPU_FPR4, a0 25 st_d 5, VCPU_FPR5, a0 26 st_d 6, VCPU_FPR6, a0 27 st_d 7, VCPU_FPR7, a0 28 st_d 8, VCPU_FPR8, a0 29 st_d 9, VCPU_FPR9, a0 [all …]
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/linux/arch/loongarch/lib/ |
H A D | clear_user.S | 28 * a0: addr 32 beqz a1, 2f 34 1: st.b zero, a0, 0 35 addi.d a0, a0, 1 39 2: move a0, a1 42 _asm_extable 1b, 2b 48 * a0: addr 55 add.d a2, a0, a1 56 0: st.d zero, a0, 0 59 addi.d a0, a0, 8 [all …]
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H A D | copy_user.S | 28 * a0: to 36 2: st.b t0, a0, 0 37 addi.d a0, a0, 1 42 3: move a0, a2 46 _asm_extable 2b, 3b 52 * a0: to 61 1: st.d t0, a0, 0 63 add.d a2, a0, a2 66 andi t1, a0, 7 70 add.d a0, a0, t0 [all …]
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/linux/arch/loongarch/kernel/ |
H A D | lbt.S | 28 stptr.d t1, a0, THREAD_SCR0 30 stptr.d t1, a0, THREAD_SCR1 32 stptr.d t1, a0, THREAD_SCR2 34 stptr.d t1, a0, THREAD_SCR3 37 stptr.d t1, a0, THREAD_EFLAGS 46 ldptr.d t1, a0, THREAD_SCR0 # restore scr 48 ldptr.d t1, a0, THREAD_SCR1 50 ldptr.d t1, a0, THREAD_SCR2 52 ldptr.d t1, a0, THREAD_SCR3 55 ldptr.d t1, a0, THREAD_EFLAGS # restore eflags [all …]
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/linux/arch/csky/abiv2/ |
H A D | strcmp.S | 8 mov a3, a0 13 andi t1, a0, 0x3 20 /* If s1[i] != s2[i], goto 2f. */ 22 bt 2f 31 bt 2f 38 bt 2f 45 bt 2f 52 bt 2f 59 bt 2f 66 bt 2f [all …]
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/linux/arch/mips/kernel/ |
H A D | r4k_fpu.S | 47 fpu_save_double a0 t0 t1 # clobbers t1 59 fpu_restore_double a0 t0 t1 # clobbers t1 70 msa_save_all a0 78 msa_restore_all a0 93 * @a0 - pointer to fpregs field of sigcontext 118 EX sdc1 $f1, 8(a0) 119 EX sdc1 $f3, 24(a0) 120 EX sdc1 $f5, 40(a0) 121 EX sdc1 $f7, 56(a0) 122 EX sdc1 $f9, 72(a0) [all …]
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H A D | octeon_switch.S | 27 LONG_S t1, THREAD_STATUS(a0) 28 cpu_save_nonscratch a0 29 LONG_S ra, THREAD_REG31(a0) 39 /* Multiply * (cache line size/sizeof(long)/2) */ 42 LONG_ADDI t2, a0, THREAD_CVMSEG /* Where to store CVMSEG to */ 44 2: 49 LONG_ADDU t1, LONGSIZE*2 /* Increment loc in CVMSEG */ 51 LONG_ADDU t2, LONGSIZE*2 /* Increment loc in thread storage */ 52 bnez t0, 2b /* Loop until we've copied it all */ 87 move v0, a0 [all …]
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H A D | bmips_5xxx_init.S | 64 #define CP0_DCACHE_TAG_LO $28, 2 68 #define CP0_DCACHE_TAG_HI $29, 2 84 #define BRCM_ZSC_REQ_BUFFER_REG 2 << 3 107 .align 2 113 * Trashes: v0, v1, a0, t0 122 mfc0 a0, CP0_CONFIG, 1 123 move t0, a0 134 srl a0, a0, IS_SHIFT 135 and a0, a0, IS_MASK 140 sllv v0, v0, a0 [all …]
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H A D | cps-vec-ns16550.S | 20 #elif CONFIG_MIPS_CPS_NS16550_WIDTH == 2 33 * @a0: ASCII character to write 40 UART_S a0, UART_TX_OFS(t9) 46 * @a0: pointer to NULL-terminated ASCII string 53 move s6, a0 55 1: lb a0, 0(s6) 56 beqz a0, 2f 61 2: jr s7 66 * @a0: the 4b value to write to the UART 72 andi a0, a0, 0xf [all …]
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/linux/arch/xtensa/kernel/ |
H A D | vectors.S | 28 * a0: trashed, original value saved on stack (PT_AREG0) 77 s32i a0, a2, PT_AREG0 # save a0 to ESF 78 rsr a0, exccause # retrieve exception cause 79 s32i a0, a2, PT_DEPC # mark it as a regular exception 80 addx4 a0, a0, a3 # find entry in table 81 l32i a0, a0, EXC_TABLE_FAST_USER # load handler 83 jx a0 104 s32i a0, a2, PT_AREG0 # save a0 to ESF 105 rsr a0, exccause # retrieve exception cause 106 s32i a0, a2, PT_DEPC # mark it as a regular exception [all …]
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H A D | entry.S | 35 * 010....0 -> 2 60 addi \bit, \bit, -2 61 srli \mask, \mask, 2 102 * a0: trashed, original value saved on stack (PT_AREG0) 114 * a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC 126 rsr a0, depc 128 s32i a0, a2, PT_AREG2 177 UABI_W _bbsi.l a2, 2, .Lsave_window_registers 207 ffs_ws a0, a3 # number of frames to the '1' from left 214 slli a3, a0, 4 # number of frames to save in bits 8..4 [all …]
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/linux/arch/riscv/lib/ |
H A D | uaccess.S | 61 add t5, a0, a2 65 * a0 - start of uncopied dst 70 add t0, a0, a2 81 * a0 - start of dst 84 addi t1, a0, SZREG-1 87 beq a0, t1, .Lskip_align_dst 92 fixup sb a5, 0(a0), 10f 93 addi a0, a0, 1 /* dst */ 94 bltu a0, t1, 1b /* t1 - start of aligned dst */ 111 * a0 - start of aligned dst [all …]
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H A D | strncmp.S | 16 * a0 - comparison result, value like strncmp 19 * a0 - string1 28 beq a2, t2, 2f 29 lbu t0, 0(a0) 31 addi a0, a0, 1 36 2: 37 li a0, 0 44 sub a0, t0, t1 58 * a0 - comparison result, like strncmp 61 * a0 - string1 [all …]
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/linux/drivers/net/ethernet/cisco/enic/ |
H A D | vnic_devcmd.h | 13 #define _CMD_DIRBITS 2 30 #define _CMD_DIR_READ 2U 44 #define _CMD_VTYPE_FC 2U 73 * (u64)a0=paddr to struct vnic_devcmd_fw_info 84 * (u64)a0=paddr to struct vnic_devcmd_fw_info 100 * in: (u16)a0=offset,(u8)a1=size 101 * out: a0=value */ 102 CMD_DEV_SPEC = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 2), 107 /* stats dump in mem: (u64)a0=paddr to stats area, 111 /* set Rx packet filter: (u32)a0=filters (see CMD_PFILTER_*) */ [all …]
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/linux/arch/m68k/fpsp040/ |
H A D | round.S | 14 |ROUND idnt 2,1 | Motorola 040 Floating Point Software Package 23 | a0 points to the input operand in the internal extended format 35 | On return the value pointed to by a0 is correctly rounded, 36 | a0 is preserved and the g-r-s bits in d0 are cleared. 82 tstb LOCAL_SGN(%a0) |check for sign 95 tstb LOCAL_SGN(%a0) |check for sign 148 bfextu LOCAL_HI(%a0){#24:#2},%d3 |sgl prec. g-r are 2 bits right 151 movel LOCAL_HI(%a0),%d2 |get word 2 for s-bit test 154 tstl LOCAL_LO(%a0) |test lower mantissa 160 bfextu LOCAL_LO(%a0){#21:#2},%d3 |dbl-prec. g-r are 2 bits right [all …]
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H A D | res_func.S | 22 RES_FUNC: |idnt 2,1 | Motorola 040 Floating Point Software Package 66 leal FPTEMP(%a6),%a0 68 bclrb #sign_bit,LOCAL_EX(%a0) 69 sne LOCAL_SGN(%a0) 72 bclrb #sign_bit,LOCAL_EX(%a0) |get rid of false sign 73 bfclr LOCAL_SGN(%a0){#0:#8} |change back to IEEE ext format 75 bsetb #sign_bit,LOCAL_EX(%a0) 81 leal ETEMP(%a6),%a0 85 | At this point, only opclass 0 and 2 possible 129 movew LOCAL_EX(%a0),%d0 [all …]
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H A D | smovecr.S | 21 |SMOVECR idnt 2,1 | Motorola 040 Floating Point Software Package 46 bfextu USER_FPCR(%a6){#26:#2},%d1 |get rmode 56 cmpib #0x2f,%d0 |check range $10 - $2f 69 leal PIRZRM,%a0 |rmode is rz or rm, load PIRZRM in a0 72 leal PIRN,%a0 |rmode is rn, load PIRN in a0 75 leal PIRP,%a0 |rmode is rp, load PIRP in a0 84 leal SMALRZRM,%a0 |rmode is rz or rm, load SMRZRM in a0 86 ble set_finx |if 0 - 2, it is inexact 89 leal SMALRN,%a0 |rmode is rn, load SMRN in a0 91 ble set_finx |if 0 - 2, it is inexact [all …]
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/linux/arch/m68k/kernel/ |
H A D | head.S | 50 * 2) Increase use of subroutines to perform functions 287 /* #define FONT_8x16 */ /* 2nd choice */ 303 CPUTYPE_060 = 2 /* indicates an 060 */ 320 TTR_FCB2 = 0x0040 /* function code base bit 2 */ 323 TTR_FCM2 = 0x0004 /* function code mask bit 2 */ 445 func_define mmu_temp_map,2 448 func_define mmu_get_ptr_table_entry,2 449 func_define mmu_get_page_table_entry,2 601 movel %a0@,%a1@ 605 movel %a0@,%a1@ [all …]
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/linux/drivers/media/pci/tw686x/ |
H A D | tw686x-regs.h | 3 #define REG8_1(a0) ((const u16[8]) { a0, a0 + 1, a0 + 2, a0 + 3, \ argument 4 a0 + 4, a0 + 5, a0 + 6, a0 + 7}) 5 #define REG8_2(a0) ((const u16[8]) { a0, a0 + 2, a0 + 4, a0 + 6, \ argument 6 a0 + 8, a0 + 0xa, a0 + 0xc, a0 + 0xe}) 7 #define REG8_8(a0) ((const u16[8]) { a0, a0 + 8, a0 + 0x10, a0 + 0x18, \ argument 8 a0 + 0x20, a0 + 0x28, a0 + 0x30, \ 9 a0 + 0x38}) 55 #define VDREG8(a0) ((const u16[8]) { \ argument 56 a0 + 0x000, a0 + 0x010, a0 + 0x020, a0 + 0x030, \ 57 a0 + 0x100, a0 + 0x110, a0 + 0x120, a0 + 0x130}) [all …]
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