Home
last modified time | relevance | path

Searched +full:250 +full:mhz (Results 1 – 25 of 196) sorted by relevance

12345678

/linux/drivers/clk/spear/
H A Dspear1310_clock.c231 /* PCLK 24MHz */
232 {.mode = 0, .m = 0x83, .n = 0x04, .p = 0x5}, /* vco 1572, pll 49.125 MHz */
233 {.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x3}, /* vco 1000, pll 125 MHz */
234 {.mode = 0, .m = 0x64, .n = 0x06, .p = 0x1}, /* vco 800, pll 400 MHz */
235 {.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x1}, /* vco 1000, pll 500 MHz */
236 {.mode = 0, .m = 0xA6, .n = 0x06, .p = 0x1}, /* vco 1328, pll 664 MHz */
237 {.mode = 0, .m = 0xC8, .n = 0x06, .p = 0x1}, /* vco 1600, pll 800 MHz */
243 {.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x2}, /* vco 1000, pll 250 MHz */
244 {.mode = 0, .m = 0xA6, .n = 0x06, .p = 0x2}, /* vco 1328, pll 332 MHz */
245 {.mode = 0, .m = 0xC8, .n = 0x06, .p = 0x2}, /* vco 1600, pll 400 MHz */
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dbrcm,iproc-clocks.yaml119 250mhz genpll 2 BCM_CYGNUS_GENPLL_250MHZ_CLK
227 250 genpll_sw 2 BCM_NS2_GENPLL_SW_250_CLK
339 - const: 250mhz
394 clock-output-names = "genpll", "axi21", "250mhz", "ihost_sys",
/linux/drivers/media/pci/mantis/
H A Dmantis_vp3030.c33 .frequency_min = 47 * MHz,
34 .frequency_max = 862 * MHz,
36 .ref_multiplier = 6, /* 1/6 MHz */
37 .ref_divider = 100000, /* 1/6 MHz */
57 msleep(250); in vp3030_frontend_init()
/linux/drivers/clocksource/
H A Dscx200_hrt.c5 * This is a clocksource driver for the Geode SCx200's 1 or 27 MHz
25 MODULE_PARM_DESC(mhz27, "count at 27.0 MHz (default is 1.0 MHz)");
36 #define HR_TMCLKSEL (1 << 1) /* 1|0 counts at 27|1 MHz */
50 .rating = 250,
81 pr_info("enabling scx200 high-res timer (%s MHz +%d ppm)\n", mhz27 ? "27":"1", ppm); in init_hrt_clocksource()
/linux/drivers/scsi/qla2xxx/
H A Dqla_devtbl.h8 "QLA2340", "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x100 */
9 "QLA2342", "133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x101 */
10 "QLA2344", "133MHz PCI-X to 2Gb FC, Quad Channel", /* 0x102 */
14 "QLA2310", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x106 */
15 "QLA2332", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x107 */
18 "QLA2342", "Sun 133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x10a */
20 "QLA2350", "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x10c */
21 "QLA2352", "133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x10d */
22 "QLA2352", "Sun 133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x10e */
29 "QLA2360", "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x115 */
[all …]
/linux/drivers/clk/mvebu/
H A Darmada-39x.c24 * 0 = 250 MHz
25 * 1 = 200 MHz
28 * 0 = 25 Mhz
29 * 1 = 40 Mhz
H A Darmada-38x.c23 * 0 = 250 MHz
24 * 1 = 200 MHz
/linux/drivers/media/tuners/
H A Dmt2131.c99 f_lo1 = (f_lo1 / 250) * 250; in mt2131_set_params()
104 /* Frequency LO1 = 16MHz * (DIV1 + NUM1/8192 ) */ in mt2131_set_params()
109 /* Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 ) */ in mt2131_set_params()
229 .frequency_min_hz = 48 * MHz,
230 .frequency_max_hz = 860 * MHz,
H A Dmt2060.c185 #define IF2 36150 // IF2 frequency = 36.150 MHz
186 #define FREF 16000 // Quartz oscillator 16 MHz
214 f_lo1 = (f_lo1 / 250) * 250; in mt2060_set_params()
226 //Frequency LO1 = 16MHz * (DIV1 + NUM1/64 ) in mt2060_set_params()
231 // Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 ) in mt2060_set_params()
389 .frequency_min_hz = 48 * MHz,
390 .frequency_max_hz = 860 * MHz,
/linux/drivers/clk/renesas/
H A Dclk-r8a7779.c31 * (MHz) (MHz)
34 * clkzs 250 (1/6) 200 (1/8)
36 * clks 250 (1/6) 200 (1/8)
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8976.dtsi41 capacity-dmips-mhz = <573>;
52 capacity-dmips-mhz = <573>;
63 capacity-dmips-mhz = <573>;
74 capacity-dmips-mhz = <573>;
85 capacity-dmips-mhz = <1024>;
96 capacity-dmips-mhz = <1024>;
107 capacity-dmips-mhz = <1024>;
118 capacity-dmips-mhz = <1024>;
1703 polling-delay-passive = <250>;
1717 polling-delay-passive = <250>;
[all …]
H A Dsdm630.dtsi63 capacity-dmips-mhz = <1126>;
83 capacity-dmips-mhz = <1126>;
98 capacity-dmips-mhz = <1126>;
113 capacity-dmips-mhz = <1126>;
128 capacity-dmips-mhz = <1024>;
148 capacity-dmips-mhz = <1024>;
163 capacity-dmips-mhz = <1024>;
178 capacity-dmips-mhz = <1024>;
2247 <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
2463 polling-delay-passive = <250>;
[all …]
/linux/arch/arm/mach-omap2/
H A Domap_hwmod_81xx_data.c101 /* L3 Interconnect entries clocked at 125, 250 and 500MHz */
125 * See TRM table 1-73 for devices using the 125MHz SYSCLK6 clock.
137 * table 1-73 for devices using 250MHz SYSCLK5 clock.
146 /* L3 slow -> L4 ls peripheral interface running at 125MHz */
153 /* L3 med -> L4 fast peripheral interface running at 250MHz */
181 /* L3 med peripheral interface running at 200MHz */
208 /* L3 med peripheral interface running at 250MHz */
/linux/Documentation/devicetree/bindings/cpu/
H A Dcpu-capacity.txt38 by the frequency (in MHz) at which the benchmark has been run, so that
39 DMIPS/MHz are obtained. Such values are then normalized w.r.t. the highest
43 3 - capacity-dmips-mhz
46 capacity-dmips-mhz is an optional cpu node [1] property: u32 value
47 representing CPU capacity expressed in normalized DMIPS/MHz. At boot time, the
51 capacity-dmips-mhz property is all-or-nothing: if it is specified for a cpu
55 mhz values (normalized w.r.t. the highest value found while parsing the DT).
62 The capacities-dmips-mhz or DMIPS/MHz values (scaled to 1024)
106 exit-latency-us = <250>;
128 capacity-dmips-mhz = <1024>;
[all …]
/linux/drivers/media/usb/dvb-usb/
H A Dvp702x-fe.c86 st->status_check_interval = 250; in vp702x_fe_read_status()
182 st->status_check_interval = 250; in vp702x_fe_set_frontend()
348 .frequency_min_hz = 950 * MHz,
349 .frequency_max_hz = 2150 * MHz,
350 .frequency_stepsize_hz = 1 * MHz,
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192.dtsi76 capacity-dmips-mhz = <427>;
95 capacity-dmips-mhz = <427>;
114 capacity-dmips-mhz = <427>;
133 capacity-dmips-mhz = <427>;
152 capacity-dmips-mhz = <1024>;
171 capacity-dmips-mhz = <1024>;
190 capacity-dmips-mhz = <1024>;
209 capacity-dmips-mhz = <1024>;
1959 polling-delay-passive = <250>;
1989 polling-delay-passive = <250>;
[all …]
/linux/drivers/media/dvb-frontends/
H A Ddvb_dummy_fe.c216 .frequency_min_hz = 51 * MHz,
217 .frequency_max_hz = 858 * MHz,
250 .frequency_min_hz = 950 * MHz,
251 .frequency_max_hz = 2150 * MHz,
252 .frequency_stepsize_hz = 250 * kHz,
H A Dtda8261.c71 static const u32 div_tab[] = { 2000, 1000, 500, 250, 125 }; /* kHz */
155 .frequency_min_hz = 950 * MHz,
156 .frequency_max_hz = 2150 * MHz,
/linux/Documentation/devicetree/bindings/thermal/
H A Dthermal-cooling-devices.yaml72 capacity-dmips-mhz = <607>;
98 polling-delay-passive = <250>;
114 /* Corresponds to 1000MHz in OPP table */
/linux/drivers/scsi/
H A Ddc395x.h31 #define DC395x_SEL_TIMEOUT 153 /* 250 ms selection timeout (@ 40 MHz) */
343 /* 000 100ns, 10.0 MHz */
344 /* 001 150ns, 6.6 MHz */
345 /* 010 200ns, 5.0 MHz */
346 /* 011 250ns, 4.0 MHz */
347 /* 100 300ns, 3.3 MHz */
348 /* 101 350ns, 2.8 MHz */
349 /* 110 400ns, 2.5 MHz */
350 /* 111 450ns, 2.2 MHz */
355 /* 000 50ns, 20.0 MHz */
[all …]
/linux/Documentation/i2c/busses/
H A Di2c-nforce2.rst9 * nForce3 250Gb MCP 10de:00E4
39 Flags: 66Mhz, fast devsel, IRQ 5
/linux/Documentation/devicetree/bindings/input/
H A Diqs626a.yaml283 0: 4 MHz (1 MHz)
284 1: 2 MHz (500 kHz)
285 2: 1 MHz (250 kHz)
397 0: 16 MHz (4 MHz)
398 1: 8 MHz (2 MHz)
399 2: 4 MHz (1 MHz)
400 3: 2 MHz (500 kHz)
603 0: 4 MHz (1 MHz)
604 1: 2 MHz (500 kHz)
605 2: 1 MHz (250 kHz)
/linux/drivers/watchdog/
H A Dsc520_wdt.c76 * If we reset the watchdog every ~250ms we should be safe.
108 #define WDT_EXP_SEL_01 0x0001 /* [01] Time-out = 496 us (with 33 Mhz clk). */
109 #define WDT_EXP_SEL_02 0x0002 /* [02] Time-out = 508 ms (with 33 Mhz clk). */
110 #define WDT_EXP_SEL_03 0x0004 /* [03] Time-out = 1.02 s (with 33 Mhz clk). */
111 #define WDT_EXP_SEL_04 0x0008 /* [04] Time-out = 2.03 s (with 33 Mhz clk). */
112 #define WDT_EXP_SEL_05 0x0010 /* [05] Time-out = 4.07 s (with 33 Mhz clk). */
113 #define WDT_EXP_SEL_06 0x0020 /* [06] Time-out = 8.13 s (with 33 Mhz clk). */
114 #define WDT_EXP_SEL_07 0x0040 /* [07] Time-out = 16.27s (with 33 Mhz clk). */
115 #define WDT_EXP_SEL_08 0x0080 /* [08] Time-out = 32.54s (with 33 Mhz clk). */
/linux/arch/hexagon/kernel/
H A Dtime.c28 * pcycle frequency (600MHz)
30 * thread/cpu frequency (100MHz)
79 .rating = 250,
/linux/drivers/clk/uniphier/
H A Dclk-uniphier-sys.c87 UNIPHIER_CLK_FACTOR("spll", -1, "ref", 65, 1), /* 1597.44 MHz */
88 UNIPHIER_CLK_FACTOR("upll", -1, "ref", 6000, 512), /* 288 MHz */
89 UNIPHIER_CLK_FACTOR("a2pll", -1, "ref", 24, 1), /* 589.824 MHz */
90 UNIPHIER_CLK_FACTOR("vpll27a", -1, "ref", 5625, 512), /* 270 MHz */
103 UNIPHIER_CLK_FACTOR("spll", -1, "ref", 64, 1), /* 1600 MHz */
104 UNIPHIER_CLK_FACTOR("upll", -1, "ref", 288, 25), /* 288 MHz */
105 UNIPHIER_CLK_FACTOR("a2pll", -1, "upll", 256, 125), /* 589.824 MHz */
106 UNIPHIER_CLK_FACTOR("vpll27a", -1, "ref", 270, 25), /* 270 MHz */
107 UNIPHIER_CLK_FACTOR("gpll", -1, "ref", 10, 1), /* 250 MHz */
132 UNIPHIER_CLK_FACTOR("spll", -1, "ref", 64, 1), /* 1600 MHz */
[all …]

12345678