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/linux/include/linux/
H A Dinet.h12 * $Id: Space.c,v 0.8.4.5 1992/12/12 19:25:04 bir7 Exp $
13 * $Id: arp.c,v 0.8.4.6 1993/01/28 22:30:00 bir7 Exp $
14 * $Id: arp.h,v 0.8.4.6 1993/01/28 22:30:00 bir7 Exp $
15 * $Id: dev.c,v 0.8.4.13 1993/01/23 18:00:11 bir7 Exp $
16 * $Id: dev.h,v 0.8.4.7 1993/01/23 18:00:11 bir7 Exp $
17 * $Id: eth.c,v 0.8.4.4 1993/01/22 23:21:38 bir7 Exp $
18 * $Id: eth.h,v 0.8.4.1 1992/11/10 00:17:18 bir7 Exp $
19 * $Id: icmp.c,v 0.8.4.9 1993/01/23 18:00:11 bir7 Exp $
20 * $Id: icmp.h,v 0.8.4.2 1992/11/15 14:55:30 bir7 Exp $
21 * $Id: ip.c,v 0.8.4.8 1992/12/12 19:25:04 bir7 Exp $
[all …]
/linux/drivers/clk/versatile/
H A Dclk-icst.c74 * bits of the v PLL divider. Bit 8 is tied low and always zero, in vco_get()
75 * r is hardwired to 22 and output divider s is hardwired to 1 in vco_get()
81 vco->v = val & INTEGRATOR_AP_CM_BITS; in vco_get()
82 vco->r = 22; in vco_get()
89 * access the low eight bits of the v PLL divider. Bit 8 is tied low in vco_get()
96 vco->v = val & INTEGRATOR_AP_SYS_BITS; in vco_get()
106 * bit to 0 yields v = 17, r = 22 and OD = 1, whereas setting the in vco_get()
107 * bit to 1 yields v = 14, r = 14 and OD = 1 giving the frequencies in vco_get()
113 vco->v = divxy ? 17 : 14; in vco_get()
114 vco->r = divxy ? 22 : 14; in vco_get()
[all …]
/linux/tools/testing/selftests/net/forwarding/
H A Drouter_multicast.sh5 # | H1 (v$h1) |
24 # | H2 (v$h2) | | | H3 (v$h3) | |
44 ip route add 198.51.100.16/28 vrf v$h1 nexthop via 198.51.100.1
45 ip route add 198.51.100.32/28 vrf v$h1 nexthop via 198.51.100.1
47 ip route add 2001:db8:2::/64 vrf v$h1 nexthop via 2001:db8:1::1
48 ip route add 2001:db8:3::/64 vrf v$h1 nexthop via 2001:db8:1::1
57 ip route del 2001:db8:3::/64 vrf v$h1
58 ip route del 2001:db8:2::/64 vrf v$h1
60 ip route del 198.51.100.32/28 vrf v$h1
61 ip route del 198.51.100.16/28 vrf v$h1
[all …]
/linux/arch/nios2/kernel/
H A Dmodule.c44 uint32_t v = sym->st_value + rela[i].r_addend; in apply_relocate_add() local
54 *loc += v; in apply_relocate_add()
57 v -= (uint32_t)loc + 4; in apply_relocate_add()
58 if ((int32_t)v > 0x7fff || in apply_relocate_add()
59 (int32_t)v < -(int32_t)0x8000) { in apply_relocate_add()
65 *loc = ((((word >> 22) << 16) | (v & 0xffff)) << 6) | in apply_relocate_add()
69 if (v & 3) { in apply_relocate_add()
74 if ((v >> 28) != ((uint32_t)loc >> 28)) { in apply_relocate_add()
79 *loc = (*loc & 0x3f) | ((v >> 2) << 6); in apply_relocate_add()
83 *loc = ((((word >> 22) << 16) | in apply_relocate_add()
[all …]
/linux/arch/alpha/kernel/
H A Dentry.S76 stq $22, 96($sp)
93 .cfi_rel_offset $22, 96
122 ldq $22, 96($sp)
142 .cfi_restore $22
280 stq $22, 176($sp)
307 .cfi_rel_offset $22, 22*8
339 ldq $22, 176($sp)
366 .cfi_restore $22
691 #define V(n) stt $f##n, FR(n) macro
692 V( 0); V( 1); V( 2); V( 3)
[all …]
/linux/drivers/staging/media/sunxi/cedrus/
H A Dcedrus_regs.h13 #define SHIFT_AND_MASK_BITS(v, h, l) \ argument
14 (((unsigned long)(v) << (l)) & GENMASK(h, l))
38 #define VE_MODE_PIC_WIDTH_IS_4096 BIT(22)
104 #define VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(v) \ argument
105 ((v) ? BIT(7) : 0)
106 #define VE_DEC_MPEG_MP12HDR_FRAME_PRED_FRAME_DCT(v) \ argument
107 ((v) ? BIT(6) : 0)
108 #define VE_DEC_MPEG_MP12HDR_CONCEALMENT_MOTION_VECTORS(v) \ argument
109 ((v) ? BIT(5) : 0)
110 #define VE_DEC_MPEG_MP12HDR_Q_SCALE_TYPE(v) \ argument
[all …]
/linux/drivers/media/platform/verisilicon/
H A Dhantro_g1_regs.h30 #define G1_REG_CONFIG_DEC_STRSWAP32_E BIT(22)
53 #define G1_REG_DEC_CTRL0_PIC_FIELDMODE_E BIT(22)
95 #define G1_REG_DEC_CTRL2_RANGE_RED_FRM_E BIT(22)
252 #define G1_REG_REF_PIC_QUANT_DELTA_1(x) (((x) & 0x1f) << 22)
273 #define G1_REG_BD_REF_PIC_QUANT_DELTA_3(x) (((x) & 0x1f) << 22)
288 #define G1_REG_PRED_FLT_PRED_BC_TAP_0_0(x) (((x) & 0x3ff) << 22)
313 #define G1_REG_PP_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24)) argument
314 #define G1_REG_PP_AXI_WR_ID(v) (((v) << 16) & GENMASK(23, 16)) argument
315 #define G1_REG_PP_INSWAP32_E(v) ((v) ? BIT(10) : 0) argument
316 #define G1_REG_PP_DATA_DISC_E(v) ((v) ? BIT(9) : 0) argument
[all …]
H A Drockchip_vpu2_hw_h264_dec.c28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
36 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
37 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
39 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
40 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
[all …]
H A Dhantro_g1_mpeg2_dec.c25 #define G1_REG_DEC_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24)) argument
26 #define G1_REG_DEC_TIMEOUT_E(v) ((v) ? BIT(23) : 0) argument
27 #define G1_REG_DEC_STRSWAP32_E(v) ((v) ? BIT(22) : 0) argument
28 #define G1_REG_DEC_STRENDIAN_E(v) ((v) ? BIT(21) : 0) argument
29 #define G1_REG_DEC_INSWAP32_E(v) ((v) ? BIT(20) : 0) argument
30 #define G1_REG_DEC_OUTSWAP32_E(v) ((v) ? BIT(19) : 0) argument
31 #define G1_REG_DEC_DATA_DISC_E(v) ((v) ? BIT(18) : 0) argument
32 #define G1_REG_DEC_LATENCY(v) (((v) << 11) & GENMASK(16, 11)) argument
33 #define G1_REG_DEC_CLK_GATE_E(v) ((v) ? BIT(10) : 0) argument
34 #define G1_REG_DEC_IN_ENDIAN(v) ((v) ? BIT(9) : 0) argument
[all …]
/linux/include/linux/spi/
H A Dmxs-spi.h26 #define BP_SSP_CTRL0_BUS_WIDTH 22
27 #define BM_SSP_CTRL0_BUS_WIDTH (0x3 << 22)
37 #define BM_SSP_CMD0_SLOW_CLKING_EN (1 << 22)
58 #define BF_SSP_TIMING_CLOCK_DIVIDE(v) \ argument
59 (((v) << 8) & BM_SSP_TIMING_CLOCK_DIVIDE)
62 #define BF_SSP_TIMING_CLOCK_RATE(v) \ argument
63 (((v) << 0) & BM_SSP_TIMING_CLOCK_RATE)
74 #define BM_SSP_CTRL1_DATA_CRC_IRQ_EN (1 << 22)
86 #define BF_SSP_CTRL1_WORD_LENGTH(v) \ argument
87 (((v) << 4) & BM_SSP_CTRL1_WORD_LENGTH)
[all …]
/linux/drivers/comedi/drivers/
H A Ddac02.c35 * 0 to 5V 0 21 to 22 24
37 * 0 to 10V 0 20 to 22 24
39 * +/-5V 0 21 to 22 23
41 * +/-10V 0 20 to 22 23
43 * 4 to 20mA 0 21 to 22 25
45 * AC reference 0 In on pin 22 24 (2-quadrant)
46 * In on pin 22 23 (4-quadrant)
/linux/Documentation/fb/
H A Dviafb.modes29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
74 # D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz
95 # D: 43.163 MHz, H: 50.900 kHz, V: 100.00 Hz
116 # D: 52.406 MHz, H: 61.800 kHz, V: 120.00 Hz
133 # 22 chars 18 lines
137 # D: 26.880 MHz, H: 30.000 kHz, V: 60.24 Hz
158 # D: 29.500 MHz, H: 29.738 kHz, V: 60.00 Hz
179 # D: 32.668 MHz, H: 35.820 kHz, V: 60.00 Hz
[all …]
/linux/tools/testing/selftests/drivers/net/mlxsw/
H A Drif_mac_profiles.sh17 ip route add 198.51.100.0/24 vrf v$h1 nexthop via 192.0.2.2
26 ip route del 198.51.100.0/24 vrf v$h1
33 ip route add 192.0.2.0/24 vrf v$h2 nexthop via 198.51.100.2
42 ip route del 192.0.2.0/24 vrf v$h2
192 ip link set dev $rp2 addr 00:11:22:33:44:55
196 ip link set dev $rp2 address 00:22:22:22:22:22
H A Drtnetlink.sh99 ip link set dev d addr 00:11:22:33:44:55
107 ip link set dev $swp2 addr 00:11:22:33:44:55
564 ip -4 route add 198.51.100.0/24 vrf v$swp1 \
566 ip -6 route add 2001:db8:2::/64 vrf v$swp1 \
570 ip -4 route show 198.51.100.0/24 vrf v$swp1
573 ip -6 route show 2001:db8:2::/64 vrf v$swp1
580 ip -4 route show 198.51.100.0/24 vrf v$swp1
583 ip -6 route show 2001:db8:2::/64 vrf v$swp1
590 ip -4 route show 198.51.100.0/24 vrf v$swp1
593 ip -6 route show 2001:db8:2::/64 vrf v$swp1
[all …]
/linux/drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/
H A Dsun8i_a83t_mipi_csi2_reg.h30 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_SEQ_ERR_DT2 BIT(22)
55 #define SUN8I_A83T_MIPI_CSI2_INT_STA1_LINE_SEQ_ERR_DT6 BIT(22)
85 #define SUN8I_A83T_MIPI_CSI2_INT_MSK0_LINE_SEQ_ERR_DT2 BIT(22)
134 #define SUN8I_A83T_MIPI_CSI2_CFG_SYNC_DLY_CYCLE(v) (((v) << 18) & \ argument
135 GENMASK(22, 18))
136 #define SUN8I_A83T_MIPI_CSI2_CFG_N_CHANNEL(v) ((((v) - 1) << 16) & \ argument
138 #define SUN8I_A83T_MIPI_CSI2_CFG_N_LANE(v) ((((v) - 1) << 4) & \ argument
H A Dsun8i_a83t_dphy.h34 #define SUN8I_A83T_DPHY_ANA0_RINT(v) (((v) << 28) & GENMASK(29, 28)) argument
35 #define SUN8I_A83T_DPHY_ANA0_SNK(v) (((v) << 20) & GENMASK(22, 20)) argument
/linux/drivers/gpu/drm/exynos/
H A Dregs-scaler.h151 #define SCALER_INT_EN_ILLEGAL_DST_HEIGHT (1 << 22)
179 #define SCALER_INT_STATUS_ILLEGAL_DST_HEIGHT (1 << 22)
206 #define SCALER_SRC_CFG_SET_BYTE_SWAP(v) SCALER_SET(v, 6, 5) argument
208 #define SCALER_SRC_CFG_SET_COLOR_FORMAT(v) SCALER_SET(v, 4, 0) argument
227 #define SCALER_YUV422_3P 22
232 #define SCALER_SRC_SPAN_SET_C_SPAN(v) SCALER_SET(v, 29, 16) argument
234 #define SCALER_SRC_SPAN_SET_Y_SPAN(v) SCALER_SET(v, 13, 0) argument
238 #define SCALER_SRC_Y_POS_SET_YH_POS(v) SCALER_SET(v, 31, 16) argument
240 #define SCALER_SRC_Y_POS_SET_YV_POS(v) SCALER_SET(v, 15, 0) argument
244 #define SCALER_SRC_WH_SET_WIDTH(v) SCALER_SET(v, 29, 16) argument
[all …]
/linux/sound/soc/qcom/
H A Dlpass-sc7280.c113 const struct lpass_variant *v = drvdata->variant; in sc7280_lpass_alloc_dma_channel() local
120 v->rdma_channels); in sc7280_lpass_alloc_dma_channel()
122 if (chan >= v->rdma_channels) in sc7280_lpass_alloc_dma_channel()
126 v->wrdma_channel_start + in sc7280_lpass_alloc_dma_channel()
127 v->wrdma_channels, in sc7280_lpass_alloc_dma_channel()
128 v->wrdma_channel_start); in sc7280_lpass_alloc_dma_channel()
130 if (chan >= v->wrdma_channel_start + v->wrdma_channels) in sc7280_lpass_alloc_dma_channel()
137 v->hdmi_rdma_channels); in sc7280_lpass_alloc_dma_channel()
138 if (chan >= v in sc7280_lpass_alloc_dma_channel()
[all...]
/linux/drivers/mtd/nand/raw/gpmi-nand/
H A Dgpmi-regs.h18 #define BF_GPMI_CTRL0_COMMAND_MODE(v) \ argument
19 (((v) << BP_GPMI_CTRL0_COMMAND_MODE) & BM_GPMI_CTRL0_COMMAND_MODE)
34 #define MX23_BP_GPMI_CTRL0_LOCK_CS 22
37 #define BF_GPMI_CTRL0_LOCK_CS(v, x) 0x0 argument
43 #define BF_GPMI_CTRL0_CS(v, x) (((v) << BP_GPMI_CTRL0_CS) & \ argument
50 #define BF_GPMI_CTRL0_ADDRESS(v) \ argument
51 (((v) << BP_GPMI_CTRL0_ADDRESS) & BM_GPMI_CTRL0_ADDRESS)
62 #define BF_GPMI_CTRL0_XFER_COUNT(v) \ argument
63 (((v) << BP_GPMI_CTRL0_XFER_COUNT) & BM_GPMI_CTRL0_XFER_COUNT)
74 #define BF_GPMI_ECCCTRL_ECC_CMD(v) \ argument
[all …]
/linux/drivers/media/pci/solo6x10/
H A Dsolo6x10-regs.h47 #define SOLO_VCLK_INVERT BIT(22)
193 #define SOLO_VI_PB_VSIZE(v) ((v)<<0) argument
245 #define SOLO_VI_MOTION_Y_VALUE(v) ((v)<<16) argument
246 #define SOLO_VI_MOTION_CB_VALUE(v) ((v)<<8) argument
247 #define SOLO_VI_MOTION_CR_VALUE(v) ((v)<<0) argument
265 #define SOLO_VO_H_BLANK(n) ((n)<<22)
270 #define SOLO_VO_V_BLANK(n) ((n)<<22)
277 #define SOLO_VO_VSYNC_INVERT BIT(22)
284 #define SOLO_VO_DISP_DOUBLE_SCAN BIT(22)
294 #define SOLO_VO_ZOOM_V_COMP BIT(22)
[all …]
/linux/tools/usb/
H A Dhcd-tests.sh115 do_test -t 14 -c 15000 -s 256 -v 1
118 do_test -t 21 -c 100 -s 256 -v 1
129 do_test -t 3 -v 421
144 do_test -t 7 -v 579
147 do_test -t 7 -v 41
150 do_test -t 7 -v 63
167 # do_test -t 15 -g 3 -v 0
169 do_test -t 15 -g 8 -v 0
175 echo "test 22: $COUNT transfers, non aligned"
176 do_test -t 22 -g 8 -v 0
[all …]
/linux/arch/mips/kernel/
H A Dbmips_5xxx_init.S43 #define IS_SHIFT 22
58 #define CP0_BRCM_CONFIG0 $22, 0
59 #define CP0_BRCM_MODE $22, 1
130 * i) 0x0: 64, ii) 0x1: 128, iii) 0x2: 256, iv) 0x3: 512, v) 0x4: 1k
175 * 4-way, v) 0x4 - 0x7: Reserved.
223 * i) 0x0: 64, ii) 0x1: 128, iii) 0x2: 256, iv) 0x3: 512, v) 0x4: 1k
266 * 4-way, v) 0x4 - 0x7: Reserved.
554 /* enable read/write of CP0 #22 sel. 8 */
556 .word 0x4088b00f /* mtc0 t0, $22, 15 */
558 .word 0x4008b008 /* mfc0 t0, $22, 8 */
[all …]
/linux/tools/testing/selftests/hid/tests/
H A Dtest_tablet.py625 for v in self.parsed_rdesc.feature_reports.values():
626 if v.report_ID == rnum:
627 rdesc = v
639 for v in self.parsed_rdesc.feature_reports.values():
640 if v.report_ID == rnum:
641 rdesc = v
727 [pytest.param(v, id=k) for k, v in PenState.legal_transitions().items()],
740 pytest.param(v, id=k)
741 for k, v in PenState.tolerated_transitions().items()
758 pytest.param(v, id=k)
[all …]
/linux/include/linux/usb/
H A Dpd_vdo.h118 * <22:21> :: connector type (SVDM version 2.0+ only; set to zero in version 1.0)
147 #define IDH_CONN_MASK GENMASK(22, 21)
184 * <23:22> :: Connector type (10b == receptacle, 11b == captive plug)
237 (((ver) & 0x7) << 29 | ((cap) & 0xf) << 24 | ((conn) & 0x3) << 22 \
247 * <23:22> :: Connector type (10b == receptacle, 11b == captive plug)
261 (((ver) & 0x7) << 29 | ((cap) & 0x7) << 24 | ((conn) & 0x3) << 22 \
293 * <10:9> :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V)
309 * <10:9> :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V)
479 * <16:15> :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V)
/linux/arch/powerpc/perf/
H A Disa207-common.h44 #define EVENT_COMBINE(v) (((v) >> EVENT_COMBINE_SHIFT) & EVENT_COMBINE_MASK) argument
75 #define p9_EVENT_COMBINE(v) (((v) >> p9_EVENT_COMBINE_SHIFT) & p9_EVENT_COMBINE_MASK) argument
78 #define p9_SDAR_MODE(v) (((v) >> p9_SDAR_MODE_SHIFT) & p9_SDAR_MODE_MASK) argument
93 #define p10_SDAR_MODE_SHIFT 22
95 #define p10_SDAR_MODE(v) (((v) >> p10_SDAR_MODE_SHIFT) & \ argument
149 #define CNST_FAB_MATCH_VAL(v) (((v) & EVENT_THR_CTL_MASK) << 56) argument
153 #define CNST_THRESH_VAL(v) (((v) & EVENT_THRESH_MASK) << 32) argument
156 #define CNST_THRESH_CTL_SEL_VAL(v) (((v) & 0x7ffull) << 32) argument
159 #define p10_CNST_THRESH_CMP_VAL(v) (((v) & 0x7ffull) << 43) argument
162 #define CNST_EBB_VAL(v) (((v) & EVENT_EBB_MASK) << 24) argument
[all …]

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