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/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dmpic.txt8 notable difference from Open PIC binding is the addition of 2
14 - compatible
22 - reg
24 Value type: <prop-encoded-array>
29 - interrupt-controller
35 - #interrupt-cells
38 Definition: Shall be 2 or 4. A value of 2 means that interrupt
39 specifiers do not contain the interrupt-type or type-specific
42 - #address-cells
47 - pic-no-reset
[all …]
H A Ddma.txt4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
9 - compatible : must include "fsl,elo-dma"
10 - reg : DMA General Status Register, i.e. DGSR which contains
12 - ranges : describes the mapping between the address space of the
14 - cell-index : controller index. 0 for controller @ 0x8100
15 - interrupts : interrupt specifier for DMA IRQ
17 - DMA channel nodes:
18 - compatible : must include "fsl,elo-dma-channel"
20 - reg : DMA channel specific registers
21 - cell-index : DMA channel index starts at 0.
[all …]
/linux/Documentation/devicetree/bindings/mips/cavium/
H A Dbootbus.txt7 - compatible: "cavium,octeon-3860-bootbus"
11 - reg: The base address of the Boot Bus' register bank.
13 - #address-cells: Must be <2>. The first cell is the chip select
14 within the bootbus. The second cell is the offset from the chip select.
16 - #size-cells: Must be <1>.
18 - ranges: There must be one one triplet of (child-bus-address,
19 parent-bus-address, length) for each active chip select. If the
27 - compatible: "cavium,octeon-3860-bootbus-config"
29 - cavium,cs-index: A single cell indicating the chip select that
32 - cavium,t-adr: A cell specifying the ADR timing (in nS).
[all …]
/linux/arch/powerpc/boot/dts/fsl/
H A Dt4240si-post.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
20 * Foundation, either version 2 of that License or (at your option) any
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 #address-cells = <2>;
52 #size-cells = <1>;
[all …]
H A Dqoriq-qman1-portals.dtsi4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
20 * Foundation, either version 2 of that License or (at your option) any
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "simple-bus";
40 qportal0: qman-portal@0 {
41 compatible = "fsl,qman-portal";
43 interrupts = <104 2 0 0>;
44 cell-index = <0x0>;
46 qportal1: qman-portal@4000 {
[all …]
H A Db4860si-post.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
20 * Foundation, either version 2 of that License or (at your option) any
35 /include/ "b4si-post.dtsi"
39 compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4";
44 interrupts = <16 2 1 20>;
45 #address-cells = <2>;
46 #size-cells = <2>;
47 fsl,iommu-parent = <&pamu0>;
51 #address-cells = <2>;
52 #size-cells = <2>;
[all …]
H A Dqoriq-fman-1.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
20 * Foundation, either version 2 of that License or (at your option) any
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <1>;
42 interrupts = <97 2 0 0>, <16 2 1 0>;
44 clock-names = "fmanclk";
45 fsl,qman-channel-range = <0x60 0xc>;
46 ptimer-handle = <&ptp_timer1>;
49 compatible = "fsl,fman-muram";
[all …]
H A Dqoriq-fman-0.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
20 * Foundation, either version 2 of that License or (at your option) any
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <0>;
42 interrupts = <96 2 0 0>, <16 2 1 1>;
44 clock-names = "fmanclk";
45 fsl,qman-channel-range = <0x40 0xc>;
46 ptimer-handle = <&ptp_timer0>;
49 compatible = "fsl,fman-muram";
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dibm,emac.txt8 correct clock-frequency property.
13 - device_type : "network"
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
22 - local-mac-address : 6 bytes, MAC address
23 - mal-device : phandle of the associated McMAL node
24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
[all …]
H A Dfsl,fman.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
13 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
19 - fsl,fman
26 cell-index:
31 The cell-index value may be used by the SoC, to identify the
33 there's a description of the cell-index use in each SoC:
35 - P1023:
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dstericsson,u8500-clks.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/stericsson,u8500-clks.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsson DB8500 (U8500) clocks
10 - Ulf Hansson <ulf.hansson@linaro.org>
11 - Linus Walleij <linus.walleij@linaro.org>
14 DB8500 digital baseband system-on-chip and its siblings such as
16 itself, not off-chip clocks. There are four different on-chip
17 clocks - RTC (32 kHz), CPU clock (SMP TWD), PRCMU (power reset and
[all …]
/linux/drivers/staging/media/atomisp/pci/
H A Disp2400_support.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * version 2, as published by the Free Software Foundation.
25 #define hrt_isp_vamem1_store_16(cell, addr, val) hrt_mem_store_16(cell, HRT_PROC_TYPE_PROP(cell, _s… argument
26 #define hrt_isp_vamem2_store_16(cell, addr, val) hrt_mem_store_16(cell, HRT_PROC_TYPE_PROP(cell, _s… argument
28 #define hrt_isp_dmem(cell) HRT_PROC_TYPE_PROP(cell, _base_dmem) argument
29 #define hrt_isp_vmem(cell) HRT_PROC_TYPE_PROP(cell, _simd_vmem) argument
31 #define hrt_isp_dmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_dmem(cell)) argument
32 #define hrt_isp_vmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_vmem(cell)) argument
35 #define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram) argument
36 #define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell)) argument
/linux/arch/powerpc/boot/dts/
H A Dfsp2.dts7 * License version 2. This program is licensed "as is" without
12 /dts-v1/;
15 #address-cells = <2>;
16 #size-cells = <1>;
19 dcr-parent = <&{/cpus/cpu@0}>;
28 #address-cells = <1>;
29 #size-cells = <0>;
35 clock-frequency = <0>; /* Filled in by cuboot */
36 timebase-frequency = <0>; /* Filled in by cuboot */
37 i-cache-line-size = <32>;
[all …]
H A Dmpc836x_rdk.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright 2007-2008 MontaVista Software, Inc.
11 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <0>;
37 d-cache-line-size = <32>;
38 i-cache-line-size = <32>;
39 d-cache-size = <32768>;
[all …]
H A Dtqm8540.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
28 #address-cells = <1>;
29 #size-cells = <0>;
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>;
37 i-cache-size = <32768>;
[all …]
H A Dxcalibur1501.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 * XCalibur1501 6U CompactPCI single-board computer based on MPC8572E
9 /dts-v1/;
13 #address-cells = <2>;
14 #size-cells = <2>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>; // 32 bytes
34 i-cache-line-size = <32>; // 32 bytes
35 d-cache-size = <0x8000>; // L1, 32K
[all …]
H A Dasp834x-redboot.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
12 compatible = "analogue-and-micro,asp8347e";
13 #address-cells = <1>;
14 #size-cells = <1>;
24 #address-cells = <1>;
25 #size-cells = <0>;
30 d-cache-line-size = <32>;
31 i-cache-line-size = <32>;
32 d-cache-size = <32768>;
[all …]
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dcdns,xtensa-pic.txt1 * Xtensa built-in Programmable Interrupt Controller (PIC)
4 - compatible: Should be "cdns,xtensa-pic".
5 - interrupt-controller: Identifies the node as an interrupt controller.
6 - #interrupt-cells: The number of cells to define the interrupts.
7 It may be either 1 or 2.
8 When it's 1, the first cell is the internal IRQ number.
9 When it's 2, the first cell is the IRQ number, and the second cell
18 compatible = "cdns,xtensa-pic";
19 /* one cell: internal irq number,
20 * two cells: second cell == 0: internal irq number
[all …]
/linux/drivers/mfd/
H A Dmfd-core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/mfd/mfd-core.c
46 if (!acpi_match_device_ids(adev, wd->ids)) { in match_device_ids()
47 wd->adev = adev; in match_device_ids()
54 static void mfd_acpi_add_device(const struct mfd_cell *cell, in mfd_acpi_add_device() argument
57 const struct mfd_cell_acpi_match *match = cell->acpi_match; in mfd_acpi_add_device()
61 parent = ACPI_COMPANION(pdev->dev.parent); in mfd_acpi_add_device()
71 * though at least Intel Galileo Gen 2 is using it to distinguish in mfd_acpi_add_device()
75 if (match->pnpid) { in mfd_acpi_add_device()
76 struct acpi_device_id ids[2] = {}; in mfd_acpi_add_device()
[all …]
/linux/fs/afs/
H A Dproc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
37 struct afs_cell *cell; in afs_proc_cells_show() local
45 cell = list_entry(v, struct afs_cell, proc_link); in afs_proc_cells_show()
46 vllist = rcu_dereference(cell->vl_servers); in afs_proc_cells_show()
48 /* display one cell per line on subsequent lines */ in afs_proc_cells_show()
49 seq_printf(m, "%3u %3u %6lld %2u %2u %s\n", in afs_proc_cells_show()
50 refcount_read(&cell->ref), in afs_proc_cells_show()
51 atomic_read(&cell->active), in afs_proc_cells_show()
52 cell->dns_expiry - ktime_get_real_seconds(), in afs_proc_cells_show()
53 vllist ? vllist->nr_servers : 0, in afs_proc_cells_show()
[all …]
H A Dmntpt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
46 static const char afs_root_volume[] = "root.cell";
56 return ERR_PTR(-EREMOTE); in afs_mntpt_lookup()
65 return -EREMOTE; in afs_mntpt_open()
73 struct afs_fs_context *ctx = fc->fs_private; in afs_mntpt_set_params()
74 struct afs_super_info *src_as = AFS_FS_S(mntpt->d_sb); in afs_mntpt_set_params()
76 struct afs_cell *cell; in afs_mntpt_set_params() local
80 if (fc->net_ns != src_as->net_ns) { in afs_mntpt_set_params()
81 put_net(fc->net_ns); in afs_mntpt_set_params()
82 fc->net_ns = get_net(src_as->net_ns); in afs_mntpt_set_params()
[all …]
H A Dcell.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* AFS cell and server record management
15 #include <keys/rxrpc-type.h>
28 if (atomic_dec_and_test(&net->cells_outstanding)) in afs_dec_cells_outstanding()
29 wake_up_var(&net->cells_outstanding); in afs_dec_cells_outstanding()
33 * Set the cell timer to fire after a given delay, assuming it's not already
38 if (net->live) { in afs_set_cell_timer()
39 atomic_inc(&net->cells_outstanding); in afs_set_cell_timer()
40 if (timer_reduce(&net->cells_timer, jiffies + delay * HZ)) in afs_set_cell_timer()
48 * Look up and get an activation reference on a cell record. The caller must
[all …]
/linux/sound/core/seq/
H A Dseq_memory.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 return pool->total_elements - atomic_read(&pool->counter); in snd_seq_pool_available()
29 return snd_seq_pool_available(pool) >= pool->room; in snd_seq_output_ok()
40 * 2) user space
49 * ext.data.ptr = the additiona cell head
50 * -> cell.next -> cell.next -> ..
60 if ((event->flags & SNDRV_SEQ_EVENT_LENGTH_MASK) != SNDRV_SEQ_EVENT_LENGTH_VARIABLE) in get_var_len()
61 return -EINVAL; in get_var_len()
63 return event->data.ext.len & ~SNDRV_SEQ_EXT_MASK; in get_var_len()
71 struct snd_seq_event_cell *cell; in dump_var_event() local
[all …]
/linux/Documentation/devicetree/bindings/thermal/
H A Dsprd-thermal.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/sprd-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
14 $ref: thermal-sensor.yaml#
18 const: sprd,ums512-thermal
26 clock-names:
[all …]
/linux/drivers/md/
H A Ddm-bio-prison-v1.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2011-2017 Red Hat, Inc.
11 #include "persistent-data/dm-block-manager.h" /* FIXME: for dm_block_t */
12 #include "dm-thin-metadata.h" /* FIXME: for dm_thin_id */
17 /*----------------------------------------------------------------*/
21 * where they can't cause any mischief. Bios are put in a cell identified
22 * by a key, multiple bios can be in the same cell. When the cell is
38 * The range of a key (block_end - block_begin) must not
42 * Must be a power of 2.
65 * Eventually all bio prison clients should manage their own cell memory.
[all …]

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