/linux/arch/arm/boot/dts/arm/ |
H A D | arm-realview-pbx-a9.dts | 35 #address-cells = <1>; 55 CPU1: cpu@1 { 77 arm,tag-latency = <1 1 1>; 78 arm,data-latency = <1 1 1>; 81 scu: scu@1f000000 { 86 twd_timer: timer@1f000600 { 90 interrupts = <1 13 0xf04>; 93 twd_wdog: watchdog@1f000620 { 97 interrupts = <1 14 0xf04>; 109 intc: interrupt-controller@1f000000 { [all …]
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/linux/Documentation/devicetree/bindings/spi/ |
H A D | spi-ath79.txt | 8 - #address-cells: <1>, as required by generic SPI binding. 15 spi@1f000000 { 22 #address-cells = <1>;
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H A D | mikrotik,rb4xx-spi.yaml | 21 maxItems: 1 31 spi: spi@1f000000 { 32 #address-cells = <1>;
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H A D | qca,ar934x-spi.yaml | 20 maxItems: 1 23 maxItems: 1 37 spi: spi@1f000000 { 41 #address-cells = <1>;
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/linux/arch/arm64/boot/dts/arm/ |
H A D | foundation-v8-gicv3.dtsi | 8 gic: interrupt-controller@2f000000 { 11 #address-cells = <1>; 12 #size-cells = <1>; 25 #msi-cells = <1>;
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H A D | morello-sdp.dts | 36 i2c0: i2c@1c0f0000 { 42 #address-cells = <1>; 65 iommus = <&smmu_dp 0>, <&smmu_dp 1>, <&smmu_dp 2>, <&smmu_dp 3>, 68 #address-cells = <1>; 83 smmu_ccix: iommu@4f000000 { 93 #iommu-cells = <1>; 107 #iommu-cells = <1>; 123 #interrupt-cells = <1>; 125 interrupt-map = <0 0 0 1 &gic 0 0 0 169 IRQ_TYPE_LEVEL_HIGH>, 140 linux,pci-domain = <1>; [all …]
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/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | google,goldfish-pic.yaml | 20 maxItems: 1 23 maxItems: 1 28 const: 1 39 interrupt-controller@1f000000 { 43 #interrupt-cells = <1>;
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H A D | arm,gic-v5-iwb.yaml | 39 The 1st cell corresponds to the IWB wire. 44 1 = low-to-high edge triggered 54 maxItems: 1 67 interrupt-controller@2f000000 {
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/linux/arch/mips/boot/dts/ralink/ |
H A D | rt3052_eval.dts | 19 cfi@1f000000 { 25 #address-cells = <1>; 26 #size-cells = <1>;
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8qm-ss-hsio.dtsi | 12 #address-cells = <1>; 13 #size-cells = <1>; 15 pcie0: pciea: pcie@5f000000 { 22 #interrupt-cells = <1>; 33 interrupt-map = <0 0 0 1 &gic 0 73 4>, 38 num-lanes = <1>; 45 pcie0_ep: pciea_ep: pcie-ep@5f000000 { 50 num-lanes = <1>; 71 #interrupt-cells = <1>; 83 interrupt-map = <0 0 0 1 &gic 0 105 4>, [all …]
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H A D | imx8-ss-hsio.dtsi | 34 enable-gpios = <&lsio_gpio4 1 GPIO_ACTIVE_LOW>; 44 hsio_subsys: bus@5f000000 { 48 #address-cells = <1>; 49 #size-cells = <1>; 59 #interrupt-cells = <1>; 71 interrupt-map = <0 0 0 1 &gic 0 105 4>, 76 num-lanes = <1>; 88 num-lanes = <1>; 106 #clock-cells = <1>; 118 #clock-cells = <1>; [all …]
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/linux/arch/arm64/boot/dts/marvell/ |
H A D | ac5-98dx25xx.dtsi | 42 cpu1: cpu@1 { 81 bus@7f000000 { 82 #address-cells = <1>; 83 #size-cells = <1>; 94 reg-io-width = <1>; 104 reg-io-width = <1>; 114 reg-io-width = <1>; 124 reg-io-width = <1>; 130 #address-cells = <1>; 140 #address-cells = <1>; [all …]
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/linux/arch/arm/boot/dts/aspeed/ |
H A D | aspeed-bmc-supermicro-x11spi.dts | 22 #address-cells = <1>; 23 #size-cells = <1>; 26 vga_memory: framebuffer@7f000000 { 34 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
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H A D | aspeed-bmc-intel-s2600wf.dts | 21 #address-cells = <1>; 22 #size-cells = <1>; 25 vga_memory: framebuffer@9f000000 { 33 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
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H A D | aspeed-bmc-inspur-on5263m5.dts | 22 #address-cells = <1>; 23 #size-cells = <1>; 26 vga_memory: framebuffer@9f000000 { 36 gpios = <&gpio ASPEED_GPIO(I, 1) GPIO_ACTIVE_LOW>; 43 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, 136 fan@1 {
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H A D | aspeed-bmc-microsoft-olympus.dts | 22 #address-cells = <1>; 23 #size-cells = <1>; 26 vga_memory: framebuffer@5f000000 { 52 gpios = <&gpio ASPEED_GPIO(A, 1) GPIO_ACTIVE_LOW>; 59 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, 182 fan@1 {
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H A D | aspeed-bmc-opp-vesnin.dts | 22 #address-cells = <1>; 23 #size-cells = <1>; 26 vga_memory: framebuffer@5f000000 { 43 gpios = <&gpio ASPEED_GPIO(N, 1) GPIO_ACTIVE_LOW>; 47 gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>; 89 flash@1 {
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/linux/arch/mips/boot/dts/mti/ |
H A D | malta.dts | 12 #address-cells = <1>; 13 #size-cells = <1>; 20 #interrupt-cells = <1>; 23 gic: interrupt-controller@1bdc0000 { 40 interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>; 48 #interrupt-cells = <1>; 54 flash@1e000000 { 58 #address-cells = <1>; 59 #size-cells = <1>; 63 #address-cells = <1>; [all …]
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/linux/arch/mips/boot/dts/lantiq/ |
H A D | danube.dtsi | 3 #address-cells = <1>; 4 #size-cells = <1>; 13 biu@1f800000 { 14 #address-cells = <1>; 15 #size-cells = <1>; 21 #interrupt-cells = <1>; 33 sram@1f000000 { 34 #address-cells = <1>; 35 #size-cells = <1>; 41 #interrupt-cells = <1>; [all …]
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/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | qcom,qdu1000-tlmm.yaml | 24 maxItems: 1 27 maxItems: 1 30 minItems: 1 61 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|150)$" 63 minItems: 1 104 pinctrl@f000000 {
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H A D | qcom,sc7280-pinctrl.yaml | 20 maxItems: 1 24 maxItems: 1 27 minItems: 1 58 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-4])$" 61 minItems: 1 113 tlmm: pinctrl@f000000 {
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | mediatek,mt8192-clock.yaml | 41 maxItems: 1 44 const: 1 57 #clock-cells = <1>; 64 #clock-cells = <1>; 71 #clock-cells = <1>; 78 #clock-cells = <1>; 85 #clock-cells = <1>; 92 #clock-cells = <1>; 99 #clock-cells = <1>; 106 #clock-cells = <1>; [all …]
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/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-j722s-main.dtsi | 20 serdes_wiz0: phy@f000000 { 23 #address-cells = <1>; 24 #size-cells = <1>; 26 clocks = <&k3_clks 279 0>, <&k3_clks 279 1>, <&serdes_refclk>; 28 num-lanes = <1>; 29 #reset-cells = <1>; 30 #clock-cells = <1>; 32 assigned-clocks = <&k3_clks 279 1>; 37 serdes0: serdes@f000000 { 49 assigned-clock-parents = <&k3_clks 279 1>, [all …]
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/linux/arch/arm/boot/dts/sigmastar/ |
H A D | mstar-v7.dtsi | 12 #address-cells = <1>; 13 #size-cells = <1>; 17 #address-cells = <1>; 72 clock-mult = <1>; 78 #address-cells = <1>; 79 #size-cells = <1>; 96 riu: bus@1f000000 { 99 #address-cells = <1>; 100 #size-cells = <1>; 103 pmsleep: syscon@1c00 { [all …]
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/linux/arch/arm/boot/dts/marvell/ |
H A D | armada-385-atl-x530.dts | 24 reg = <0x00000000 0x40000000>; /* 1GB */ 50 <&led_7seg_gpio 1 GPIO_ACTIVE_LOW>, 96 bank-width = <1>; 114 pinctrl-1 = <&i2c0_gpio_pins>; 119 #address-cells = <1>; 126 #address-cells = <1>; 131 i2c@1 { 132 #address-cells = <1>; 134 reg = <1>; 148 #address-cells = <1>; [all …]
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