| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | mediatek,ethsys.yaml | 33 maxItems: 1 36 const: 1 39 const: 1 50 clock-controller@1b000000 { 53 #clock-cells = <1>; 54 #reset-cells = <1>;
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| H A D | mediatek,mt8192-clock.yaml | 41 maxItems: 1 44 const: 1 57 #clock-cells = <1>; 64 #clock-cells = <1>; 71 #clock-cells = <1>; 78 #clock-cells = <1>; 85 #clock-cells = <1>; 92 #clock-cells = <1>; 99 #clock-cells = <1>; 106 #clock-cells = <1>; [all …]
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| H A D | mediatek,mt8195-clock.yaml | 53 maxItems: 1 56 const: 1 69 #clock-cells = <1>; 76 #clock-cells = <1>; 83 #clock-cells = <1>; 90 #clock-cells = <1>; 97 #clock-cells = <1>; 104 #clock-cells = <1>; 111 #clock-cells = <1>; 118 #clock-cells = <1>; [all …]
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| /linux/Documentation/devicetree/bindings/display/ |
| H A D | arm,hdlcd.yaml | 24 maxItems: 1 27 maxItems: 1 33 maxItems: 1 37 maxItems: 1 43 maxItems: 1 62 hdlcd@2b000000 { 77 #address-cells = <1>;
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| /linux/arch/powerpc/kernel/ |
| H A D | dawr.c | 31 * doublewords (64 bits) biased by -1 eg. 0b000000=1DW and in set_dawr() 36 mrd = ((brk->hw_len + 7) >> 3) - 1; in set_dawr()
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | realtek,rtl9301-switch.yaml | 31 maxItems: 1 42 const: 1 45 const: 1 70 ethernet-switch@1b000000 { 76 #address-cells = <1>; 77 #size-cells = <1>; 88 #address-cells = <1>; 93 #address-cells = <1>; 105 #address-cells = <1>; 119 #address-cells = <1>; [all …]
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| /linux/arch/mips/boot/dts/realtek/ |
| H A D | rtl930x.dtsi | 6 #address-cells = <1>; 7 #size-cells = <1>; 17 #interrupt-cells = <1>; 22 #address-cells = <1>; 45 switch0: switch@1b000000 { 48 #address-cells = <1>; 49 #size-cells = <1>; 64 #address-cells = <1>; 72 #address-cells = <1>; 80 #address-cells = <1>; [all …]
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| /linux/arch/arm/boot/dts/arm/ |
| H A D | vexpress-v2p-ca15-tc1.dts | 5 * CoreTile Express A15x2 (version with Test Chip 1) 35 #address-cells = <1>; 44 cpu@1 { 47 reg = <1>; 70 hdlcd@2b000000 { 103 interrupts = <1 9 0xf04>; 129 interrupts = <1 13 0xf08>, 130 <1 14 0xf08>, 131 <1 11 0xf08>, 132 <1 10 0xf08>; [all …]
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| H A D | vexpress-v2p-ca15_a7.dts | 35 #address-cells = <1>; 48 cpu1: cpu@1 { 51 reg = <1>; 134 hdlcd@2b000000 { 158 interrupts = <1 9 0xf04>; 163 #address-cells = <1>; 164 #size-cells = <1>; 220 interrupts = <1 13 0xf08>, 221 <1 14 0xf08>, 222 <1 11 0xf08>, [all …]
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| H A D | arm-realview-pb1176.dts | 28 #address-cells = <1>; 29 #size-cells = <1>; 76 clock-mult = <1>; 132 usb@3b000000 { 142 #address-cells = <1>; 146 #address-cells = <1>; 157 port@1 { 158 reg = <1>; 178 #address-cells = <1>; 179 #size-cells = <1>; [all …]
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| /linux/Documentation/devicetree/bindings/remoteproc/ |
| H A D | ti,pru-rproc.yaml | 21 containing the revised ICSSG v1.1 (eg: J721E, AM65x SR2.0) have an extra two 70 maxItems: 1 121 #address-cells = <1>; 122 #size-cells = <1>; 128 #address-cells = <1>; 129 #size-cells = <1>; 163 icssg0: icssg@b000000 { 167 #address-cells = <1>; 168 #size-cells = <1>;
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8-ss-conn.dtsi | 38 conn_subsys: bus@5b000000 { 40 #address-cells = <1>; 41 #size-cells = <1>; 60 #index-cells = <1>; 163 #address-cells = <1>; 164 #size-cells = <1>; 210 #clock-cells = <1>; 224 #clock-cells = <1>; 238 #clock-cells = <1>; 252 #clock-cells = <1>; [all …]
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| /linux/arch/arm/boot/dts/gemini/ |
| H A D | gemini.dtsi | 13 #address-cells = <1>; 14 #size-cells = <1>; 32 #clock-cells = <1>; 33 #reset-cells = <1>; 181 interrupts = <14 IRQ_TYPE_EDGE_FALLING>, /* Timer 1 */ 218 pinctrl-1 = <&sata_and_ide_pins>; 231 power-controller@4b000000 { 292 #interrupt-cells = <1>; 295 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */ 296 <0x4800 0 0 2 &pci_intc 1>, [all …]
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| /linux/arch/arm/boot/dts/mediatek/ |
| H A D | mt7629.dtsi | 19 #address-cells = <1>; 20 #size-cells = <1>; 23 #address-cells = <1>; 35 cpu1: cpu@1 { 58 clk40m: oscillator-1 { 77 #address-cells = <1>; 78 #size-cells = <1>; 84 #clock-cells = <1>; 90 #clock-cells = <1>; 96 #power-domain-cells = <1>; [all …]
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| H A D | mt2701.dtsi | 24 #address-cells = <1>; 33 cpu@1 { 80 rtc32k: oscillator@1 { 102 target: trip-point@1 { 129 #clock-cells = <1>; 135 #clock-cells = <1>; 136 #reset-cells = <1>; 142 #clock-cells = <1>; 143 #reset-cells = <1>; 153 #power-domain-cells = <1>; [all …]
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| H A D | mt7623.dtsi | 72 #address-cells = <1>; 88 cpu1: cpu@1 { 140 rtc32k: oscillator-1 { 231 #clock-cells = <1>; 239 #clock-cells = <1>; 240 #reset-cells = <1>; 248 #clock-cells = <1>; 249 #reset-cells = <1>; 274 #power-domain-cells = <1>; 333 #address-cells = <1>; [all …]
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sdm670-google-sargo.dts | 79 mpss_region: mpss@8b000000 { 141 ts_1p8_supply: ts-1p8-regulator { 318 regulators-1 { 430 #address-cells = <1>; 433 rmi4-f01@1 { 435 syna,nosleep-mode = <1>; 442 syna,sensor-type = <1>; 476 data-lanes = <0 1 2 3>; 503 led-sources = <1>, <2>; 535 mmc-hs200-1_8v; [all …]
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| H A D | sm6125.dtsi | 55 cpu1: cpu@1 { 165 #reset-cells = <1>; 201 #clock-cells = <1>; 208 #power-domain-cells = <1>; 294 modem_mem: memory@4b000000 { 377 #address-cells = <1>; 378 #size-cells = <1>; 385 #hwlock-cells = <1>; 669 #clock-cells = <1>; 670 #reset-cells = <1>; [all …]
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| H A D | msm8917.dtsi | 31 #address-cells = <1>; 165 #reset-cells = <1>; 230 #clock-cells = <1>; 237 #power-domain-cells = <1>; 313 qcom,client-id = <1>; 363 #qcom,smem-state-cells = <1>; 383 qcom,remote-pid = <1>; 388 #qcom,smem-state-cells = <1>; 413 #qcom,smem-state-cells = <1>; 427 #address-cells = <1>; [all …]
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| H A D | msm8937.dtsi | 32 #address-cells = <1>; 52 cpu1: cpu@1 { 179 #reset-cells = <1>; 220 qcom,client-id = <1>; 330 #clock-cells = <1>; 337 #power-domain-cells = <1>; 398 #qcom,smem-state-cells = <1>; 418 qcom,remote-pid = <1>; 423 #qcom,smem-state-cells = <1>; 448 #qcom,smem-state-cells = <1>; [all …]
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| /linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-am62l-main.dtsi | 33 #msi-cells = <1>; 195 #address-cells = <1>; 196 #size-cells = <1>; 199 phy_gmii_sel: phy@1be000 { 202 #phy-cells = <1>; 205 epwm_tbclk: clock-controller@1e9100 { 208 #clock-cells = <1>; 317 #address-cells = <1>; 329 #address-cells = <1>; 341 #address-cells = <1>; [all …]
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| H A D | k3-am62-main.dtsi | 12 #address-cells = <1>; 13 #size-cells = <1>; 40 #msi-cells = <1>; 46 #address-cells = <1>; 47 #size-cells = <1>; 53 #phy-cells = <1>; 59 #clock-cells = <1>; 99 #mbox-cells = <1>; 177 <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */ 232 #mbox-cells = <1>; [all …]
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| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | am33xx.dtsi | 16 #address-cells = <1>; 17 #size-cells = <1>; 46 #address-cells = <1>; 92 /* OPP100-1 */ 122 /* OPP120-1 */ 136 /* OPP Turbo-1 */ 157 target-module@4b000000 { 162 #address-cells = <1>; 163 #size-cells = <1>; 170 #address-cells = <1>; [all …]
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| /linux/arch/mips/boot/dts/img/ |
| H A D | pistachio.dtsi | 16 #address-cells = <1>; 17 #size-cells = <1>; 22 #address-cells = <1>; 58 #address-cells = <1>; 76 #address-cells = <1>; 94 #address-cells = <1>; 112 #address-cells = <1>; 206 img,voltage-select = <1>; 222 #address-cells = <1>; 232 dmas = <&mdc 1 0xffffffff 0>, <&mdc 2 0xffffffff 0>; [all …]
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| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt7622.dtsi | 86 cpu1: cpu@1 { 217 #clock-cells = <1>; 218 #reset-cells = <1>; 237 #clock-cells = <1>; 238 #reset-cells = <1>; 244 #power-domain-cells = <1>; 278 #address-cells = <1>; 279 #size-cells = <1>; 293 #clock-cells = <1>; 299 #clock-cells = <1>; [all …]
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