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/linux/drivers/scsi/qla2xxx/
H A Dqla_mbx.c80 return 1; in is_rom_cmd()
95 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
99 * 1 : QLA_FUNCTION_FAILED (error encountered)
161 mcp->mb[0] = MBS_LINK_DOWN_ERROR; in qla2x00_mailbox_command()
171 !is_rom_cmd(mcp->mb[0])) || ha->flags.eeh_busy) { in qla2x00_mailbox_command()
174 mcp->mb[0]); in qla2x00_mailbox_command()
188 mcp->mb[0]); in qla2x00_mailbox_command()
198 ha->flags.purge_mbox, ha->flags.eeh_busy, mcp->mb[0]); in qla2x00_mailbox_command()
208 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]); in qla2x00_mailbox_command()
218 ha->flags.mbox_busy = 1; in qla2x00_mailbox_command()
[all …]
H A Dqla_isr.c108 rsp_els->entry_count = 1; in qla24xx_process_abts()
137 abts_rsp->entry_count = 1; in qla24xx_process_abts()
143 abts_rsp->d_id[1] = abts->s_id[1]; in qla24xx_process_abts()
147 abts_rsp->s_id[1] = abts->d_id[1]; in qla24xx_process_abts()
154 abts_rsp->f_ctl[1] = fctl >> 8 & 0xff; in qla24xx_process_abts()
349 uint16_t mb[8]; in qla2100_intr_handler() local
393 mb[0] = RD_MAILBOX_REG(ha, reg, 0); in qla2100_intr_handler()
394 if (mb[0] > 0x3fff && mb[0] < 0x8000) { in qla2100_intr_handler()
395 qla2x00_mbx_completion(vha, mb[0]); in qla2100_intr_handler()
397 } else if (mb[0] > 0x7fff && mb[0] < 0xc000) { in qla2100_intr_handler()
[all …]
/linux/drivers/scsi/lpfc/
H A Dlpfc_mbox.c89 * @locked: value that indicates if the hbalock is held (1) or not (0).
136 MAILBOX_t *mb; in lpfc_dump_static_vport() local
140 mb = &pmb->u.mb; in lpfc_dump_static_vport()
144 mb->mbxCommand = MBX_DUMP_MEMORY; in lpfc_dump_static_vport()
145 mb->un.varDmp.type = DMP_NV_PARAMS; in lpfc_dump_static_vport()
146 mb->un.varDmp.entry_index = offset; in lpfc_dump_static_vport()
147 mb->un.varDmp.region_id = DMP_REGION_VPORT; in lpfc_dump_static_vport()
148 mb->mbxOwner = OWN_HOST; in lpfc_dump_static_vport()
152 mb->un.varDmp.cv = 1; in lpfc_dump_static_vport()
153 mb->un.varDmp.word_cnt = DMP_RSP_SIZE/sizeof(uint32_t); in lpfc_dump_static_vport()
[all …]
/linux/drivers/mailbox/
H A Drockchip-mailbox.c38 struct rockchip_mbox *mb; member
54 struct rockchip_mbox *mb = dev_get_drvdata(chan->mbox->dev); in rockchip_mbox_send_data() local
56 struct rockchip_mbox_chan *chans = mb->chans; in rockchip_mbox_send_data()
61 if (msg->rx_size > mb->buf_size) { in rockchip_mbox_send_data()
62 dev_err(mb->mbox.dev, "Transmit size over buf size(%d)\n", in rockchip_mbox_send_data()
63 mb->buf_size); in rockchip_mbox_send_data()
67 dev_dbg(mb->mbox.dev, "Chan[%d]: A2B message, cmd 0x%08x\n", in rockchip_mbox_send_data()
70 mb->chans[chans->idx].msg = msg; in rockchip_mbox_send_data()
72 writel_relaxed(msg->cmd, mb->mbox_base + MAILBOX_A2B_CMD(chans->idx)); in rockchip_mbox_send_data()
73 writel_relaxed(msg->rx_size, mb->mbox_base + in rockchip_mbox_send_data()
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/linux/tools/testing/selftests/mm/
H A Dcharge_reserved_hugetlb.sh21 if [[ "$1" == "-cgroup-v2" ]]; then
22 cgroup2=1
30 cgroup_path=$(mount -t cgroup2 | head -1 | awk '{print $3}')
34 do_umount=1
42 do_umount=1
73 local expected="$1"
80 exit 1
87 mb=$(($kb / 1024))
88 echo $mb
91 MB=$(get_machine_hugepage_size)
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/linux/sound/isa/gus/
H A Dgus_io.c17 mb(); in snd_gf1_delay()
36 mb(); in __snd_gf1_ctrl_stop()
38 mb(); in __snd_gf1_ctrl_stop()
40 mb(); in __snd_gf1_ctrl_stop()
42 mb(); in __snd_gf1_ctrl_stop()
50 mb(); in __snd_gf1_write8()
52 mb(); in __snd_gf1_write8()
59 mb(); in __snd_gf1_look8()
67 mb(); in __snd_gf1_write16()
69 mb(); in __snd_gf1_write16()
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/linux/Documentation/driver-api/cxl/
H A Dtheory-of-operation.rst50 "host":"cxl_host_bridge.1",
54 "host":"cxl_switch_uport.1",
61 "pmem_size":"256.00 MiB (268.44 MB)",
62 "ram_size":"256.00 MiB (268.44 MB)",
64 "numa_node":1,
65 "host":"cxl_mem.1"
73 "pmem_size":"256.00 MiB (268.44 MB)",
74 "ram_size":"256.00 MiB (268.44 MB)",
76 "numa_node":1,
91 "pmem_size":"256.00 MiB (268.44 MB)",
[all …]
/linux/tools/memory-model/
H A Dlinux-kernel.def17 smp_store_mb(X,V) { __store{ONCE}(X,V); __fence{MB}; }
20 smp_mb() { __fence{MB}; }
31 xchg(X,V) __xchg{MB}(X,V)
35 cmpxchg(X,V,W) __cmpxchg{MB}(X,V,W)
71 atomic_inc(X) { __atomic_op{NORETURN}(X,+,1); }
72 atomic_dec(X) { __atomic_op{NORETURN}(X,-,1); }
75 atomic_add_return(V,X) __atomic_op_return{MB}(X,+,V)
79 atomic_fetch_add(V,X) __atomic_fetch_op{MB}(X,+,V)
84 atomic_fetch_and(V,X) __atomic_fetch_op{MB}(X,&,V)
89 atomic_fetch_or(V,X) __atomic_fetch_op{MB}(
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/linux/fs/btrfs/tests/
H A Dfree-space-tests.c41 return -1; in test_extents()
71 return -1; in test_extents()
76 return -1; in test_extents()
81 return -1; in test_extents()
97 ret = test_add_free_space_entry(cache, 0, SZ_4M, 1); in test_bitmaps()
111 return -1; in test_bitmaps()
114 ret = test_add_free_space_entry(cache, 0, SZ_4M, 1); in test_bitmaps()
134 SZ_4M, 1); in test_bitmaps()
149 return -1; in test_bitmaps()
171 ret = test_add_free_space_entry(cache, SZ_4M, SZ_1M, 1); in test_bitmaps_and_extents()
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dv3,v360epc-pci.yaml30 maxItems: 1
35 The inbound ranges must be aligned to a 1MB boundary, and may be 1MB, 2MB,
36 4MB, 8MB, 16MB, 32MB, 64MB, 128MB, 256MB, 512MB, 1GB or 2GB in size. The
41 maxItems: 1
46 256MB (0x10000000) in size. The prefetchable memory window must be
64 #interrupt-cells = <1>;
73 … <0x02000000 0 0x40000000 0x40000000 0 0x10000000>, /* 256 MiB @ LB 40000000 1:1 */
74 … <0x42000000 0 0x50000000 0x50000000 0 0x10000000>; /* 256 MiB @ LB 50000000 1:1 */
75 …dma-ranges = <0x02000000 0 0x20000000 0x20000000 0 0x20000000>, /* EBI: 512 MB @ LB 20000000 1:1 */
76 … <0x02000000 0 0x80000000 0x80000000 0 0x40000000>; /* CM alias: 1GB @ LB 80000000 */
[all …]
/linux/drivers/net/ethernet/apple/
H A Dmace.c29 static int port_aaui = -1;
33 #define MAX_TX_ACTIVE 1
34 #define NCMDS_TX 1 /* dma commands per element in tx ring */
36 #define TX_TIMEOUT HZ /* 1 second */
168 rev = addr[0] == 0 && addr[1] == 0xA0; in mace_probe()
180 mp->tx_dma = ioremap(macio_resource_start(mdev, 1), 0x1000); in mace_probe()
186 mp->tx_dma_intr = macio_irq(mdev, 1); in mace_probe()
196 mp->tx_cmds = (volatile struct dbdma_cmd *) DBDMA_ALIGN(mp + 1); in mace_probe()
197 mp->rx_cmds = mp->tx_cmds + NCMDS_TX * N_TX_RING + 1; in mace_probe()
210 mp->port_aaui = 1; in mace_probe()
[all …]
/linux/tools/perf/Documentation/
H A Dperf-iostat.txt1 perf-iostat(1)
18 - Inbound Read - I/O devices below root port read from the host memory, in MB
20 - Inbound Write - I/O devices below root port write to the host memory, in MB
22 - Outbound Read - CPU reads from I/O devices below root port, in MB
24 - Outbound Write - CPU writes to I/O devices below root port, in MB
40 1. List all PCIe root ports (example for 2-S platform):
54 $ perf iostat -- dd if=/dev/zero of=/dev/nvme0n1 bs=1M oflag=direct
61 … port Inbound Read(MB) Inbound Write(MB) Outbound Read(MB) Outbound Write(MB)
62 0000:00 1 0 2 3
73 $ perf iostat 0000:17,0:3a -- dd if=/dev/zero of=/dev/nvme0n1 bs=1M oflag=direct
[all …]
/linux/arch/parisc/include/asm/
H A Dassembly.h52 #define SR_TEMP1 1
62 #define LDREGM ldd,mb
125 ldil L%\value, 1
126 ldo R%\value(1), 1
127 addib,UV,n -1,1,.
128 addib,NUV,n -1,1,.+8
314 fldd,mb -8(\regs), %fr30
315 fldd,mb -8(\regs), %fr29
316 fldd,mb -8(\regs), %fr28
317 fldd,mb -8(\regs), %fr27
[all …]
H A Dbarrier.h16 #define mb() do { synchronize_caches(); } while (0) macro
17 #define rmb() mb()
18 #define wmb() mb()
19 #define dma_rmb() mb()
20 #define dma_wmb() mb()
22 #define mb() barrier() macro
29 #define __smp_mb() mb()
30 #define __smp_rmb() mb()
31 #define __smp_wmb() mb()
36 union { typeof(*p) __val; char __c[1]; } __u = \
[all …]
/linux/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/
H A Dtlb.json47 … "BriefDescription": "This event counts operations that cause a TLB access to the L1I in 2MB page."
52 …"BriefDescription": "This event counts operations that cause a TLB access to the L1I in 32MB page."
57 …BriefDescription": "This event counts operations that cause a TLB access to the L1I in 512MB page."
62 … "BriefDescription": "This event counts operations that cause a TLB access to the L1I in 1GB page."
82 … "BriefDescription": "This event counts operations that cause a TLB access to the L1D in 2MB page."
87 …"BriefDescription": "This event counts operations that cause a TLB access to the L1D in 32MB page."
92 …BriefDescription": "This event counts operations that cause a TLB access to the L1D in 512MB page."
97 … "BriefDescription": "This event counts operations that cause a TLB access to the L1D in 1GB page."
117 … "BriefDescription": "This event counts operations that cause a TLB refill of the L1I in 2MB page."
122 …"BriefDescription": "This event counts operations that cause a TLB refill of the L1I in 32MB page."
[all …]
/linux/arch/alpha/kernel/
H A Dcore_t2.c40 * floppy to DMA only via the scatter/gather window set up for 8MB
41 * ISA DMA, since the maximum ISA DMA address is 2GB-1.
44 * have less than 1GB of memory, floppy usage/performance will not
47 #define T2_DIRECTMAP_2G 1
62 * NOTE: Herein lie back-to-back mb instructions. They are magic.
107 * 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
108 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
117 * Type 1:
119 * 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
120 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
[all …]
H A Dcore_mcpcia.c27 * NOTE: Herein lie back-to-back mb instructions. They are magic.
53 * 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
54 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
63 * Type 1:
65 * 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
66 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
68 * | | | | | | | | | | |B|B|B|B|B|B|B|B|D|D|D|D|D|F|F|F|R|R|R|R|R|R|0|1|
104 mb(); in conf_read()
108 mb(); in conf_read()
110 mcheck_expected(cpu) = 1; in conf_read()
[all …]
H A Dio.c20 mb(); in ioread8()
22 mb(); in ioread8()
29 mb(); in ioread16()
31 mb(); in ioread16()
38 mb(); in ioread32()
40 mb(); in ioread32()
47 mb(); in ioread64()
49 mb(); in ioread64()
55 mb(); in iowrite8()
61 mb(); in iowrite16()
[all …]
/linux/tools/testing/selftests/cgroup/
H A Dtest_memcontrol.c52 return -1; in test_memcg_subtree_control()
76 return -1; in test_memcg_subtree_control()
81 return cnt > 1; in test_memcg_subtree_control()
173 size_t size = MB(50); in test_memcg_current_peak()
176 int ret = -1; in test_memcg_current_peak()
181 return -1; in test_memcg_current_peak()
209 size_t size = MB(50); in test_memcg_current_peak()
210 int ret = -1; in test_memcg_current_peak()
216 return -1; in test_memcg_current_peak()
250 int peak_fd = -1, peak_fd in test_memcg_current_peak()
[all...]
/linux/arch/microblaze/kernel/
H A Dhead.S53 .word 1
86 /* Save 1 as word and load byte - 0 - BIG, 1 - LITTLE */
117 ori r3, r0, COMMAND_LINE_SIZE - 1 /* number of loops */
123 addik r11, r11, 1 /* increment counting */
125 addik r3, r3, -1 /* decrement loop */
147 * kernel initialization. This maps the first 16 MBytes of memory 1:1
151 addik r3, r0, MICROBLAZE_TLB_SIZE -1 /* Invalidate all TLB entries */
157 addik r3, r3, -1
184 bgei r11, GT16 /* size is greater than 16MB */
186 bgei r11, GT8 /* size is greater than 8MB */
[all …]
/linux/net/can/
H A Dgw.c10 * 1. Redistributions of source code must retain the above copyright
69 #define CGW_MIN_HOPS 1
71 #define CGW_DEFAULT_HOPS 1
297 * relative to received dlc -1 .. -8 : in cgw_chk_csum_parms()
299 * -1 => index = 7 (data[7]) in cgw_chk_csum_parms()
390 crc = crc8->crctab[crc ^ crc8->profile_data[cf->data[1] & 0xF]]; in cgw_csum_crc8_rel()
417 crc = crc8->crctab[crc ^ crc8->profile_data[cf->data[1] & 0xF]]; in cgw_csum_crc8_pos()
444 crc = crc8->crctab[crc ^ crc8->profile_data[cf->data[1] & 0xF]]; in cgw_csum_crc8_neg()
522 cgw_hops(nskb) = cgw_hops(skb) + 1; in can_can_gw_rcv()
525 if (gwj->limit_hops && cgw_hops(nskb) == 1) in can_can_gw_rcv()
[all …]
/linux/arch/arm/mach-footbridge/include/mach/
H A Dhardware.h13 * 0xff800000 0x40000000 1MB X-Bus
14 * 0xff000000 0x7c000000 1MB PCI I/O space
15 * 0xfe000000 0x42000000 1MB CSR
16 * 0xfd000000 0x78000000 1MB Outbound write flush (not supported)
17 * 0xfc000000 0x79000000 1MB PCI IACK/special space
18 * 0xfb000000 0x7a000000 16MB PCI Config type 1
19 * 0xfa000000 0x7b000000 16MB PCI Config type 0
20 * 0xf9000000 0x50000000 1MB Cache flush
21 * 0xf0000000 0x80000000 16MB ISA memory
49 #define XBUS_SWITCH_J17_13 ((*XBUS_SWITCH) & (1 << 4))
[all …]
/linux/arch/arc/plat-axs10x/
H A Daxs10x.c44 * | snps,dw-apb-intc (MB)| in axs10x_enable_gpio_intc_wire()
55 * DT hardware topology - connect MB intc directly to cpu intc in axs10x_enable_gpio_intc_wire()
67 iowrite32(~(1 << MB_TO_GPIO_IRQ), (void __iomem *) GPIO_INTMASK); in axs10x_enable_gpio_intc_wire()
70 iowrite32(1 << MB_TO_GPIO_IRQ, (void __iomem *) GPIO_INTEN); in axs10x_enable_gpio_intc_wire()
94 char mb[32]; in axs10x_early_init() local
97 if (ioread32((void __iomem *) CREG_MB_CONFIG) & (1 << 28)) in axs10x_early_init()
104 scnprintf(mb, 32, "MainBoard v%d", mb_rev); in axs10x_early_init()
105 axs10x_print_board_ver(CREG_MB_VER, mb); in axs10x_early_init()
121 * Each AXI master has a 4GB memory map specified as 16 apertures of 256MB, each
122 * of which maps to a corresponding 256MB aperture in Target slave memory map.
[all …]
/linux/tools/perf/tests/shell/common/
H A Dpatterns.sh18 export RE_DATE_YYYYMMDD="[0-9]{4}-(?:(?:01|03|05|07|08|10|12)-(?:[0-2][0-9]|3[0-1])|02-[0-2][0-9]|(…
28 export RE_TIME="(?:[0-1][0-9]|2[0-3]):[0-5][0-9]:[0-5][0-9]"
55 export RE_ADDRESS_NOT_NULL="0x[0-9A-Fa-f]*[1-9A-Fa-f]+[0-9A-Fa-f]*"
164 # [ perf record: Woken up 1 times to write data ]
167 export RE_LINE_RECORD2="^\[\s+perf\s+record:\s+Captured and wrote $RE_NUMBER\s*MB\s+(?:[\w\+\.-]*(?…
170 # [ perf record: Captured and wrote 0.405 MB perf.data (109 samples) ]
171 # [ perf record: Captured and wrote 0.405 MB perf.data (~109 samples) ]
172 # [ perf record: Captured and wrote 0.405 MB /some/temp/dir/perf.data (109 samples) ]
173 # [ perf record: Captured and wrote 0.405 MB ./perf.data (109 samples) ]
174 # [ perf record: Captured and wrote 0.405 MB ./perf.data.3 (109 samples) ]
[all …]
/linux/drivers/net/fddi/skfp/
H A Dhwmtm.c70 static void queue_llc_rx(struct s_smc *smc, SMbuf *mb);
71 static void smt_to_llc(struct s_smc *smc, SMbuf *mb);
74 static void queue_txd_mb(struct s_smc *smc, SMbuf *mb);
133 void smt_free_mbuf(struct s_smc *smc, SMbuf *mb);
181 #define EXT_VIRT_MEM ((RXD_TXD_COUNT+1)*sizeof(struct s_smt_fp_txd) +\
183 #define EXT_VIRT_MEM_2 ((RXD_TXD_COUNT+1)*sizeof(struct s_smt_fp_txd))
185 #define EXT_VIRT_MEM ((RXD_TXD_COUNT+1)*sizeof(struct s_smt_fp_txd))
226 if (call_count == 1) { in mac_drv_check_space()
265 (RXD_TXD_COUNT+1)*sizeof(struct s_smt_fp_txd)))) { in mac_drv_init()
266 return 1; /* no space the hwm modul can't work */ in mac_drv_init()
[all …]

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