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/linux/arch/arm64/crypto/
H A Dsha512-ce-core.S15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19
85 ld1 {v\rc1\().2d}, [x4], #16
87 add v5.2d, v\rc0\().2d, v\in0\().2d
88 ext v6.16b, v\i2\().16b, v\i3\().16b, #8
90 ext v7.16b, v\i1\().16b, v\i2\().16b, #8
91 add v\i3\().2d, v\i3\().2d, v5.2d
93 ext v5.16b, v\in3\().16b, v\in4\().16b, #8
94 sha512su0 v\in0\().2d, v\in1\().2d
98 sha512su1 v\in0\().2d, v\in2\().2d, v5.2d
100 add v\i4\().2d, v\i1\().2d, v\i3\().2d
[all …]
H A Dsha2-ce-core.S32 add t1.4s, v\s0\().4s, \rc\().4s
37 add t0.4s, v\s0\().4s, \rc\().4s
45 sha256su0 v\s0\().4s, v\s1\().4s
47 sha256su1 v\s0\().4s, v\s2\().4s, v\s3\().4s
106 add_update 0, v1, 16, 17, 18, 19
107 add_update 1, v2, 17, 18, 19, 16
108 add_update 0, v3, 18, 19, 16, 17
109 add_update 1, v4, 19, 16, 17, 18
111 add_update 0, v5, 16, 17, 18, 19
112 add_update 1, v6, 17, 18, 19, 16
[all …]
/linux/arch/alpha/kernel/
H A Dentry.S33 .cfi_rel_offset $17, 32
84 stq $17, 168($sp)
248 mov $sp, $17
462 stq $17, SP_OFF+32($sp)
466 .cfi_rel_offset $17, SP_OFF+32
496 ldl $17, TI_FLAGS($8)
497 and $17, _TIF_WORK_MASK, $2
539 * $17: TI_FLAGS.
548 and $17, _TIF_NOTIFY_RESUME | _TIF_SIGPENDING | _TIF_NOTIFY_SIGNAL, $2
590 ldq $17, SP_OFF+32($sp)
[all …]
/linux/drivers/usb/musb/
H A Dtusb6010.h36 #define TUSB_PHY_OTG_CTRL_TESTM2 (1 << 17)
45 #define TUSB_PHY_OTG_CTRL_PHYREF_CLKSEL(v) (((v) & 3) << 7) argument
69 # define TUSB_DEV_OTG_TIMER_VAL(v) ((v) & 0x07ffffff) argument
75 #define TUSB_PRCM_CONF_SYS_CLKSEL(v) (((v) & 3) << 16) argument
79 #define TUSB_PRCM_MNGMT_SRP_FIX_TIMER(v) (((v) & 0xf) << 25) argument
81 #define TUSB_PRCM_MNGMT_VBUS_VALID_TIMER(v) (((v) & 0xf) << 20) argument
84 #define TUSB_PRCM_MNGMT_VLYNQ_CLK_DIS (1 << 17)
136 #define TUSB_INT_SRC_USB_IP_CORE (1 << 17)
154 #define TUSB_INT_MASK_RESERVED_17 (0x3fff << 17)
188 #define TUSB_INT_CTRL_CONF_INT_RELCYC(v) (((v) & 0x7) << 18) argument
[all …]
/linux/Documentation/hwmon/
H A Dadm1026.rst22 * gpio_input: int array (min = 1, max = 17)
25 * gpio_output: int array (min = 1, max = 17)
28 * gpio_inverted: int array (min = 1, max = 17)
31 * gpio_normal: int array (min = 1, max = 17)
44 The ADM1026 implements three (3) temperature sensors, 17 voltage sensors,
65 There are 17 voltage sensors. An alarm is triggered if the voltage has
69 higher voltages directly. 3.3V, 5V, 12V, -12V and battery voltage all have
70 dedicated inputs. There are several inputs scaled to 0-3V full-scale range
72 a 0-2.5V full-scale range. A 2.5V or 1.82V reference voltage is provided
/linux/drivers/video/fbdev/
H A Dvalkyriefb.h8 * Vmode-switching changes and vmode 15/17 modifications created 29 August
90 /* Register values for 1024x768, 75Hz mode (17) */
91 /* I'm not sure which mode this is (16 or 17), so I'm defining it as 17,
93 * also 17. Just because MacOS can't do this on Valkyrie doesn't mean we
102 { 11, 28, 3 }, /* pixel clock = 79.55MHz for V=74.50Hz */
108 /* This used to be 12, 30, 3 for pixel clock = 78.12MHz for V=72.12Hz, but
118 { 12, 29, 3 }, /* pixel clock = 75.52MHz for V=69.71Hz? */
119 /* I interpolated the V=69.71 from the vmode 14 and old 15
129 { 15, 31, 3 }, /* pixel clock = 64.58MHz for V=59.62Hz */
138 { 23, 42, 3 }, /* pixel clock = 57.07MHz for V=74.27Hz */
[all …]
/linux/drivers/staging/media/sunxi/sun6i-isp/
H A Dsun6i_isp_reg.h21 #define SUN6I_ISP_FE_CFG_SRC0_MODE(v) (((v) << 8) & GENMASK(9, 8)) argument
22 #define SUN6I_ISP_FE_CFG_SRC1_MODE(v) (((v) << 16) & GENMASK(17, 16)) argument
33 #define SUN6I_ISP_FE_CTRL_OUTPUT_SPEED_CTRL(v) (((v) << 16) & GENMASK(17, 16)) argument
93 #define SUN6I_ISP_MODULE_EN_HIST BIT(17)
104 #define SUN6I_ISP_MODE_INPUT_FMT(v) ((v) & GENMASK(2, 0)) argument
105 #define SUN6I_ISP_MODE_INPUT_YUV_SEQ(v) (((v) << 3) & GENMASK(4, 3)) argument
106 #define SUN6I_ISP_MODE_OTF_DPC(v) (((v) << 16) & BIT(16)) argument
107 #define SUN6I_ISP_MODE_SHARP(v) (((v) << 17) & BIT(17)) argument
108 #define SUN6I_ISP_MODE_HIST(v) (((v) << 20) & GENMASK(21, 20)) argument
123 #define SUN6I_ISP_IN_CFG_STRIDE_DIV16(v) ((v) & GENMASK(10, 0)) argument
[all …]
/linux/arch/x86/include/asm/
H A Dperf_event_p4.h40 #define P4_ESCR_EVENT(v) ((v) << P4_ESCR_EVENT_SHIFT) argument
41 #define P4_ESCR_EMASK(v) ((v) << P4_ESCR_EVENTMASK_SHIFT) argument
42 #define P4_ESCR_TAG(v) ((v) << P4_ESCR_TAG_SHIFT) argument
62 #define P4_CCCR_THRESHOLD(v) ((v) << P4_CCCR_THRESHOLD_SHIFT) argument
63 #define P4_CCCR_ESEL(v) ((v) << P4_CCCR_ESCR_SELECT_SHIFT) argument
81 #define p4_config_pack_escr(v) (((u64)(v)) << 32) argument
82 #define p4_config_pack_cccr(v) (((u64)(v)) & 0xffffffffULL) argument
83 #define p4_config_unpack_escr(v) (((u64)(v)) >> 32) argument
84 #define p4_config_unpack_cccr(v) (((u64)(v)) & 0xffffffffULL) argument
86 #define p4_config_unpack_emask(v) \ argument
[all …]
/linux/Documentation/fb/
H A Dviafb.modes29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
74 # D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz
95 # D: 43.163 MHz, H: 50.900 kHz, V: 100.00 Hz
116 # D: 52.406 MHz, H: 61.800 kHz, V: 120.00 Hz
137 # D: 26.880 MHz, H: 30.000 kHz, V: 60.24 Hz
154 # 24 chars 17 lines
158 # D: 29.500 MHz, H: 29.738 kHz, V: 60.00 Hz
171 # 12 chars 17 lines
[all …]
/linux/include/linux/
H A Dinet.h12 * $Id: Space.c,v 0.8.4.5 1992/12/12 19:25:04 bir7 Exp $
13 * $Id: arp.c,v 0.8.4.6 1993/01/28 22:30:00 bir7 Exp $
14 * $Id: arp.h,v 0.8.4.6 1993/01/28 22:30:00 bir7 Exp $
15 * $Id: dev.c,v 0.8.4.13 1993/01/23 18:00:11 bir7 Exp $
16 * $Id: dev.h,v 0.8.4.7 1993/01/23 18:00:11 bir7 Exp $
17 * $Id: eth.c,v 0.8.4.4 1993/01/22 23:21:38 bir7 Exp $
18 * $Id: eth.h,v 0.8.4.1 1992/11/10 00:17:18 bir7 Exp $
19 * $Id: icmp.c,v 0.8.4.9 1993/01/23 18:00:11 bir7 Exp $
20 * $Id: icmp.h,v 0.8.4.2 1992/11/15 14:55:30 bir7 Exp $
21 * $Id: ip.c,v 0.8.4.8 1992/12/12 19:25:04 bir7 Exp $
[all …]
/linux/drivers/staging/media/sunxi/cedrus/
H A Dcedrus_regs.h13 #define SHIFT_AND_MASK_BITS(v, h, l) \ argument
14 (((unsigned long)(v) << (l)) & GENMASK(h, l))
104 #define VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(v) \ argument
105 ((v) ? BIT(7) : 0)
106 #define VE_DEC_MPEG_MP12HDR_FRAME_PRED_FRAME_DCT(v) \ argument
107 ((v) ? BIT(6) : 0)
108 #define VE_DEC_MPEG_MP12HDR_CONCEALMENT_MOTION_VECTORS(v) \ argument
109 ((v) ? BIT(5) : 0)
110 #define VE_DEC_MPEG_MP12HDR_Q_SCALE_TYPE(v) \ argument
111 ((v) ? BIT(4) : 0)
[all …]
/linux/tools/testing/selftests/net/forwarding/
H A Drouter_mpath_seed.sh19 # | 2001:db8:2::17/64 | | | | 2001:db8:2::18..27/64 |
39 ip -4 route add 192.0.2.32/28 vrf v$h1 nexthop via 192.0.2.2
40 ip -6 route add 2001:db8:3::/64 vrf v$h1 nexthop via 2001:db8:1::2
45 ip -6 route del 2001:db8:3::/64 vrf v$h1 nexthop via 2001:db8:1::2
46 ip -4 route del 192.0.2.32/28 vrf v$h1 nexthop via 192.0.2.2
53 ip -4 route add 192.0.2.0/28 vrf v$h2 nexthop via 192.0.2.33
54 ip -6 route add 2001:db8:1::/64 vrf v$h2 nexthop via 2001:db8:3::1
59 ip -6 route del 2001:db8:1::/64 vrf v$h2 nexthop via 2001:db8:3::1
60 ip -4 route del 192.0.2.0/28 vrf v$h2 nexthop via 192.0.2.33
67 __simple_if_init $rp12 v$rp11 192.0.2.17/28 2001:db8:2::17/64
[all …]
/linux/sound/soc/mxs/
H A Dmxs-saif.h20 #define BF_SAIF_CTRL_BITCLK_MULT_RATE(v) \ argument
21 (((v) << 27) & BM_SAIF_CTRL_BITCLK_MULT_RATE)
30 #define BF_SAIF_CTRL_DMAWAIT_COUNT(v) \ argument
31 (((v) << 16) & BM_SAIF_CTRL_DMAWAIT_COUNT)
34 #define BF_SAIF_CTRL_CHANNEL_NUM_SELECT(v) \ argument
35 (((v) << 14) & BM_SAIF_CTRL_CHANNEL_NUM_SELECT)
44 #define BF_SAIF_CTRL_WORD_LENGTH(v) \ argument
45 (((v) << 4) & BM_SAIF_CTRL_WORD_LENGTH)
53 #define BP_SAIF_STAT_RSRVD2 17
55 #define BF_SAIF_STAT_RSRVD2(v) \ argument
[all …]
/linux/drivers/media/platform/verisilicon/
H A Dhantro_g1_regs.h18 #define G1_REG_INTERRUPT_DEC_SLICE_INT BIT(17)
35 #define G1_REG_CONFIG_TILED_MODE_MSB BIT(17)
36 #define G1_REG_CONFIG_DEC_OUT_TILED_E BIT(17)
58 #define G1_REG_DEC_CTRL0_SORENSON_E BIT(17)
97 #define G1_REG_DEC_CTRL2_TRANSDCTAB BIT(17)
121 #define G1_REG_DEC_CTRL2_HUFFMAN_E BIT(17)
175 #define G1_REG_DEC_CTRL5_REFPIC_MK_LEN(x) (((x) & 0x7ff) << 17)
313 #define G1_REG_PP_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24)) argument
314 #define G1_REG_PP_AXI_WR_ID(v) (((v) << 16) & GENMASK(23, 16)) argument
315 #define G1_REG_PP_INSWAP32_E(v) ((v) ? BIT(10) : 0) argument
[all …]
H A Drockchip_vpu2_hw_h264_dec.c28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
36 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
37 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
39 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
40 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
[all …]
H A Drockchip_vpu2_hw_mpeg2_dec.c23 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
25 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
26 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
27 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
28 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
30 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
31 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
33 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
34 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
35 #define VDPU_REG_STARTMB_Y(v) (((v) << 0) & GENMASK(7, 0)) argument
[all …]
/linux/drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/
H A Dsun8i_a83t_mipi_csi2_reg.h35 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LS_LE_ERR_DT1 BIT(17)
60 #define SUN8I_A83T_MIPI_CSI2_INT_STA1_LS_LE_ERR_DT5 BIT(17)
90 #define SUN8I_A83T_MIPI_CSI2_INT_MSK0_LS_LE_ERR_DT1 BIT(17)
134 #define SUN8I_A83T_MIPI_CSI2_CFG_SYNC_DLY_CYCLE(v) (((v) << 18) & \ argument
136 #define SUN8I_A83T_MIPI_CSI2_CFG_N_CHANNEL(v) ((((v) - 1) << 16) & \ argument
137 GENMASK(17, 16))
138 #define SUN8I_A83T_MIPI_CSI2_CFG_N_LANE(v) ((((v) - 1) << 4) & \ argument
/linux/include/linux/spi/
H A Dmxs-spi.h31 #define BM_SSP_CTRL0_GET_RESP (1 << 17)
58 #define BF_SSP_TIMING_CLOCK_DIVIDE(v) \ argument
59 (((v) << 8) & BM_SSP_TIMING_CLOCK_DIVIDE)
62 #define BF_SSP_TIMING_CLOCK_RATE(v) \ argument
63 (((v) << 0) & BM_SSP_TIMING_CLOCK_RATE)
77 #define BM_SSP_CTRL1_RECV_TIMEOUT_IRQ (1 << 17)
86 #define BF_SSP_CTRL1_WORD_LENGTH(v) \ argument
87 (((v) << 4) & BM_SSP_CTRL1_WORD_LENGTH)
93 #define BF_SSP_CTRL1_SSP_MODE(v) \ argument
94 (((v) << 0) & BM_SSP_CTRL1_SSP_MODE)
[all …]
/linux/drivers/net/ethernet/mellanox/mlx5/core/esw/
H A Dbridge_debugfs.c9 static void *mlx5_esw_bridge_debugfs_next(struct seq_file *seq, void *v, loff_t *pos);
10 static void mlx5_esw_bridge_debugfs_stop(struct seq_file *seq, void *v);
11 static int mlx5_esw_bridge_debugfs_show(struct seq_file *seq, void *v);
29 static void *mlx5_esw_bridge_debugfs_next(struct seq_file *seq, void *v, loff_t *pos) in mlx5_esw_bridge_debugfs_next() argument
33 return seq_list_next(v == SEQ_START_TOKEN ? &bridge->fdb_list : v, &bridge->fdb_list, pos); in mlx5_esw_bridge_debugfs_next()
36 static void mlx5_esw_bridge_debugfs_stop(struct seq_file *seq, void *v) in mlx5_esw_bridge_debugfs_stop() argument
41 static int mlx5_esw_bridge_debugfs_show(struct seq_file *seq, void *v) in mlx5_esw_bridge_debugfs_show() argument
46 if (v == SEQ_START_TOKEN) { in mlx5_esw_bridge_debugfs_show()
47 seq_printf(seq, "%-16s %-17s %4s %20s %20s %20s %5s\n", in mlx5_esw_bridge_debugfs_show()
52 entry = list_entry(v, struct mlx5_esw_bridge_fdb_entry, list); in mlx5_esw_bridge_debugfs_show()
[all …]
/linux/drivers/mtd/nand/raw/gpmi-nand/
H A Dgpmi-regs.h18 #define BF_GPMI_CTRL0_COMMAND_MODE(v) \ argument
19 (((v) << BP_GPMI_CTRL0_COMMAND_MODE) & BM_GPMI_CTRL0_COMMAND_MODE)
37 #define BF_GPMI_CTRL0_LOCK_CS(v, x) 0x0 argument
43 #define BF_GPMI_CTRL0_CS(v, x) (((v) << BP_GPMI_CTRL0_CS) & \ argument
48 #define BP_GPMI_CTRL0_ADDRESS 17
50 #define BF_GPMI_CTRL0_ADDRESS(v) \ argument
51 (((v) << BP_GPMI_CTRL0_ADDRESS) & BM_GPMI_CTRL0_ADDRESS)
62 #define BF_GPMI_CTRL0_XFER_COUNT(v) \ argument
63 (((v) << BP_GPMI_CTRL0_XFER_COUNT) & BM_GPMI_CTRL0_XFER_COUNT)
74 #define BF_GPMI_ECCCTRL_ECC_CMD(v) \ argument
[all …]
/linux/drivers/media/platform/sunxi/sun6i-csi/
H A Dsun6i_csi_reg.h18 #define SUN6I_CSI_EN_PTN_CYCLE(v) (((v) << 16) & GENMASK(23, 16)) argument
29 #define SUN6I_CSI_IF_CFG_FIELD_DT_PCLK_SHIFT(v) (((v) << 24) & GENMASK(27, 24)) argument
37 #define SUN6I_CSI_IF_CFG_HREF_POL_POSITIVE (0 << 17)
38 #define SUN6I_CSI_IF_CFG_HREF_POL_NEGATIVE (1 << 17)
57 #define SUN6I_CSI_CAP_MASK(v) (((v) << 2) & GENMASK(5, 2)) argument
70 #define SUN6I_CSI_CH_CFG_PAD_VAL(v) (((v) << 24) & GENMASK(31, 24)) argument
71 #define SUN6I_CSI_CH_CFG_INPUT_FMT(v) (((v) << 20) & GENMASK(23, 20)) argument
72 #define SUN6I_CSI_CH_CFG_OUTPUT_FMT(v) (((v) << 16) & GENMASK(19, 16)) argument
78 #define SUN6I_CSI_CH_CFG_INPUT_YUV_SEQ(v) (((v) << 8) & GENMASK(9, 8)) argument
160 #define SUN6I_CSI_CH_FLD1_VSIZE_VER_LEN(v) (((v) << 16) & GENMASK(28, 16)) argument
[all …]
/linux/sound/soc/qcom/
H A Dlpass-sc7280.c113 const struct lpass_variant *v = drvdata->variant; in sc7280_lpass_alloc_dma_channel() local
120 v->rdma_channels); in sc7280_lpass_alloc_dma_channel()
122 if (chan >= v->rdma_channels) in sc7280_lpass_alloc_dma_channel()
126 v->wrdma_channel_start + in sc7280_lpass_alloc_dma_channel()
127 v->wrdma_channels, in sc7280_lpass_alloc_dma_channel()
128 v->wrdma_channel_start); in sc7280_lpass_alloc_dma_channel()
130 if (chan >= v->wrdma_channel_start + v->wrdma_channels) in sc7280_lpass_alloc_dma_channel()
137 v->hdmi_rdma_channels); in sc7280_lpass_alloc_dma_channel()
138 if (chan >= v->hdmi_rdma_channels) in sc7280_lpass_alloc_dma_channel()
144 v->rxtx_rdma_channels); in sc7280_lpass_alloc_dma_channel()
[all …]
/linux/drivers/gpu/drm/exynos/
H A Dregs-scaler.h58 * 3 90 94 98 9c 170 174 178 17c
139 #define SCALER_CFG_BLEND_COLOR_DIVIDE_ALPHA_EN (1 << 17)
156 #define SCALER_INT_EN_ILLEGAL_DST_Y_SPAN (1 << 17)
184 #define SCALER_INT_STATUS_ILLEGAL_DST_Y_SPAN (1 << 17)
206 #define SCALER_SRC_CFG_SET_BYTE_SWAP(v) SCALER_SET(v, 6, 5) argument
208 #define SCALER_SRC_CFG_SET_COLOR_FORMAT(v) SCALER_SET(v, 4, 0) argument
232 #define SCALER_SRC_SPAN_SET_C_SPAN(v) SCALER_SET(v, 29, 16) argument
234 #define SCALER_SRC_SPAN_SET_Y_SPAN(v) SCALER_SET(v, 13, 0) argument
238 #define SCALER_SRC_Y_POS_SET_YH_POS(v) SCALER_SET(v, 31, 16) argument
240 #define SCALER_SRC_Y_POS_SET_YV_POS(v) SCALER_SET(v, 15, 0) argument
[all …]
/linux/drivers/media/platform/sunxi/sun6i-mipi-csi2/
H A Dsun6i_mipi_csi2_reg.h17 #define SUN6I_MIPI_CSI2_CFG_CHANNEL_MODE(v) ((((v) - 1) << 8) & \ argument
19 #define SUN6I_MIPI_CSI2_CFG_LANE_COUNT(v) (((v) - 1) & GENMASK(1, 0)) argument
39 #define SUN6I_MIPI_CSI2_CH_INT_EN_PF BIT(17)
56 #define SUN6I_MIPI_CSI2_CH_INT_PD_PF BIT(17)
/linux/drivers/comedi/drivers/
H A Ddac02.c35 * 0 to 5V 0 21 to 22 24
37 * 0 to 10V 0 20 to 22 24
39 * +/-5V 0 21 to 22 23
40 * 1 15 to 16 17
41 * +/-10V 0 20 to 22 23
42 * 1 14 to 16 17
48 * In on pin 16 17 (4-quadrant)

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