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/linux/drivers/pcmcia/
H A Dsoc_common.h64 * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
65 * a minimum value of 165ns, as well. Section 4.7.2 (describing
75 * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
79 #define SOC_PCMCIA_IO_ACCESS (165)
/linux/drivers/net/fddi/skfp/
H A Dsmtdef.c211 mib->m[MAC0].fddiMACT_MaxCapabilitiy = (u_long)(- MS2BCLK(165)) ; in smt_init_mib()
216 mib->m[MAC0].fddiMACT_Req = (u_long)(- MS2BCLK(165)) ; in smt_init_mib()
217 mib->m[MAC0].fddiMACT_ReqMIB = (u_long)(- MS2BCLK(165)) ; in smt_init_mib()
218 mib->m[MAC0].fddiMACT_Max = (u_long)(- MS2BCLK(165)) ; in smt_init_mib()
219 mib->m[MAC0].fddiMACT_MaxMIB = (u_long)(- MS2BCLK(165)) ; in smt_init_mib()
235 (u_long)(- MS2BCLK(165)) ; in smt_init_mib()
237 (u_long)(- MS2BCLK(165)) ; in smt_init_mib()
/linux/drivers/soc/tegra/fuse/
H A Dspeedo-tegra20.c49 {165, 195, 224, UINT_MAX},
50 {165, 195, 224, UINT_MAX},
51 {165, 195, 224, UINT_MAX},
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt6795.c90 PINS_FIELD16(165, 165, 0xd00, 0x10, 14, 1),
145 PINS_FIELD16(165, 165, 0xd00, 0x10, 13, 1),
196 PIN_FIELD16(165, 165, 0xd00, 0x10, 2, 1), /* RST */
269 PIN_FIELD16(165, 165, 0xd00, 0x10, 0, 1),
324 PIN_FIELD16(165, 165, 0xd00, 0x10, 1, 1),
382 PIN_FIELD16(165, 165, 0xd00, 0x10, 8, 2),
443 PIN_FIELD16(165, 165, 0xd00, 0x10, 12, 1),
564 MTK_PULL_PUPD_R1R0_TYPE,/*164*/ MTK_PULL_PUPD_R1R0_TYPE,/*165*/
/linux/arch/arm/mach-omap2/
H A Dopp2xxx.h166 #define RI_CLKSEL_L3 (4 << 0) /* 165MHz */
178 #define RI_CLKSEL_IVA (4 << 8) /* iva1 - 165MHz */
183 #define RI_CLKSEL_GFX (1 << 0) /* 165MHz */
305 * #2 (ratio1) DPLL = 330*2 = 660MHz, L3=165MHz
315 /* Core frequency changed from 330/165 to 329/164 MHz*/
345 * 165 (ratio1) same as above #2
/linux/drivers/media/platform/ti/omap3isp/
H A Dgamma_table.h28 162, 163, 163, 164, 164, 164, 164, 165, 165, 165, 165, 166, 166, 167, 167, 168,
/linux/drivers/regulator/
H A Dmax20411-regulator.c20 #define MAX20411_MAX_SEL 165 /* 1.275V */
83 * with valid selector between 41 to 165 (0.5V to 1.275V)
/linux/drivers/net/wireless/intel/iwlwifi/mvm/
H A Drfi.c21 {cpu_to_le16(176), {149, 151, 153, 157, 159, 161, 165, 163, 167, 169,
38 {cpu_to_le16(240), {114, 151, 155, 157, 159, 161, 165},
/linux/tools/testing/selftests/firmware/
H A Dsettings8 timeout=165
/linux/include/dt-bindings/clock/
H A Dqcom,ipq5332-gcc.h154 #define GCC_MEM_NOC_AHB_CLK 165
328 #define GCC_PCIE3X1_1_PIPE_ARES 165
H A Dhi3620-clock.h81 #define HI3620_TIMERCLK67 165
/linux/drivers/pinctrl/uniphier/
H A Dpinctrl-uniphier-pro4.c510 UNIPHIER_PINCTRL_PIN(165, "RGMII_TXCTL", 6,
553 165, UNIPHIER_PIN_DRV_1BIT,
554 165, UNIPHIER_PIN_PULL_DOWN),
1008 static const unsigned ether_mii_pins[] = {160, 161, 162, 163, 164, 165, 166,
1013 static const unsigned ether_rgmii_pins[] = {160, 161, 162, 163, 164, 165, 167,
1018 static const unsigned ether_rmii_pins[] = {160, 161, 162, 165, 168, 169, 172,
1021 static const unsigned ether_rmiib_pins[] = {161, 162, 165, 167, 168, 169, 172,
1108 160, 161, 162, 163, 164, 165, 166, 167, /* PORT20x */
/linux/Documentation/devicetree/bindings/i2c/
H A Dsocionext,synquacer-i2c.yaml51 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
/linux/drivers/thermal/mediatek/
H A Dauxadc_thermal.c116 #define MT8173_CALIBRATION 165
205 #define MT2701_CALIBRATION 165
226 #define MT2712_CALIBRATION 165
239 #define MT7622_CALIBRATION 165
286 #define MT7986_CALIBRATION 165
750 tmp = tmp / (165 - mt->o_slope); in raw_to_mcelsius_v2()
752 tmp = tmp / (165 + mt->o_slope); in raw_to_mcelsius_v2()
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxlx-s905l-p271.dts33 <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
H A Dmeson-gx-mali450.dtsi51 <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt2712-pinfunc.h784 #define MT2712_PIN_165_SPI4_CSN__FUNC_GPIO165 (MTK_PIN_NO(165) | 0)
785 #define MT2712_PIN_165_SPI4_CSN__FUNC_SPI_CS_4_ (MTK_PIN_NO(165) | 1)
786 #define MT2712_PIN_165_SPI4_CSN__FUNC_LCM_RST0 (MTK_PIN_NO(165) | 2)
787 #define MT2712_PIN_165_SPI4_CSN__FUNC_SPI_CS_1_ (MTK_PIN_NO(165) | 3)
788 #define MT2712_PIN_165_SPI4_CSN__FUNC_UTXD4 (MTK_PIN_NO(165) | 4)
789 #define MT2712_PIN_165_SPI4_CSN__FUNC_I2SO1_DO (MTK_PIN_NO(165) | 5)
790 #define MT2712_PIN_165_SPI4_CSN__FUNC_TDMO0_MCLK (MTK_PIN_NO(165) | 6)
791 #define MT2712_PIN_165_SPI4_CSN__FUNC_I2SO0_MCK (MTK_PIN_NO(165) | 7)
/linux/include/media/i2c/
H A Dtvp7002.h2 /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
/linux/Documentation/devicetree/bindings/reset/
H A Dzynq-reset.txt34 165: gem1 rx reset
/linux/include/dt-bindings/reset/
H A Daltr,rst-mgr-a10.h93 #define TAPCOLD_RESET 165
H A Damlogic,meson-s4-reset.h108 #define RESET_BRG_VPU_PIPL0 165
H A Damlogic,meson8b-reset.h103 #define RESET_VID2_PLL 165
/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2044-reset.h94 #define RST_RP_CLUSTER_X1Y3_S1 165
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8qxp-ss-lsio.dtsi34 <&iomuxc 17 165 8>;
/linux/drivers/net/wireless/realtek/rtlwifi/
H A Dregd.c47 /* 5G chan 100 - chan 165*/
50 /* 5G chan 149 - chan 165*/

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