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/linux/drivers/video/fbdev/i810/
H A Di810_gtf.c38 { 132, 0x22109000 }, { 135, 0x22109000 }, { 157, 0x2210b000 },
52 { 132, 0x22314000 }, { 135, 0x22314000 }, { 157, 0x22415000 },
66 { 132, 0x22519000 }, { 135, 0x4441d000 }, { 157, 0x44419000 },
79 { 132, 0x22109000 }, { 135, 0x22109000 }, { 157, 0x2210b000 },
93 { 132, 0x22314000 }, { 135, 0x22314000 }, { 157, 0x22415000 },
107 { 132, 0x22519000 }, { 135, 0x4441d000 }, { 157, 0x44419000 },
/linux/drivers/pinctrl/uniphier/
H A Dpinctrl-uniphier-ld11.c366 UNIPHIER_PINCTRL_PIN(135, "AO1IEC", UNIPHIER_PIN_IECTRL_EXIST,
367 135, UNIPHIER_PIN_DRV_1BIT,
368 135, UNIPHIER_PIN_PULL_DOWN),
480 static const unsigned aoutiec1_pins[] = {135, 136};
482 static const unsigned aoutiec2_pins[] = {135, 136};
583 131, 132, 133, 134, 135, 136, 137, 138, /* PORT21x */
710 if (gpio_offset == 132 || gpio_offset == 135) /* XIRQ12, 15 */ in uniphier_ld11_get_gpio_muxval()
H A Dpinctrl-uniphier-ld4.c420 UNIPHIER_PINCTRL_PIN(135, "PORT00", 0,
457 135, UNIPHIER_PIN_DRV_1BIT,
458 135, UNIPHIER_PIN_PULL_DOWN),
570 static const unsigned spi0_pins[] = {135, 136, 137, 138};
607 135, 136, 137, 138, 139, 140, 141, 142, /* PORT0x */
713 case 135: /* XIRQ15 */ in uniphier_ld4_get_gpio_muxval()
H A Dpinctrl-uniphier-ld20.c420 UNIPHIER_PINCTRL_PIN(135, "AO1IEC", UNIPHIER_PIN_IECTRL_EXIST,
422 135, UNIPHIER_PIN_PULL_DOWN),
581 static const unsigned aoutiec1_pins[] = {135, 136};
583 static const unsigned aoutiec2_pins[] = {135, 136};
696 131, 132, 133, 134, 135, 136, 137, 138, /* PORT21x */
862 if (gpio_offset == 132 || gpio_offset == 135) /* XIRQ12, 15 */ in uniphier_ld20_get_gpio_muxval()
/linux/include/dt-bindings/clock/
H A Drk3128-cru.h53 #define SCLK_RGA 135
269 #define SRST_TIMER5 135
H A Drk3228-cru.h58 #define SCLK_RGA 135
279 #define SRST_TIMER5 135
H A Dqcom,ipq5332-gcc.h135 #define GCC_USB0_AUX_CLK 135
298 #define GCC_USB_BCR 135
H A Dqcom,gcc-ipq8074.h144 #define GCC_USB1_PIPE_CLK 135
373 #define GCC_UNIPHY1_SOFT_RESET 135
H A Drk3308-cru.h137 #define ACLK_CRYPTO 135
363 #define SRST_SPDIFRX_M 135
H A Drk3328-cru.h106 #define ACLK_GPU 135
342 #define SRST_VOP_D 135
H A Drk3368-cru.h78 #define SCLK_TIMER12 135
299 #define SRST_USBHOST0_AHB 135
H A Dhix5hd2-clock.h56 #define HIX5HD2_MAC0_PHY_CLK 135
/linux/drivers/cpufreq/
H A Dlonghaul.h187 135, /* 0111 -> 13.5x */
220 135, /* 0100 -> 13.5x */
261 135, /* 0111 -> 13.5x */
293 135, /* 0100 -> 13.5x */
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt8127.c131 MTK_PIN_DRV_GRP(135, 0xc20, 0, 2),
168 MTK_PIN_PUPD_SPEC_SR(135, 0xc30, 8, 10, 9), /* MSDC0_DAT2 */
247 MTK_PIN_IES_SMT_SPEC(135, 135, 0xc30, 11),
H A Dpinctrl-mt8186.c177 PIN_FIELD_BASE(135, 135, 6, 0x0030, 0x10, 21, 1),
365 PIN_FIELD_BASE(135, 135, 6, 0x0080, 0x10, 6, 1),
531 PIN_FIELD_BASE(135, 135, 6, 0x0050, 0x10, 21, 1),
697 PIN_FIELD_BASE(135, 135, 6, 0x0040, 0x10, 21, 1),
960 PIN_FIELD_BASE(135, 135, 6, 0x0010, 0x10, 6, 3),
1020 PIN_FIELD_BASE(135, 135, 6, 0x0020, 0x10, 0, 3),
1043 PIN_FIELD_BASE(135, 135, 6, 0x0070, 0x10, 0, 2),
1074 PIN_RSEL(135, 136, 0x0, 75000, 75000),
1075 PIN_RSEL(135, 136, 0x1, 10000, 75000),
1076 PIN_RSEL(135, 136, 0x2, 5000, 5000),
[all …]
/linux/Documentation/admin-guide/media/
H A Dbt8xx.rst127 DViCO FusionHDTV 5 Lite 135
139 $ modprobe bttv card=113 card=135
/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_cyclone5_mcv.dtsi21 clk-phase-sd-hs = <0>, <135>;
H A Dsocfpga_arria10_socdk_sdmmc.dts15 clk-phase-sd-hs = <0>, <135>;
H A Dsocfpga_arria5.dtsi26 clk-phase-sd-hs = <0>, <135>;
H A Dsocfpga_cyclone5.dtsi26 clk-phase-sd-hs = <0>, <135>;
/linux/Documentation/doc-guide/
H A Dsvg_image.svg9 <polygon points="585 0 525 25 585 50" transform="rotate(135 525 25)"/>
/linux/Documentation/devicetree/bindings/dma/
H A Dmilbeaut-m10v-hdmac.txt25 <0 135 4>,
/linux/Documentation/devicetree/bindings/spi/
H A Dmicrochip,spi-pic32.txt32 dmas = <&dma 134>, <&dma 135>;
/linux/Documentation/translations/zh_CN/mm/
H A Dzsmalloc.rst44 10 192 1 0 2880 2872 135 3
/linux/include/dt-bindings/reset/
H A Daltr,rst-mgr.h71 #define S2FCOLD_RESET 135

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