Home
last modified time | relevance | path

Searched +full:10 +full:ms (Results 1 – 25 of 1188) sorted by relevance

12345678910>>...48

/linux/tools/testing/selftests/tc-testing/tc-tests/qdiscs/
H A Dnetem.json56 "cmdUnderTest": "$TC qdisc add dev $DUMMY handle 1: root netem delay 100ms",
59 "matchPattern": "qdisc netem 1: root refcnt [0-9]+ .*delay 100ms",
77 …"cmdUnderTest": "$TC qdisc add dev $DUMMY handle 1: root netem delay 100ms 10ms distribution norma…
80 "matchPattern": "qdisc netem 1: root refcnt [0-9]+ .*delay 100ms 10ms corrupt 1%",
98 …"cmdUnderTest": "$TC qdisc add dev $DUMMY handle 1: root netem delay 100ms 10ms distribution norma…
101 "matchPattern": "qdisc netem 1: root refcnt [0-9]+ .*delay 100ms 10ms duplicate 1%",
119 …"cmdUnderTest": "$TC qdisc add dev $DUMMY handle 1: root netem delay 100ms 10ms distribution paret…
122 "matchPattern": "qdisc netem 1: root refcnt [0-9]+ .*delay 100ms 10ms loss 1%",
140 …"cmdUnderTest": "$TC qdisc add dev $DUMMY handle 1: root netem delay 100ms 10ms distribution paret…
143 …"matchPattern": "qdisc netem 1: root refcnt [0-9]+ .*delay 100ms 10ms loss state p13 1% p31 99% p…
[all …]
H A Dhhf.json17 …"matchPattern": "qdisc hhf 1: root refcnt [0-9]+.*hh_limit 2048 reset_timeout 40ms admit_bytes 128…
38 …qdisc hhf 1: root refcnt [0-9]+ limit 1500p.*hh_limit 2048 reset_timeout 40ms admit_bytes 128Kb ev…
59 …isc hhf 1: root refcnt [0-9]+.*quantum 9000b hh_limit 2048 reset_timeout 40ms admit_bytes 128Kb ev…
77 "cmdUnderTest": "$TC qdisc add dev $DUMMY handle 1: root hhf reset_timeout 100ms",
80 …"matchPattern": "qdisc hhf 1: root refcnt [0-9]+.*hh_limit 2048 reset_timeout 100ms admit_bytes 12…
101 …"matchPattern": "qdisc hhf 1: root refcnt [0-9]+.*hh_limit 2048 reset_timeout 40ms admit_bytes 100…
122 …hf 1: root refcnt [0-9]+.*hh_limit 2048 reset_timeout 40ms admit_bytes 128Kb evict_timeout 500ms n…
140 "cmdUnderTest": "$TC qdisc add dev $DUMMY handle 1: root hhf non_hh_weight 10",
143 …oot refcnt [0-9]+.*hh_limit 2048 reset_timeout 40ms admit_bytes 128Kb evict_timeout 1s non_hh_weig…
165 …qdisc hhf 1: root refcnt [0-9]+ limit 1500p.*hh_limit 2048 reset_timeout 40ms admit_bytes 128Kb ev…
[all …]
H A Dcodel.json17 "matchPattern": "qdisc codel 1: root refcnt [0-9]+ limit 1000p target 5ms interval 100ms",
38 "matchPattern": "qdisc codel 1: root refcnt [0-9]+ limit 1500p target 5ms interval 100ms",
56 "cmdUnderTest": "$TC qdisc add dev $DUMMY handle 1: root codel target 100ms",
59 "matchPattern": "qdisc codel 1: root refcnt [0-9]+ limit 1000p target 100ms interval 100ms",
77 "cmdUnderTest": "$TC qdisc add dev $DUMMY handle 1: root codel interval 20ms",
80 "matchPattern": "qdisc codel 1: root refcnt [0-9]+ limit 1000p target 5ms interval 20ms",
101 … "matchPattern": "qdisc codel 1: root refcnt [0-9]+ limit 1000p target 5ms interval 100ms ecn",
119 "cmdUnderTest": "$TC qdisc add dev $DUMMY handle 1: root codel ce_threshold 20ms",
122 …tern": "qdisc codel 1: root refcnt [0-9]+ limit 1000p target 5ms ce_threshold 20ms interval 100ms",
144 "matchPattern": "qdisc codel 1: root refcnt [0-9]+ limit 1000p target 5ms interval 100ms",
[all …]
H A Dfq_codel.json17 …odel 1: root refcnt [0-9]+ limit 10240p flows 1024 quantum.*target 5ms interval 100ms memory_limit…
38 …codel 1: root refcnt [0-9]+ limit 1000p flows 1024 quantum.*target 5ms interval 100ms memory_limit…
59 …odel 1: root refcnt [0-9]+ limit 10240p flows 1024 quantum.*target 5ms interval 100ms memory_limit…
80 …odel 1: root refcnt [0-9]+ limit 10240p flows 1024 quantum.*target 2ms interval 100ms memory_limit…
101 …codel 1: root refcnt [0-9]+ limit 10240p flows 1024 quantum.*target 5ms interval 5ms memory_limit …
122 … 1: root refcnt [0-9]+ limit 10240p flows 1024 quantum 9000 target 5ms interval 100ms memory_limit…
143 …odel 1: root refcnt [0-9]+ limit 10240p flows 1024 quantum.*target 5ms interval 100ms memory_limit…
164 …ot refcnt [0-9]+ limit 10240p flows 1024 quantum.*target 5ms ce_threshold 1.02s interval 100ms mem…
185 …odel 1: root refcnt [0-9]+ limit 10240p flows 1024 quantum.*target 5ms interval 100ms memory_limit…
206 …_codel 1: root refcnt [0-9]+ limit 1000p flows 256 quantum.*target 5ms interval 100ms memory_limit…
[all …]
/linux/net/mac80211/
H A Drc80211_minstrel_ht_debugfs.c22 struct minstrel_debugfs_info *ms; in minstrel_stats_read() local
24 ms = file->private_data; in minstrel_stats_read()
25 return simple_read_from_buffer(buf, len, ppos, ms->buf, ms->len); in minstrel_stats_read()
113 p += sprintf(p, " %2u.%1uM", r / 10, r % 10); in minstrel_ht_stats_dump()
131 tp_max / 10, tp_max % 10, in minstrel_ht_stats_dump()
132 tp_avg / 10, tp_avg % 10, in minstrel_ht_stats_dump()
133 eprob / 10, eprob % 10, in minstrel_ht_stats_dump()
148 struct minstrel_debugfs_info *ms; in minstrel_ht_stats_open() local
152 ms = kmalloc(32768, GFP_KERNEL); in minstrel_ht_stats_open()
153 if (!ms) in minstrel_ht_stats_open()
[all …]
/linux/drivers/leds/trigger/
H A Dledtrig-activity.c73 /* We come here every 100ms in the worst case, so that's 100M ns of in led_activity_function()
100 * (typically 10ms every second, or 10ms ON, 990ms OFF). Then we want in led_activity_function()
103 * core systems. At this point it should reach 10 Hz with a 10/90 duty in led_activity_function()
104 * cycle (10ms ON, 90ms OFF). After this point, the blinking frequency in led_activity_function()
105 * remains stable (10 Hz) and only the duty cycle increases to report in led_activity_function()
106 * the activity, up to the point where we have 90ms ON, 10ms OFF when in led_activity_function()
112 * - a target CPU usage of min(50%, 100%/#CPU) for a 10% duty cycle in led_activity_function()
113 * (10ms ON, 90ms OFF) in led_activity_function()
115 * ON_ms = 10 in led_activity_function()
118 * ON_ms = 10 + (usage-target)/(100%-target) * 80 in led_activity_function()
[all …]
/linux/Documentation/ABI/testing/
H A Ddebugfs-intel-iommu192 <0.1us 0.1us-1us 1us-10us 10us-100us 100us-1ms
195 1ms-10ms >=10ms min(us) max(us) average(us)
201 <0.1us 0.1us-1us 1us-10us 10us-100us 100us-1ms
204 1ms-10ms >=10ms min(us) max(us) average(us)
214 <0.1us 0.1us-1us 1us-10us 10us-100us 100us-1ms
217 >=10ms min(us) max(us) average(us)
/linux/Documentation/fb/
H A Dviafb.modes15 # Sync Width 3.813 us 0.064 ms
17 # Front Porch 0.636 us 0.318 ms
18 # 2 chars 10 lines
19 # Back Porch 1.907 us 1.048 ms
21 # Active Time 25.422 us 15.253 ms
23 # Blank Time 6.356 us 1.430 ms
31 timings 39722 48 16 33 10 96 2 endmode mode "480x640-60"
40 # Sync Width 2.032 us 0.080 ms
42 # Front Porch 0.508 us 0.027 ms
44 # Back Porch 3.810 us 0.427 ms
[all …]
/linux/tools/testing/selftests/damon/
H A Ddamos_apply_interval.py10 # access two 10 MiB memory regions, 2 second per each
11 sz_region = 10 * 1024 * 1024
14 # Set quota up to 1 MiB per 100 ms
22 # >= 25% access rate, >= 200ms age
24 # aggregation interval (100 ms) is used
26 # use 10ms apply interval
29 # >= 25% access rate, >= 200ms age
31 # explicitly set 10 ms apply interval
32 apply_interval_us=10 * 1000)
/linux/Documentation/translations/zh_CN/scheduler/
H A Dsched-bwc.rst78 cpu.cfs_period_us=100ms
104 /proc/sys/kernel/sched_cfs_bandwidth_slice_us (default=5ms)
174 # echo 250000 > cpu.cfs_quota_us /* quota = 250ms */
175 # echo 250000 > cpu.cfs_period_us /* period = 250ms */
181 # echo 1000000 > cpu.cfs_quota_us /* quota = 1000ms */
182 # echo 500000 > cpu.cfs_period_us /* period = 500ms */
188 在50ms周期内，10ms配额将相当于1个CPU的20%。::
190 # echo 10000 > cpu.cfs_quota_us /* quota = 10ms */
191 # echo 50000 > cpu.cfs_period_us /* period = 50ms */
200 # echo 20000 > cpu.cfs_quota_us /* quota = 20ms */
[all …]
/linux/drivers/usb/phy/
H A Dphy-fsl-usb.h87 #define PORTSC_LINE_STATUS_BITS (0x3<<10)
99 /* bit 11-10 are line status */
100 #define PORTSC_LINE_STATUS_SE0 (0x0<<10)
101 #define PORTSC_LINE_STATUS_JSTATE (0x1<<10)
102 #define PORTSC_LINE_STATUS_KSTATE (0x2<<10)
103 #define PORTSC_LINE_STATUS_UNDEF (0x3<<10)
104 #define PORTSC_LINE_STATUS_BIT_POS (10)
155 #define OTGSC_STS_A_SESSION_VALID (0x1<<10)
234 #define TA_WAIT_VRISE (100) /* a_wait_vrise 100 ms, section: 6.6.5.1 */
244 /* It is necessary for this timer to be more than 750 ms because of a bug in OPT
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Drohm,bd71847-pmic.yaml65 # Shortest being 10ms, next 500ms and then multiple of 500ms up to 7,5s
67 # Shortest being 10ms, next 1000ms and then multiple of 1000ms up to 15s
71 rohm,short-press-ms:
75 - 10
92 rohm,long-press-ms:
96 - 10
145 rohm,short-press-ms = <10>;
146 rohm,long-press-ms = <2000>;
H A Dst,stmpe.yaml67 description: ADC bit mode 0 = 10bit ADC, 1 = 12bit ADC
155 0 = 10 us
159 4 = 1 ms
160 5 = 5 ms
161 6 = 10 ms
162 7 = 50 ms
169 0 = 10 us
172 3 = 1 ms
173 4 = 5 ms
174 5 = 10 ms
[all …]
/linux/Documentation/accounting/
H A Ddelay-accounting.rst98 Get delays, since system boot, for pid 10::
100 # ./getdelays -d -p 10
111 … 39 156000000 156576579 2111069 0.054ms 0.212296ms 0.031307ms
113 0 0 0.000ms 0.000000ms 0.000000ms
115 0 0 0.000ms 0.000000ms 0.000000ms
117 0 0 0.000ms 0.000000ms 0.000000ms
119 0 0 0.000ms 0.000000ms 0.000000ms
121 0 0 0.000ms 0.000000ms 0.000000ms
123 156 11215873 0.072ms 0.207403ms 0.033913ms
125 0 0 0.000ms 0.000000ms 0.000000ms
[all …]
/linux/Documentation/devicetree/bindings/input/touchscreen/
H A Dbrcm,iproc-touchscreen.txt20 - settling_timeout: The settling duration (in ms) is the amount of time
24 0 = 0.008 ms
25 1 = 0.01 ms
26 2 = 0.02 ms
27 3 = 0.04 ms
28 4 = 0.08 ms
29 5 = 0.16 ms
30 6 = 0.32 ms
31 7 = 0.64 ms
32 8 = 1.28 ms
[all …]
/linux/samples/bpf/
H A Dtracex3_user.c67 printf("|1ns |10ns |100ns |1us |10us |100us" in print_banner()
68 " |1ms |10ms |100ms |1s |10s\n"); in print_banner()
70 printf("|1us |10us |100us |1ms |10ms " in print_banner()
71 "|100ms |1s |10s\n"); in print_banner()
/linux/tools/testing/selftests/tc-testing/tc-tests/infra/
H A Dqdiscs.json171 "$TC qdisc add dev $DUMMY parent 1: handle 10: skbprio limit 1",
204 "$TC qdisc add dev $DUMMY root handle 1: tbf rate 8bit burst 100b latency 100ms",
237 "$TC qdisc add dev $DUMMY root handle 1: tbf rate 8bit burst 100b latency 100ms",
270 "$TC qdisc add dev $DUMMY root handle 1: tbf rate 8bit burst 100b latency 100ms",
303 "$TC qdisc add dev $DUMMY root handle 1: tbf rate 8bit burst 100b latency 100ms",
336 "$TC qdisc add dev $DUMMY root handle 1: tbf rate 8bit burst 100b latency 100ms",
369 "$TC qdisc add dev $DUMMY root handle 1: tbf rate 8bit burst 100b latency 100ms",
400 "$TC qdisc add dev $DUMMY handle 1: root htb default 10",
401 "$TC class add dev $DUMMY parent 1: classid 1:10 htb rate 1kbit",
402 …"$TC qdisc add dev $DUMMY parent 1:10 handle 10: fq_codel memory_limit 1 flows 1 target 0.1ms inte…
[all …]
/linux/drivers/scsi/
H A Dmesh.c68 MODULE_PARM_DESC(sync_rate, "Synchronous rate (0..10, 0=async)");
186 static void mesh_done(struct mesh_state *ms, int start_next);
187 static void mesh_interrupt(struct mesh_state *ms);
188 static void cmd_complete(struct mesh_state *ms);
189 static void set_dma_cmds(struct mesh_state *ms, struct scsi_cmnd *cmd);
190 static void halt_dma(struct mesh_state *ms);
191 static void phase_mismatch(struct mesh_state *ms);
213 static void dlog(struct mesh_state *ms, char *fmt, int a) in dlog() argument
215 struct mesh_target *tp = &ms->tgts[ms->conn_tgt]; in dlog()
219 slp = &ms->log[ms->log_ix]; in dlog()
[all …]
/linux/Documentation/hwmon/
H A Dds1621.rst112 - DS1621 - 750ms (older devices may take up to 1000ms)
113 - DS1625 - 500ms
114 - DS1631 - 93ms..750ms for 9..12 bits resolution, respectively.
115 - DS1721 - 93ms..750ms for 9..12 bits resolution, respectively.
116 - DS1731 - 93ms..750ms for 9..12 bits resolution, respectively.
119 On the DS1621, internal access to non-volatile registers may last for 10ms
128 - DS1721: +/- 1.0 degree Celsius (from -10 to +85 degrees)
129 - DS1731: +/- 1.0 degree Celsius (from -10 to +85 degrees)
147 1 0 10 bits, 0.25 degrees Celsius
217 - 93.75ms = minimum conversion time
/linux/drivers/usb/chipidea/
H A Dotg_fsm.h20 * TA_VBUS_RISE <= 100ms, section 4.4
31 * and 30000 ms, section 5.5, Table 5-1
34 #define TA_AIDL_BDIS (5000) /* a_suspend min 200 ms, section 5.2.1
39 * 500ms is used for B switch to host
48 #define TB_DATA_PLS (10) /* b_srp_init,continue 5~10ms
56 #define TB_ASE0_BRST (155) /* minimum 155 ms, section:5.3.1 */
62 #define TB_AIDL_BDIS (20) /* 4ms ~ 150ms, section 5.2.1 */
/linux/Documentation/devicetree/bindings/leds/backlight/
H A Dpwm-backlight.yaml35 post-pwm-on-delay-ms:
37 Delay in ms between setting an initial (non-zero) PWM and enabling the
40 pwm-off-delay-ms:
42 Delay in ms between disabling the backlight using GPIO and setting PWM
73 post-pwm-on-delay-ms = <10>;
74 pwm-off-delay-ms = <10>;
/linux/Documentation/devicetree/bindings/sound/
H A Dcirrus,cs42l42.yaml80 0 - 0ms
81 1 - 125ms
82 2 - 250ms
83 3 - 500ms
84 4 - 750ms
99 0 - 0ms
100 1 - 125ms
101 2 - 250ms
102 3 - 500ms
103 4 - 750ms
[all …]
/linux/sound/soc/codecs/
H A Dmax98373.c88 9, 10, TLV_DB_SCALE_ITEM(500, 100, 0),
105 10, 13, TLV_DB_SCALE_ITEM(-500, 100, 0),
135 "45ms", "225ms", "450ms", "1150ms",
136 "2250ms", "3100ms", "4500ms", "6750ms"
144 "10us", "20us", "40us", "80us",
145 "160us", "320us", "640us", "1.28ms",
146 "2.56ms", "5.12ms", "10.24ms", "20.48ms",
147 "40.96ms", "81.92ms", "16.384ms", "32.768ms"
156 "640us", "1.28ms", "2.56ms", "5.120ms",
157 "10.24ms", "20.48ms", "40.96ms", "81.92ms",
[all …]
/linux/include/uapi/linux/
H A Dhdlcdrv.h27 int tx_delay; /* the transmitter keyup delay in 10ms units */
28 int tx_tail; /* the transmitter keyoff delay in 10ms units */
29 int slottime; /* the slottime in 10ms; usually 10 = 100ms */
73 #define HDLCDRVCTL_GETCHANNELPAR 10
/linux/Documentation/devicetree/bindings/phy/
H A Dti,phy-j721e-wiz.yaml17 - ti,j721e-wiz-10g
18 - ti,j721s2-wiz-10g
19 - ti,am64-wiz-10g
20 - ti,j7200-wiz-10g
21 - ti,j784s4-wiz-10g
64 typec-dir-debounce-ms:
70 If not specified, the default debounce of 100ms will be used.
71 Type-C spec states minimum CC pin debounce of 100 ms and maximum
72 of 200 ms. However, some solutions might need more than 200 ms.
192 const: ti,j7200-wiz-10g

12345678910>>...48