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/freebsd/sys/dev/drm2/
H A Ddrm_fourcc.h36 #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
37 #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
40 #define DRM_FORMAT_XRGB4444 fourcc_code('X', 'R', '1', '2') /* [15:0] x:R:G:B 4:4:4:4 little endian…
41 #define DRM_FORMAT_XBGR4444 fourcc_code('X', 'B', '1', '2') /* [15:0] x:B:G:R 4:4:4:4 little endian…
42 #define DRM_FORMAT_RGBX4444 fourcc_code('R', 'X', '1', '2') /* [15:0] R:G:B:x 4:4:4:4 little endian…
43 #define DRM_FORMAT_BGRX4444 fourcc_code('B', 'X', '1', '2') /* [15:0] B:G:R:x 4:4:4:4 little endian…
45 #define DRM_FORMAT_ARGB4444 fourcc_code('A', 'R', '1', '2') /* [15:0] A:R:G:B 4:4:4:4 little endian…
46 #define DRM_FORMAT_ABGR4444 fourcc_code('A', 'B', '1', '2') /* [15:0] A:B:G:R 4:4:4:4 little endian…
47 #define DRM_FORMAT_RGBA4444 fourcc_code('R', 'A', '1', '2') /* [15:0] R:G:B:A 4:4:4:4 little endian…
48 #define DRM_FORMAT_BGRA4444 fourcc_code('B', 'A', '1', '2') /* [15:0] B:G:R:A 4:4:4:4 little endian…
[all …]
/freebsd/share/man/man4/
H A Dixl.462 XL710 (40G)
64 X710 (10G)
66 XXV710 (25G)
68 X722 (10G)
106 .Em sysutils/intel-nvmupdate-10g ,
107 .Em sysutils/intel-nvmupdate-40g ,
109 .Em sysutils/intel-nvmupdate-100g ,
[all...]
H A Dmxge.437 .Nd "Myricom Myri10GE 10 Gigabit Ethernet adapter driver"
60 driver provides support for PCI Express 10 Gigabit Ethernet adapters based on
84 driver supports 10 Gigabit Ethernet adapters based on the
89 Myricom 10GBase-CX4 (10G-PCIE-8A-C, 10G-PCIE-8AL-C)
91 Myricom 10GBase-R (10G-PCIE-8A-R, 10G-PCIE-8AL-R)
93 Myricom 10G XAUI over ribbon fiber (10G-PCIE-8A-Q, 10G-PCIE-8AL-Q)
130 MSI-X using the "10G NIC Tool Kit" for FreeBSD which is available from
131 .Pa http://www.myri.com/scs/download-10g-tools.html .
/freebsd/sys/net/
H A Dif_media.h142 #define IFM_10_T 3 /* 10BaseT - RJ45 */
143 #define IFM_10_2 4 /* 10Base2 - Thinnet */
144 #define IFM_10_5 5 /* 10Base5 - AUI */
149 #define IFM_100_T2 10 /* 100BaseT2 */
151 #define IFM_10_STP 12 /* 10BaseT over shielded TP */
152 #define IFM_10_FL 13 /* 10BaseFL - Fiber */
157 #define IFM_10G_LR 18 /* 10GBase-LR 1310nm Single-mode */
158 #define IFM_10G_SR 19 /* 10GBase-SR 850nm Multi-mode */
159 #define IFM_10G_CX4 20 /* 10GBase CX4 copper */
161 #define IFM_10G_TWINAX 22 /* 10GBase Twinax copper */
[all …]
/freebsd/usr.bin/xinstall/tests/
H A Dinstall_test.sh361 src_path_relative="$(echo $src_path | sed -e 's,//,/,g')"
430 local g="$(id -g)"
437 atf_check_equal "$u:$g:10$m" "$(stat -f"%u:%g:%p" testc)"
440 atf_check_equal "$cu:$g:10$m" "$(stat -f"%u:%g:%p" testc)"
442 atf_check install -g "$cg" testf testc
443 atf_check_equal "$u:$cg:10$m" "$(stat -f"%u:%g:%p" testc)"
445 atf_check install -o "$cu" -g "$cg" testf testc
446 atf_check_equal "$cu:$cg:10$m" "$(stat -f"%u:%g:%p" testc)"
449 atf_check_equal "$u:$g:10$cm" "$(stat -f"%u:%g:%p" testc)"
452 atf_check_equal "$cu:$g:10$cm" "$(stat -f"%u:%g:%p" testc)"
[all …]
/freebsd/sys/dev/cxgbe/
H A Dt4_iov.c79 {0x5001, "Chelsio T520-CR"}, /* 2 x 10G */
80 {0x5002, "Chelsio T522-CR"}, /* 2 x 10G, 2 X 1G */
81 {0x5003, "Chelsio T540-CR"}, /* 4 x 10G */
82 {0x5007, "Chelsio T520-SO"}, /* 2 x 10G, nomem */
83 {0x5009, "Chelsio T520-BT"}, /* 2 x 10GBase
[all...]
/freebsd/lib/libifconfig/
H A Dsfp.lua131 "10G Ethernet/IB compliance codes, byte 3",
134 description = "10G Ethernet/IB compliance",
137 {0x80, "10G_BASE_ER", "10G Base-ER"},
138 {0x40, "10G_BASE_LRM", "10G Base-LRM"},
139 {0x20, "10G_BASE_LR", "10G Base-LR"},
140 {0x10, "10G_BASE_SR", "10G Base-SR"},
209 "FC Speed, byte 10",
225 "10/40G Ethernet compliance codes, byte 128 + 3",
228 description = "10/40G Ethernet compliance",
232 {0x40, "10GBASE_LRM", "10GBASE-LRM"},
[all …]
/freebsd/sys/contrib/libsodium/src/libsodium/crypto_generichash/blake2b/ref/
H A Dblake2b-compress-ref.c16 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
17 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
18 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
19 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
20 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
21 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
22 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
23 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
24 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
25 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 },
[all …]
/freebsd/crypto/heimdal/lib/roken/
H A Dsnprintf-test.c74 tot += try ("%10d", int_values[i]); in cmp_with_sprintf_int()
75 tot += try ("%10x", int_values[i]); in cmp_with_sprintf_int()
76 tot += try ("%10X", int_values[i]); in cmp_with_sprintf_int()
77 tot += try ("%10o", int_values[i]); in cmp_with_sprintf_int()
78 tot += try ("%#10x", int_values[i]); in cmp_with_sprintf_int()
79 tot += try ("%#10X", int_values[i]); in cmp_with_sprintf_int()
80 tot += try ("%#10o", int_values[i]); in cmp_with_sprintf_int()
81 tot += try ("%-10d", int_values[i]); in cmp_with_sprintf_int()
82 tot += try ("%-10x", int_values[i]); in cmp_with_sprintf_int()
83 tot += try ("%-10X", int_values[i]); in cmp_with_sprintf_int()
[all …]
/freebsd/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth_mac_regs.h253 uint32_t reserved29[10];
390 /* [0x10] 10/100/1000 MAC external configuration */
392 /* [0x14] 10/100/1000 MAC status */
398 /* [0x20] 1/2.5/10G MAC external configuration */
400 /* [0x24] 1/2.5/10G MAC status */
487 * [0xc] 40G PCS,
492 * [0x10] 40G PCS,
497 * [0x14] 40G PCS,
502 * [0x18] 40G PCS,
507 * [0x1c] 40G PCS,
[all …]
/freebsd/sys/contrib/device-tree/include/dt-bindings/memory/
H A Dmt8195-memory-port.h13 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
16 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
21 * disp 0 ~ 4G larb0/1/2/3
22 * vcodec 4G ~ 8G larb19/20/21/22/23/24
23 * cam/mdp 8G ~ 12G the other larbs.
24 * N/A 12G ~ 16G
29 * iommu-vdo: larb0/2/5/7/9/10/11/13/17/19/21/24/25/28
110 #define M4U_PORT_L9_IMG_IMGBI_T1_B MTK_M4U_ID(9, 10)
122 #define M4U_PORT_L10_IMG_IMGI_D1_A MTK_M4U_ID(10, 0)
123 #define M4U_PORT_L10_IMG_IMGCI_D1_A MTK_M4U_ID(10, 1)
[all …]
H A Dmt8186-memory-port.h15 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
18 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
23 * disp 0 ~ 4G larb0/1/2
24 * vcodec 4G ~ 8G larb4/7
25 * cam/mdp 8G ~ 12G the other larbs.
26 * N/A 12G ~ 16G
27 * CCU0 0x24000_0000 ~ 0x243ff_ffff larb13: port 9/10
63 #define IOMMU_PORT_L4_HW_VDEC_UFO_ENC_EXT MTK_M4U_ID(4, 10)
79 #define IOMMU_PORT_L7_JPGENC_C_RDMA MTK_M4U_ID(7, 10)
99 #define IOMMU_PORT_L9_IMG_VIPI_D1 MTK_M4U_ID(9, 10)
[all …]
/freebsd/share/misc/
H A Dpci_vendors5 # Date: 2025-10-18 03:15:01
135 1012 1012 PCMCIA 10/100 Ethernet Card [RTL81xx]
304 ae32 Netelligent 10/100 TX PCI UTP
306 ae34 Netelligent 10 T PCI UTP
308 ae40 Netelligent Dual 10/100 TX PCI UTP
309 ae43 Netelligent Integrated 10/100 TX UTP
313 b011 Netelligent 10/100 TX Embedded UTP
314 b012 Netelligent 10 T/2 PCI UTP/Coax
318 b030 Netelligent 10/100 TX UTP
319 b04a 10/100 TX PCI Intel WOL UTP Controller
[all …]
/freebsd/sys/dev/sfxge/common/
H A Def10_tlv_layout.h71 * the items (e.g. static and dynamic VPD below).
222 * This is the portion of VPD which may be changed (e.g. by firmware updates).
538 * (e.g. 1x40G vs 2x10G on Milano, 1x40G vs 4x10G on Medford). This affects the
547 * to architecture capabilities (e.g. 25G support) and switch bandwidth
549 * - single lane ports can do 25G/10G/1G
550 * - dual lane ports can do 50G/25G/10G/1G (with fallback to 1 lane)
551 * - quad lane ports can do 100G/40G/50G/25G/10G/1G (with fallback to 2 or 1 lanes)
574 #define TLV_PORT_MODE_1x1_NA (0) /* Single 10G/25G on mdi0 */
575 #define TLV_PORT_MODE_1x4_NA (1) /* Single 100G/40G on mdi0 */
576 #define TLV_PORT_MODE_NA_1x4 (22) /* Single 100G/40G on mdi1 */
[all …]
/freebsd/contrib/bearssl/src/ec/
H A Dec_c25519_i31.c59 uint32_t y[10];
118 for (i = 0; i < 10; i ++) { in cswap()
133 uint32_t t[10]; in c255_add()
145 uint32_t t[10]; in c255_sub()
155 uint32_t t[10]; in c255_mul()
162 byteswap(unsigned char *G) in byteswap() argument
169 t = G[i]; in byteswap()
170 G[i] = G[31 - i]; in byteswap()
171 G[31 - i] = t; in byteswap()
176 api_mul(unsigned char *G, size_t Glen, in api_mul() argument
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dfsl,fman-port.yaml49 fsl,fman-10g-port:
51 description: The default port rate is 1G.
52 If this property exists, the port is s 10G port.
56 description: The default port rate is 1G.
57 Can be defined only if 10G-support is set.
58 This property marks a best-effort 10G port (10G port that
/freebsd/usr.sbin/makefs/tests/
H A Dmakefs_zfs_tests.sh68 # The pool is initially 10GB, so we get 10GB minus one metaslab's worth of
80 poolsize=$((10 * 1024 * 1024 * 1024))
115 atf_check $MAKEFS -s 10g -o rootpath=/ -o poolname=$ZFS_POOL_NAME \
142 atf_check $MAKEFS -s 1g -o rootpath=/ \
168 of=${TEST_MOUNT_DIR}/dir/random bs=1M count=10
170 of=${TEST_MOUNT_DIR}/dir/zero bs=1M count=10
172 of=${TEST_MOUNT_DIR}/dir2/zero bs=1M count=10
225 atf_check $MAKEFS -s 1g -o rootpath=/ -o poolname=$ZFS_POOL_NAME \
250 atf_check -e match:"skipping unhandled" $MAKEFS -s 1g -o rootpath=/ \
273 atf_check $MAKEFS -s 10g -o rootpath=/ -o poolname=$ZFS_POOL_NAME \
[all …]
/freebsd/sys/dev/wg/
H A Dwg_crypto.c52 static const uint8_t blake2s_sigma[10][16] = {
53 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
54 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
55 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
56 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
57 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
58 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
59 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
60 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
61 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dmicrochip,sparx5-serdes.yaml37 * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
48 * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
49 * 10 Gbps (10G-USGMII)
50 * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
60 * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
61 * 10 Gbps (10G-USGMII)
62 * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp15-pinctrl.dtsi109 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
131 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
152 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
170 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
187 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
207 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
222 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
223 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
224 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
225 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Support/BLAKE3/
H A Dblake3_portable.c8 INLINE void g(uint32_t *state, size_t a, size_t b, size_t c, size_t d, in g() function
25 g(state, 0, 4, 8, 12, msg[schedule[0]], msg[schedule[1]]); in round_fn()
26 g(state, 1, 5, 9, 13, msg[schedule[2]], msg[schedule[3]]); in round_fn()
27 g(state, 2, 6, 10, 14, msg[schedule[4]], msg[schedule[5]]); in round_fn()
28 g(state, 3, 7, 11, 15, msg[schedule[6]], msg[schedule[7]]); in round_fn()
31 g(state, 0, 5, 10, 15, msg[schedule[8]], msg[schedule[9]]); in round_fn()
32 g(state, 1, 6, 11, 12, msg[schedule[10]], msg[schedule[11]]); in round_fn()
33 g(state, 2, 7, 8, 13, msg[schedule[12]], msg[schedule[13]]); in round_fn()
34 g(state, 3, 4, 9, 14, msg[schedule[14]], msg[schedule[15]]); in round_fn()
51 block_words[10] = load32(block + 4 * 10); in compress_pre()
[all …]
/freebsd/lib/libutil/tests/
H A Dexpand_number_test.c68 require_success("-10", -10); in ATF_TC_BODY()
69 require_success(" 10", 10); in ATF_TC_BODY()
70 require_success("+10", 10); in ATF_TC_BODY()
74 require_success("1K", 1LL << 10); in ATF_TC_BODY()
76 require_success("1G", 1LL << 30); in ATF_TC_BODY()
83 require_success("2k", 2LL << 10); in ATF_TC_BODY()
85 require_success("2g", 2LL << 30); in ATF_TC_BODY()
91 require_success("3KB", 3LL << 10); in ATF_TC_BODY()
100 require_success("-10", -10); in ATF_TC_BODY()
102 require_success("-1K", -(1LL << 10)); in ATF_TC_BODY()
[all …]
/freebsd/crypto/openssl/providers/implementations/digests/
H A Dblake2b_prov.c34 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 } ,
35 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 } ,
36 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 } ,
37 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 } ,
38 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 } ,
39 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 } ,
40 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 } ,
41 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 } ,
42 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 } ,
43 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13 , 0 } ,
[all …]
/freebsd/contrib/llvm-project/compiler-rt/lib/tsan/rtl/
H A Dtsan_md5.cpp17 #define G(x, y, z) ((y) ^ ((z) & ((x) ^ (y)))) macro
67 STEP(F, c, d, a, b, SET(10), 0xffff5bb1, 17) in body()
74 STEP(G, a, b, c, d, GET(1), 0xf61e2562, 5) in body()
75 STEP(G, d, a, b, c, GET(6), 0xc040b340, 9) in body()
76 STEP(G, c, d, a, b, GET(11), 0x265e5a51, 14) in body()
77 STEP(G, b, c, d, a, GET(0), 0xe9b6c7aa, 20) in body()
78 STEP(G, a, b, c, d, GET(5), 0xd62f105d, 5) in body()
79 STEP(G, d, a, b, c, GET(10), 0x02441453, 9) in body()
80 STEP(G, c, d, a, b, GET(15), 0xd8a1e681, 14) in body()
81 STEP(G, b, c, d, a, GET(4), 0xe7d3fbc8, 20) in body()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/
H A Dsimple-framebuffer.yaml48 mode information and enable them. This way if e.g. later on support
97 * `a1r5g5b5` - 16-bit pixels, d[15]=a, d[14:10]=r, d[9:5]=g, d[4:0]=b
98 * `a2r10g10b10` - 32-bit pixels, d[31:30]=a, d[29:20]=r, d[19:10]=g, d[9:0]=b
99 * `a8b8g8r8` - 32-bit pixels, d[31:24]=a, d[23:16]=b, d[15:8]=g, d[7:0]=r
100 * `a8r8g8b8` - 32-bit pixels, d[31:24]=a, d[23:16]=r, d[15:8]=g, d[7:0]=b
101 * `r5g6b5` - 16-bit pixels, d[15:11]=r, d[10:5]=g, d[4:0]=b
102 * `r5g5b5a1` - 16-bit pixels, d[15:11]=r, d[10:6]=g, d[5:1]=b d[1:0]=a
103 * `r8g8b8` - 24-bit pixels, d[23:16]=r, d[15:8]=g, d[7:0]=b
104 * `x1r5g5b5` - 16-bit pixels, d[14:10]=r, d[9:5]=g, d[4:0]=b
105 * `x2r10g10b10` - 32-bit pixels, d[29:20]=r, d[19:10]=g, d[9:0]=b
[all …]

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