1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Samsung S3C/S5P/Exynos SoC pin controller 8 9maintainers: 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 - Tomasz Figa <tomasz.figa@gmail.com> 13 14description: | 15 This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin 16 controller. 17 18 All the pin controller nodes should be represented in the aliases node using 19 the following format 'pinctrl{n}' where n is a unique number for the alias. 20 21 The controller supports three types of interrupts: 22 - External GPIO interrupts (see interrupts property in pin controller node); 23 24 - External wake-up interrupts - multiplexed (capable of waking up the system 25 see interrupts property in external wake-up interrupt controller node - 26 samsung,pinctrl-wakeup-interrupt.yaml); 27 28 - External wake-up interrupts - direct (capable of waking up the system, see 29 interrupts property in every bank of pin controller with external wake-up 30 interrupt controller - samsung,pinctrl-gpio-bank.yaml). 31 32properties: 33 $nodename: 34 pattern: "^pinctrl(@.*)?" 35 36 compatible: 37 enum: 38 - axis,artpec8-pinctrl 39 - axis,artpec9-pinctrl 40 - google,gs101-pinctrl 41 - samsung,s3c64xx-pinctrl 42 - samsung,s5pv210-pinctrl 43 - samsung,exynos2200-pinctrl 44 - samsung,exynos3250-pinctrl 45 - samsung,exynos4210-pinctrl 46 - samsung,exynos4x12-pinctrl 47 - samsung,exynos5250-pinctrl 48 - samsung,exynos5260-pinctrl 49 - samsung,exynos5410-pinctrl 50 - samsung,exynos5420-pinctrl 51 - samsung,exynos5433-pinctrl 52 - samsung,exynos7-pinctrl 53 - samsung,exynos7870-pinctrl 54 - samsung,exynos7885-pinctrl 55 - samsung,exynos850-pinctrl 56 - samsung,exynos8855-pinctrl 57 - samsung,exynos8890-pinctrl 58 - samsung,exynos8895-pinctrl 59 - samsung,exynos9610-pinctrl 60 - samsung,exynos9810-pinctrl 61 - samsung,exynos990-pinctrl 62 - samsung,exynosautov9-pinctrl 63 - samsung,exynosautov920-pinctrl 64 - tesla,fsd-pinctrl 65 66 interrupts: 67 description: 68 Required for GPIO banks supporting external GPIO interrupts. 69 maxItems: 1 70 71 power-domains: 72 maxItems: 1 73 74 reg: 75 description: 76 Second base address of the pin controller if the specific registers of 77 the pin controller are separated into the different base address. 78 Only certain banks of certain pin controller might need it. 79 minItems: 1 80 maxItems: 2 81 82 clocks: 83 maxItems: 1 84 85 clock-names: 86 items: 87 - const: pclk 88 89 wakeup-interrupt-controller: 90 $ref: samsung,pinctrl-wakeup-interrupt.yaml 91 92patternProperties: 93 "^[a-z]+[0-9]*-gpio-bank$": 94 description: 95 Pin banks of the controller are represented by child nodes of the 96 controller node. Bank name is taken from name of the node. 97 $ref: samsung,pinctrl-gpio-bank.yaml 98 99 "^[a-z0-9-]+-pins$": 100 oneOf: 101 - $ref: samsung,pinctrl-pins-cfg.yaml 102 required: 103 - samsung,pins 104 - type: object 105 patternProperties: 106 "^[a-z0-9-]+-pins$": 107 $ref: samsung,pinctrl-pins-cfg.yaml 108 109 additionalProperties: false 110 111 "^(initial|sleep)-state$": 112 type: object 113 additionalProperties: false 114 115 patternProperties: 116 "^(pin-[a-z0-9-]+|[a-z0-9-]+-pin)$": 117 $ref: samsung,pinctrl-pins-cfg.yaml 118 119 properties: 120 samsung,pins: 121 description: See samsung,pinctrl-pins-cfg.yaml 122 $ref: /schemas/types.yaml#/definitions/string-array 123 maxItems: 1 124 125 required: 126 - samsung,pins 127 128 unevaluatedProperties: false 129 130required: 131 - compatible 132 - reg 133 134allOf: 135 - $ref: pinctrl.yaml# 136 - if: 137 properties: 138 compatible: 139 contains: 140 enum: 141 - google,gs101-pinctrl 142 - samsung,exynos8890-pinctrl 143 then: 144 required: 145 - clocks 146 - clock-names 147 else: 148 properties: 149 clocks: false 150 clock-names: false 151 152 - if: 153 properties: 154 compatible: 155 contains: 156 const: samsung,exynos5433-pinctrl 157 then: 158 properties: 159 reg: 160 minItems: 1 161 maxItems: 2 162 else: 163 properties: 164 reg: 165 minItems: 1 166 maxItems: 1 167 168additionalProperties: false 169 170examples: 171 - | 172 pinctrl@7f008000 { 173 compatible = "samsung,s3c64xx-pinctrl"; 174 reg = <0x7f008000 0x1000>; 175 interrupt-parent = <&vic1>; 176 interrupts = <21>; 177 178 wakeup-interrupt-controller { 179 compatible = "samsung,s3c64xx-wakeup-eint"; 180 interrupts-extended = <&vic0 0>, 181 <&vic0 1>, 182 <&vic1 0>, 183 <&vic1 1>; 184 }; 185 186 /* Pin bank with external GPIO or muxed external wake-up interrupts */ 187 gpa-gpio-bank { 188 gpio-controller; 189 #gpio-cells = <2>; 190 interrupt-controller; 191 #interrupt-cells = <2>; 192 }; 193 194 // ... 195 196 uart0-data-pins { 197 samsung,pins = "gpa-0", "gpa-1"; 198 samsung,pin-function = <2>; 199 samsung,pin-pud = <0>; 200 }; 201 202 // ... 203 }; 204 205 - | 206 #include <dt-bindings/interrupt-controller/arm-gic.h> 207 208 pinctrl@11400000 { 209 compatible = "samsung,exynos4210-pinctrl"; 210 reg = <0x11400000 0x1000>; 211 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 212 213 pinctrl-names = "default"; 214 pinctrl-0 = <&sleep0>; 215 216 /* Pin bank with external GPIO or muxed external wake-up interrupts */ 217 gpa0-gpio-bank { 218 gpio-controller; 219 #gpio-cells = <2>; 220 interrupt-controller; 221 #interrupt-cells = <2>; 222 }; 223 224 // ... 225 226 uart0-data-pins { 227 samsung,pins = "gpa0-0", "gpa0-1"; 228 samsung,pin-function = <2>; 229 samsung,pin-pud = <0>; 230 samsung,pin-drv = <0>; 231 }; 232 233 // ... 234 235 sleep0: sleep-state { 236 gpa0-0-pin { 237 samsung,pins = "gpa0-0"; 238 samsung,pin-con-pdn = <2>; 239 samsung,pin-pud-pdn = <0>; 240 }; 241 242 gpa0-1-pin { 243 samsung,pins = "gpa0-1"; 244 samsung,pin-con-pdn = <0>; 245 samsung,pin-pud-pdn = <0>; 246 }; 247 248 // ... 249 }; 250 }; 251 252 - | 253 #include <dt-bindings/interrupt-controller/arm-gic.h> 254 255 pinctrl@11000000 { 256 compatible = "samsung,exynos4210-pinctrl"; 257 reg = <0x11000000 0x1000>; 258 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 259 260 wakeup-interrupt-controller { 261 compatible = "samsung,exynos4210-wakeup-eint"; 262 interrupt-parent = <&gic>; 263 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 264 }; 265 266 /* Pin bank with external GPIO or muxed external wake-up interrupts */ 267 gpj0-gpio-bank { 268 gpio-controller; 269 #gpio-cells = <2>; 270 interrupt-controller; 271 #interrupt-cells = <2>; 272 }; 273 274 /* Pin bank without external interrupts */ 275 gpy0-gpio-bank { 276 gpio-controller; 277 #gpio-cells = <2>; 278 }; 279 280 /* Pin bank with external direct wake-up interrupts */ 281 gpx0-gpio-bank { 282 gpio-controller; 283 #gpio-cells = <2>; 284 285 interrupt-controller; 286 interrupt-parent = <&gic>; 287 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 288 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 289 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 290 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, 291 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, 292 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 293 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, 294 <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 295 #interrupt-cells = <2>; 296 }; 297 298 // ... 299 300 sd0-clk-pins { 301 samsung,pins = "gpk0-0"; 302 samsung,pin-function = <2>; 303 samsung,pin-pud = <0>; 304 samsung,pin-drv = <3>; 305 }; 306 307 sd4-bus-width8-pins { 308 part-1-pins { 309 samsung,pins = "gpk0-3", "gpk0-4", 310 "gpk0-5", "gpk0-6"; 311 samsung,pin-function = <3>; 312 samsung,pin-pud = <3>; 313 samsung,pin-drv = <3>; 314 }; 315 316 part-2-pins { 317 samsung,pins = "gpk1-3", "gpk1-4", 318 "gpk1-5", "gpk1-6"; 319 samsung,pin-function = <4>; 320 samsung,pin-pud = <3>; 321 samsung,pin-drv = <3>; 322 }; 323 }; 324 325 // ... 326 327 otg-gp-pins { 328 samsung,pins = "gpx3-3"; 329 samsung,pin-function = <1>; 330 samsung,pin-pud = <0>; 331 samsung,pin-drv = <0>; 332 samsung,pin-val = <0>; 333 }; 334 }; 335 336 - | 337 #include <dt-bindings/interrupt-controller/arm-gic.h> 338 339 pinctrl@10580000 { 340 compatible = "samsung,exynos5433-pinctrl"; 341 reg = <0x10580000 0x1a20>, <0x11090000 0x100>; 342 343 pinctrl-names = "default"; 344 pinctrl-0 = <&initial_alive>; 345 346 wakeup-interrupt-controller { 347 compatible = "samsung,exynos5433-wakeup-eint", 348 "samsung,exynos7-wakeup-eint"; 349 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 350 }; 351 352 /* Pin bank with external direct wake-up interrupts */ 353 gpa0-gpio-bank { 354 gpio-controller; 355 #gpio-cells = <2>; 356 357 interrupt-controller; 358 interrupt-parent = <&gic>; 359 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 360 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 361 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 362 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 363 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 364 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, 365 <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 366 <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 367 #interrupt-cells = <2>; 368 }; 369 370 // ... 371 372 te-irq-pins { 373 samsung,pins = "gpf1-3"; 374 samsung,pin-function = <0xf>; 375 }; 376 377 // .. 378 379 initial_alive: initial-state { 380 gpa0-0-pin { 381 samsung,pins = "gpa0-0"; 382 samsung,pin-function = <0>; 383 samsung,pin-pud = <1>; 384 samsung,pin-drv = <0>; 385 }; 386 387 // ... 388 }; 389 }; 390 391 - | 392 #include <dt-bindings/interrupt-controller/arm-gic.h> 393 394 pinctrl@114b0000 { 395 compatible = "samsung,exynos5433-pinctrl"; 396 reg = <0x114b0000 0x1000>; 397 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 398 power-domains = <&pd_aud>; 399 400 /* Pin bank with external GPIO or muxed external wake-up interrupts */ 401 gpz0-gpio-bank { 402 gpio-controller; 403 #gpio-cells = <2>; 404 interrupt-controller; 405 #interrupt-cells = <2>; 406 }; 407 408 // ... 409 410 i2s0-bus-pins { 411 samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3", 412 "gpz0-4", "gpz0-5", "gpz0-6"; 413 samsung,pin-function = <2>; 414 samsung,pin-pud = <0>; 415 samsung,pin-drv = <0>; 416 }; 417 418 // ... 419 }; 420