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Searched +full:1000 +full:basex (Results 1 – 19 of 19) sorted by relevance

/linux/Documentation/devicetree/bindings/net/
H A Dxlnx,axi-ethernet.yaml12 interfaces: MII, GMII, RGMII, SGMII, 1000BaseX. It also includes two
64 - 1000base-x
91 Indicate the Ethernet core is configured to support both 1000BaseX and
121 description: Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
/linux/include/uapi/linux/
H A Dmii.h23 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
24 #define MII_STAT1000 0x0a /* 1000BASE-T status */
42 #define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
75 #define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */
77 #define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */
79 #define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */
81 #define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */
98 #define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */
100 #define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */
102 #define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */
[all …]
/linux/drivers/net/ethernet/xilinx/
H A Dxilinx_axienet.h271 #define XAE_EMMC_GPCS_MASK 0x08000000 /* 1000BaseX mode enable */
277 #define XAE_EMMC_LINKSPD_1000 0x80000000 /* Link Speed mask for 1000 Mbit */
286 #define XAE_PHYC_RGLINKSPD_1000 0x00000008 /* RGMII link 1000 Mbit */
289 #define XAE_PHYC_SGLINKSPD_1000 0x80000000 /* SGMII link 1000 Mbit */
357 #define DELAY_OF_ONE_MILLISEC 1000
359 /* Xilinx PCS/PMA PHY register for switching 1000BaseX or SGMII */
478 * @switch_x_sgmii: Whether switchable 1000BaseX/SGMII mode is enabled in the core
531 * @phy_mode: Phy type to identify between MII/GMII/RGMII/SGMII/1000 Base-X
H A Dxilinx_axienet_main.c2931 dev_err(&pdev->dev, "xlnx,switch-x-sgmii only supported with SGMII or 1000BaseX\n"); in axienet_probe()
3088 dev_err(&pdev->dev, "pcs-handle (preferred) or phy-handle required for 1000BaseX/SGMII\n"); in axienet_probe()
/linux/drivers/net/ethernet/freescale/dpaa2/
H A Ddpmac.h49 * @DPMAC_ETH_IF_1000BASEX: 1000BASEX interface
/linux/Documentation/networking/
H A Dphy-link-topology.rst32 interface, that can directly be fed to an SFP cage, such as SGMII, 1000BaseX,
H A Dsfp-phylink.rst213 methods such as 1000base-X and SGMII.
344 configuration for a MAC that can handle all RGMII modes, SGMII and 1000BaseX.
/linux/drivers/net/phy/
H A Dmxl-gpy.c175 {4, -25761, 1000, 1},
176 {3, 97332, 1000, 1},
177 {2, -191650, 1000, 1},
178 {1, 307620, 1000, 1},
545 /* Automatically switch SERDES interface between SGMII and 2500-BaseX in gpy_update_interface()
546 * according to speed. Disable ANEG in 2500-BaseX mode. in gpy_update_interface()
566 /* Enable and restart SGMII ANEG for 10/100/1000Mbps link speed in gpy_update_interface()
567 * if ANEG is disabled (in 2500-BaseX mode). in gpy_update_interface()
H A Dphylink.c1047 /* 1000base-X is designed for use media-side for Fibre in phylink_get_inband_type()
1944 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
2914 * pause modes when in 1000base-X mode with a PHY, but in in phylink_ethtool_ksettings_set()
3027 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ in phylink_ethtool_ksettings_set()
3055 * if the MAC is in a BaseX mode, the MAC will also be requested to restart
/linux/drivers/net/ethernet/microchip/
H A Dlan743x_main.c1093 /* Switch to 10/100/1000 Mbps clock */ in lan743x_serdes_clock_and_aneg_update()
1159 usleep_range(1000, 2000); in lan743x_pcs_seq_state()
1173 /* SGMII/1000/2500BASE-X PCS power down */ in lan743x_pcs_power_reset()
1187 /* SGMII/1000/2500BASE-X PCS power up */ in lan743x_pcs_power_reset()
1276 1, 1000, 20000, 100); in lan743x_mac_close()
1282 1, 1000, 20000, 100); in lan743x_mac_close()
1316 1, 1000, 20000, 100); in lan743x_mac_set_mtu()
1474 0, 1000, 20000, 100); in lan743x_dmac_init()
1531 usleep_range(1000, 20000); in lan743x_dmac_tx_wait_till_stopped()
1560 usleep_range(1000, 20000); in lan743x_dmac_rx_wait_till_stopped()
[all …]
/linux/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_port.c18 #define SPX5_WAIT_US 1000
158 /* Get link status of 1000Base-X/in-band and SFI ports.
381 spd_prm = spd == SPEED_10 ? 1000 : spd == SPEED_100 ? 100 : 10; in sparx5_port_disable()
521 tmp1 = 1000 * mac_width / fifo_width; in sparx5_port_fifo_sz()
522 tmp2 = 3000 + ((12000 + 2 * taxi_dist[portno] * 1000) in sparx5_port_fifo_sz()
524 tmp3 = tmp1 * tmp2 / 1000; in sparx5_port_fifo_sz()
525 return (tmp3 + 2000 + 999) / 1000 + addition; in sparx5_port_fifo_sz()
764 /* Choose SGMII or 1000BaseX/2500BaseX PCS mode */ in sparx5_port_pcs_low_set()
/linux/include/linux/
H A Dphylink.h31 * 1000base-X with autoneg off
312 * 1000base-X or Cisco SGMII mode depending on the @state->interface
483 * @pcs_an_restart: restart 802.3z BaseX autonegotiation.
599 * For 1000BASE-X, the advertisement should be programmed into the PCS.
620 * pcs_an_restart() - restart 802.3z BaseX autonegotiation
H A Dphy.h93 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
94 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
95 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
104 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN
256 return "1000base-x"; in phy_modes()
258 return "1000base-kx"; in phy_modes()
548 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
/linux/drivers/net/dsa/mv88e6xxx/
H A Dpcs-639x.c644 * When a SERDES port is operating in 1000BASE-X or SGMII mode link may not
704 * We can get around this by configuring the PCS mode to 1000base-x and then
709 * PCS mode to 1000base-x and frequency to 3.125 GHz from 1.25 GHz) and then
710 * configure to sgmii or 1000base-x, the device thinks that it already has
751 "failed to %s 2500basex fix: %pe\n", in mv88e6393x_sgmii_apply_2500basex_an()
/linux/drivers/net/ethernet/altera/
H A Daltera_tse.h210 /* only if 100/1000 BaseX PCS, reserved otherwise */
/linux/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-mdio.c523 if (!XGBE_ADV(lks, 1000baseKX_Full) && in xgbe_an73_incompat_link()
900 (pdata->an_mode == XGBE_AN_MODE_CL37) ? "BaseX" : "SGMII"); in xgbe_an37_init()
931 if (XGBE_ADV(&lks, 1000baseKX_Full) || in xgbe_an73_init()
1505 else if (XGBE_ADV(lks, 1000baseKX_Full)) in xgbe_phy_best_advertised_speed()
1507 else if (XGBE_ADV(lks, 1000baseT_Full)) in xgbe_phy_best_advertised_speed()
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_ethtool.c504 1000baseT_Full); in i40e_phy_type_to_ethtool()
507 1000baseT_Full); in i40e_phy_type_to_ethtool()
569 1000baseT_Full); in i40e_phy_type_to_ethtool()
572 1000baseT_Full); in i40e_phy_type_to_ethtool()
617 1000baseKX_Full); in i40e_phy_type_to_ethtool()
620 1000baseKX_Full); in i40e_phy_type_to_ethtool()
698 1000baseX_Full); in i40e_phy_type_to_ethtool()
701 1000baseX_Full); in i40e_phy_type_to_ethtool()
834 1000baseX_Full); in i40e_get_settings_link_up()
836 1000baseX_Full); in i40e_get_settings_link_up()
[all …]
/linux/drivers/net/ethernet/marvell/
H A Dsky2.c66 #define PHY_RETRIES 1000
309 /* flow control to advertise bits when using 1000BaseX */
393 /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */ in sky2_phy_init()
537 PHY_M_LEDC_STA0_CTRL(7))); /* 1000 Mbps */ in sky2_phy_init()
565 PHY_M_LEDC_STA0_CTRL(7)));/* 1000 Mbps */ in sky2_phy_init()
591 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */ in sky2_phy_init()
3413 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000)); in sky2_reset()
/linux/drivers/net/ethernet/sfc/
H A Dmcdi_pcol.h5257 /* enum: 1000BASE-KX - 1000BASE-X PCS/PMA over an electrical backplane PMD. See
5321 /* enum: 1000BASEX PCS/PMA. See IEEE 802.3 Clause 36 over undefined PMD, duplex
8992 #define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_MAXNUM_MCDI2 1000